| commit | daa9dcbc0c3fe4e5014855c8b31f1cfeb5f0af91 | [log] [tgz] |
|---|---|---|
| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | Fri Mar 29 13:02:05 2019 +0000 |
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | Wed Apr 10 08:41:53 2019 +0000 |
| tree | 65b0e6feced44355aa991fa47ab892a1d5e2f50f | |
| parent | 7f9c98472c97f8f71f71c7386496af67fc886d03 [diff] |
cpu: O3 switchFreeList checking VecElems instead of FloatRegs Vector elements should be checked instead of floats since those are the ones mapped to the vector registers. Change-Id: I36088ab90e63720d846fcf5b43360da105b6c736 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17850 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>