tree 3a140bbf83c79635c15c20c29ed8673dfd978601
parent 68bc5397c937c7289ad7e78416132dc77ccf34a9
author Giacomo Travaglini <giacomo.travaglini@arm.com> 1540394501 +0100
committer Giacomo Travaglini <giacomo.travaglini@arm.com> 1540547147 +0000

arch-arm: AArch64 Instruction for MISCREG_IMPDEF_UNIMPL

While there is a AArch32 class for instructions accessing implementation
defined registers, we are lacking for the AArch64 counterpart.
we were relying on FailUnimplemented, which is untrappable at EL2 (except
for HCR_EL2.TGE) since it is just raising Undefined Instruction.

Change-Id: I923cb914658ca958af031612cf005159707b0b4f
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13779
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>