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gem5
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testing
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jenkins-gem5-prod
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5fb00e1df6b2b7d9db472d0c25765263ed1b839f
5fb00e1
tests: Add CPU switching tests
by Andreas Sandberg
· 12 years ago
e09e9fa
cpu: Flush TLBs on switchOut()
by Andreas Sandberg
· 12 years ago
964aa49
mem: Fix guest corruption when caches handle uncacheable accesses
by Andreas Sandberg
· 12 years ago
1814a85
cpu: Rewrite O3 draining to avoid stopping in microcode
by Andreas Sandberg
· 12 years ago
9e80031
cpu: Make sure that a drained atomic CPU isn't executing ucode
by Andreas Sandberg
· 12 years ago
f9bcf46
cpu: Make sure that a drained timing CPU isn't executing ucode
by Andreas Sandberg
· 12 years ago
52ff37c
cpu: Fix broken thread context handover
by Andreas Sandberg
· 12 years ago
fca4fea
cpu: Fix O3 LSQ debug dumping constness and formatting
by Andreas Sandberg
· 12 years ago
fb52ea9
arm: Invalidate cached TLB configuration in drainResume
by Andreas Sandberg
· 12 years ago
0d59549
arm: Fix draining of the pagetable walker when squashing
by Andreas Sandberg
· 12 years ago
8db27aa
cpu: Fix broken squashAfter implementation in O3 CPU
by Andreas Sandberg
· 12 years ago
a2077cc
o3 cpu: Remove unused variables
by Andreas Sandberg
· 12 years ago
e23850d
tests: Update the ignore regexps to reflect the M5->gem5 name change
by Andreas Sandberg
· 12 years ago
1c3a188
sim: Remove unused variables
by Andreas Sandberg
· 12 years ago
2cfe62a
cpu: Rename defer_registration->switched_out
by Andreas Sandberg
· 12 years ago
f7da0fd
cpu: Remove unused params.hh header file in inorder CPU
by Andreas Sandberg
· 12 years ago
38925ff
arm: Remove the register mapping hack used when copying TCs
by Andreas Sandberg
· 12 years ago
a7e0cbe
cpu: Introduce sanity checks when switching between CPUs
by Andreas Sandberg
· 12 years ago
901258c
cpu: Correctly call parent on switchOut() and takeOverFrom()
by Andreas Sandberg
· 12 years ago
4ae0229
cpu: Unify SimpleCPU and O3 CPU serialization code
by Andreas Sandberg
· 12 years ago
6daada2
cpu: Initialize the O3 pipeline from startup()
by Andreas Sandberg
· 12 years ago
e2dad82
cpu: Implement a flat register interface in thread contexts
by Andreas Sandberg
· 12 years ago
17b47d3
arch: Move the ISA object to a separate section
by Andreas Sandberg
· 12 years ago
7eb0fb8
cpu: Check that the memory system is in the correct mode
by Andreas Sandberg
· 12 years ago
94561dd
arch: Add support for invalidating TLBs when draining
by Andreas Sandberg
· 12 years ago
d44f2f6
mem: Remove the IIC replacement policy
by Andreas Sandberg
· 12 years ago
9364d35
dev: Do not serialize timer parameters
by Andreas Hansson
· 12 years ago
406891c
scons: Enforce gcc >= 4.4 or clang >= 2.9 and c++0x support
by Andreas Hansson
· 12 years ago
2213023
scons: Remove stale compiler options
by Andreas Hansson
· 12 years ago
921490a
sim: Fatal if a clocked object is set to have a clock of 0
by Andreas Hansson
· 12 years ago
490dc30
dev: Make the ethernet devices use a non-zero clock
by Andreas Hansson
· 12 years ago
4c06be6
scons: Whitelist useful environment variables
by Andreas Sandberg
· 12 years ago
694a81e
ARM: pl111/LCD framebuffer checkpointing fix
by Chander Sudanthi
· 12 years ago
c3551e8
arch: Fix broken M5VarArgsFault initialization
by Andreas Sandberg
· 12 years ago
18b147a
mem: Merge ranges that are part of the conf table
by Andreas Hansson
· 12 years ago
b8c2fa6
base: Add support for merging of interleaved address ranges
by Andreas Hansson
· 12 years ago
01c5598
mem: Add interleaving bits to the address ranges
by Andreas Hansson
· 12 years ago
e6c5778
config: Traverse lists when visiting children in all proxy
by Andreas Hansson
· 12 years ago
e0d93fd
base: Simplify the AddrRangeMap by removing unused code
by Andreas Hansson
· 12 years ago
e65de3f
config: Do not use hardcoded physmem in fs script
by Andreas Hansson
· 12 years ago
15a979c
mem: Tidy up bus addr range debug messages
by Andreas Hansson
· 12 years ago
caf6786
mem: Skip address mapper range checks to allow more flexibility
by Andreas Hansson
· 12 years ago
71da1d2
base: Encapsulate the underlying fields in AddrRange
by Andreas Hansson
· 12 years ago
cfdaf53
mem: Remove the joining of neighbouring ranges
by Andreas Hansson
· 12 years ago
ccb6c64
cpu: Share the send functionality between traffic generators
by Andreas Hansson
· 12 years ago
1da2091
cpu: Add support for protobuf input for the trace generator
by Andreas Hansson
· 12 years ago
9c5ef23
tests: Add support for skipping tests, skip EIO tests if not enabled
by Andreas Sandberg
· 12 years ago
35bdee7
cpu: Encapsulate traffic generator input in a stream
by Andreas Hansson
· 12 years ago
4afa6c4
base: Add wrapped protobuf input stream
by Andreas Hansson
· 12 years ago
f456c79
mem: Add tracing support in the communication monitor
by Andreas Hansson
· 12 years ago
11ab30f
base: Add wrapped protobuf output streams
by Andreas Hansson
· 12 years ago
41f228c
scons: Add support for google protobuf building
by Andreas Hansson
· 12 years ago
63f1d05
arm: Fix DMA event handling bug in the PL111 model
by Andreas Sandberg
· 12 years ago
fffdc6a
dev: Fix the Pl111 timings by separating pixel and DMA clock
by Andreas Hansson
· 12 years ago
79b4477
stats: Update DRAM regression stats to match new config
by Andreas Hansson
· 12 years ago
7216681
config: Reduce DRAM controller regression traffic rate
by Andreas Hansson
· 12 years ago
f22d3bb
cpu: Fix the traffic gen read percentage
by Andreas Hansson
· 12 years ago
852a7bc
mem: Add sanity check to packet queue size
by Andreas Hansson
· 12 years ago
ce5fc49
ruby: Fix missing cxx_header in Switch
by Andreas Hansson
· 12 years ago
4731979
scons: Fix libelf linking errors when using clang/llvm
by Andreas Hansson
· 12 years ago
b7827a5
config: Replace second keyboard with a mouse.
by Chris Emmons
· 12 years ago
1742699
mem: Fix a bug in the memory serialization file naming
by Andreas Hansson
· 12 years ago
0d1ad50
arm: Make ID registers ISA parameters
by Andreas Sandberg
· 12 years ago
3db3f83
arch: Make the ISA class inherit from SimObject
by Andreas Sandberg
· 12 years ago
69d419f
o3: Fix issue with LLSC ordering and speculation
by Ali Saidi
· 12 years ago
5146a69
cpu: rename the misleading inSyscall to noSquashFromTC
by Ali Saidi
· 12 years ago
90bd20a
tests: Always specify memory mode in every test system.
by Ali Saidi
· 12 years ago
f32f372
tests: Create base classes to encapsulate common test configurations
by Andreas Sandberg
· 12 years ago
9a645d6
cache: add note about where conflicts are handled
by Ali Saidi
· 12 years ago
5ebe321
regressions: stats update due to decoder changes
by Nilay Vaish
· 12 years ago
e17c375
Decoder: Remove the thread context get/set from the decoder.
by Gabe Black
· 12 years ago
d1965af
X86: Move address based decode caching in front of the predecoder.
by Gabe Black
· 12 years ago
63b1090
SPARC: Keep a copy of the current ASI in the decoder.
by Gabe Black
· 12 years ago
a83e74b
ARM: Keep a copy of the fpscr len and stride fields in the decoder.
by Gabe Black
· 12 years ago
1945f99
x86 regressions: stats update due to new x87 instructions
by Nilay Vaish
· 12 years ago
e9fa54d
x86: implement x87 fp instruction fnstsw
by Nilay Vaish
· 12 years ago
23ba6fc
x86: implement x87 fp instruction fsincos
by Nilay Vaish
· 12 years ago
3b01edd
arm regressions: updates to config.ini, terminal files
by Nilay Vaish
· 12 years ago
3026a11
arm: set uopSet_uop as conditional or unconditional control
by Nathanael Premillieu
· 12 years ago
84fc57b
arm: set movret_uop as conditional or unconditional control
by Nathanael Premillieu
· 12 years ago
141ee38
regressions: stats update due to stats from ruby prefetcher
by Nilay Vaish
· 12 years ago
f3d0be2
ruby: add support for prefetching to MESI protocol
by Nilay Vaish
· 12 years ago
c120273
ruby: modify the directed tester to read/write streams
by Nilay Vaish
· 12 years ago
9b72a0f
ruby: change slicc to allow for constructor args
by Nilay Vaish
· 12 years ago
93e283a
ruby: add a prefetcher
by Nilay Vaish
· 12 years ago
d502384
ruby: add functions for computing next stride/page address
by Nilay Vaish
· 12 years ago
2fca1af
regression test: update a couple of config.ini files
by Nilay Vaish
· 12 years ago
3dc7e4f
TournamentBP: Fix some bugs with table sizes and counters
by Erik Tomusk
· 12 years ago
150e9b8
inorder cpu: add missing DPRINTF argument
by Malek Musleh
· 12 years ago
eb89940
o3 cpu: remove some unused buggy functions in the lsq
by Nathanael Premillieu
· 12 years ago
13f6d29
config: Fix description of checkpoint option from cycle to tick
by Andreas Hansson
· 12 years ago
2d64709
sim: have a curTick per eventq
by Nilay Vaish
· 12 years ago
2680c82
regressions: stats update due to ruby functional access patch
by Nilay Vaish
· 12 years ago
90c45c2
ruby: support functional accesses in garnet flexible network
by Nilay Vaish
· 12 years ago
1492ab0
ruby: bug in functionalRead, revert recent changes
by Nilay Vaish
· 12 years ago
c4b3690
mem: Fix DRAM draining to ensure write queue is empty
by Andreas Hansson
· 12 years ago
bb4f656
x86, util: add m5_writefile to m5op_x86.S
by Lluis Vilanova
· 12 years ago
8cd475d
ruby: reset and dump stats along with reset of the system
by Hamid Reza Khaleghzadeh ext:(%2C%20Lluc%20Alvarez%20%3Clluc.alvarez%40bsc.es%3E%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
· 12 years ago
ce5766c
mem: fix use after free issue in memories until 4-phase work complete.
by Ali Saidi
· 12 years ago
1dbf9bb
update stats for preceeding changes
by Ali Saidi
· 12 years ago
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