Made Addr a global type
--HG--
extra : convert_revision : 869bd9fa5d8591115ac9b4a7401eb2490986b835
diff --git a/arch/alpha/alpha_memory.hh b/arch/alpha/alpha_memory.hh
index b39a1ef..849063f 100644
--- a/arch/alpha/alpha_memory.hh
+++ b/arch/alpha/alpha_memory.hh
@@ -42,7 +42,6 @@
class AlphaTLB : public SimObject
{
protected:
- typedef TheISA::Addr Addr;
typedef std::multimap<Addr, int> PageTable;
PageTable lookupTable; // Quick lookup into page table
@@ -83,7 +82,6 @@
class AlphaITB : public AlphaTLB
{
protected:
- typedef TheISA::Addr Addr;
mutable Stats::Scalar<> hits;
mutable Stats::Scalar<> misses;
mutable Stats::Scalar<> acv;
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index 7676d75..60c9e73 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -34,14 +34,12 @@
class AlphaFault : public Fault
{
- protected:
- typedef TheISA::Addr Addr;
public:
AlphaFault(char * newName, int newId, Addr newVect)
: Fault(newName, newId), vect(newVect)
{;}
- TheISA::Addr vect;
+ Addr vect;
};
extern class ResetFaultType : public AlphaFault
diff --git a/arch/alpha/isa/branch.isa b/arch/alpha/isa/branch.isa
index cc6fd1a..9a7fb9d 100644
--- a/arch/alpha/isa/branch.isa
+++ b/arch/alpha/isa/branch.isa
@@ -40,8 +40,6 @@
class PCDependentDisassembly : public AlphaStaticInst
{
protected:
- typedef TheISA::Addr Addr;
- protected:
/// Cached program counter from last disassembly
mutable Addr cachedPC;
/// Cached symbol table pointer from last disassembly
@@ -66,7 +64,6 @@
class Branch : public PCDependentDisassembly
{
protected:
- typedef TheISA::Addr Addr;
/// Displacement to target address (signed).
int32_t disp;
@@ -90,7 +87,6 @@
class Jump : public PCDependentDisassembly
{
protected:
- typedef TheISA::Addr Addr;
/// Displacement to target address (signed).
int32_t disp;
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index 2da37b2..f47e90f 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -56,7 +56,7 @@
{
typedef uint32_t MachInst;
- typedef uint64_t Addr;
+// typedef uint64_t Addr;
typedef uint8_t RegIndex;
enum {
diff --git a/arch/alpha/stacktrace.hh b/arch/alpha/stacktrace.hh
index 2119090..1d8d97a 100644
--- a/arch/alpha/stacktrace.hh
+++ b/arch/alpha/stacktrace.hh
@@ -37,8 +37,6 @@
class ProcessInfo
{
- protected:
- typedef TheISA::Addr Addr;
private:
ExecContext *xc;
@@ -59,7 +57,6 @@
class StackTrace
{
protected:
- typedef TheISA::Addr Addr;
typedef TheISA::MachInst MachInst;
private:
ExecContext *xc;
diff --git a/arch/alpha/vtophys.hh b/arch/alpha/vtophys.hh
index 988f050..95430ce 100644
--- a/arch/alpha/vtophys.hh
+++ b/arch/alpha/vtophys.hh
@@ -35,16 +35,16 @@
class PhysicalMemory;
AlphaISA::PageTableEntry
-kernel_pte_lookup(PhysicalMemory *pmem, AlphaISA::Addr ptbr, AlphaISA::VAddr vaddr);
+kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, AlphaISA::VAddr vaddr);
-AlphaISA::Addr vtophys(PhysicalMemory *xc, AlphaISA::Addr vaddr);
-AlphaISA::Addr vtophys(ExecContext *xc, AlphaISA::Addr vaddr);
-uint8_t *vtomem(ExecContext *xc, AlphaISA::Addr vaddr, size_t len);
-uint8_t *ptomem(ExecContext *xc, AlphaISA::Addr paddr, size_t len);
+Addr vtophys(PhysicalMemory *xc, Addr vaddr);
+Addr vtophys(ExecContext *xc, Addr vaddr);
+uint8_t *vtomem(ExecContext *xc, Addr vaddr, size_t len);
+uint8_t *ptomem(ExecContext *xc, Addr paddr, size_t len);
-void CopyOut(ExecContext *xc, void *dst, AlphaISA::Addr src, size_t len);
-void CopyIn(ExecContext *xc, AlphaISA::Addr dst, void *src, size_t len);
-void CopyString(ExecContext *xc, char *dst, AlphaISA::Addr vaddr, size_t maxlen);
+void CopyOut(ExecContext *xc, void *dst, Addr src, size_t len);
+void CopyIn(ExecContext *xc, Addr dst, void *src, size_t len);
+void CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen);
#endif // __ARCH_ALPHA_VTOPHYS_H__
diff --git a/base/loader/object_file.hh b/base/loader/object_file.hh
index e90f938..3c8659e 100644
--- a/base/loader/object_file.hh
+++ b/base/loader/object_file.hh
@@ -37,7 +37,6 @@
class ObjectFile
{
public:
- typedef TheISA::Addr Addr;
enum Arch {
UnknownArch,
diff --git a/base/loader/symtab.hh b/base/loader/symtab.hh
index 38b4cde..ebcda13 100644
--- a/base/loader/symtab.hh
+++ b/base/loader/symtab.hh
@@ -37,9 +37,8 @@
class Checkpoint;
class SymbolTable
{
- typedef TheISA::Addr Addr;
public:
- typedef std::map<TheISA::Addr, std::string> ATable;
+ typedef std::map<Addr, std::string> ATable;
typedef std::map<std::string, Addr> STable;
private:
diff --git a/base/remote_gdb.hh b/base/remote_gdb.hh
index 126d5f6..b7abf51 100644
--- a/base/remote_gdb.hh
+++ b/base/remote_gdb.hh
@@ -44,7 +44,6 @@
class RemoteGDB
{
protected:
- typedef TheISA::Addr Addr;
typedef TheISA::MachInst MachInst;
private:
friend void debugger();
diff --git a/cpu/base.hh b/cpu/base.hh
index 311b50f..d5764d4 100644
--- a/cpu/base.hh
+++ b/cpu/base.hh
@@ -48,7 +48,6 @@
class BaseCPU : public SimObject
{
protected:
- typedef TheISA::Addr Addr;
// CPU's clock period in terms of the number of ticks of curTime.
Tick clock;
diff --git a/cpu/base_dyn_inst.hh b/cpu/base_dyn_inst.hh
index dd429fc..84fd540 100644
--- a/cpu/base_dyn_inst.hh
+++ b/cpu/base_dyn_inst.hh
@@ -62,8 +62,6 @@
/// Binary machine instruction type.
typedef TheISA::MachInst MachInst;
- /// Memory address type.
- typedef TheISA::Addr Addr;
/// Logical register index type.
typedef TheISA::RegIndex RegIndex;
/// Integer register index type.
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 3c6bad3..3fa7d07 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -69,7 +69,6 @@
{
protected:
typedef TheISA::RegFile RegFile;
- typedef TheISA::Addr Addr;
typedef TheISA::MachInst MachInst;
typedef TheISA::MiscRegFile MiscRegFile;
public:
diff --git a/cpu/exetrace.hh b/cpu/exetrace.hh
index d37c48d..67d042e 100644
--- a/cpu/exetrace.hh
+++ b/cpu/exetrace.hh
@@ -46,7 +46,6 @@
class InstRecord : public Record
{
protected:
- typedef TheISA::Addr Addr;
typedef TheISA::IntRegFile IntRegFile;
// The following fields are initialized by the constructor and
@@ -172,7 +171,7 @@
InstRecord *
getInstRecord(Tick cycle, ExecContext *xc, BaseCPU *cpu,
const StaticInstPtr staticInst,
- TheISA::Addr pc, int thread = 0)
+ Addr pc, int thread = 0)
{
if (DTRACE(InstExec) &&
(InstRecord::traceMisspec() || !xc->misspeculating())) {
diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh
index 76a89ff..7abcf01 100644
--- a/cpu/memtest/memtest.hh
+++ b/cpu/memtest/memtest.hh
@@ -42,8 +42,6 @@
class ExecContext;
class MemTest : public SimObject
{
- protected:
- typedef TheISA::Addr Addr;
public:
MemTest(const std::string &name,
diff --git a/cpu/o3/2bit_local_pred.hh b/cpu/o3/2bit_local_pred.hh
index 78efe1e..97433e5 100644
--- a/cpu/o3/2bit_local_pred.hh
+++ b/cpu/o3/2bit_local_pred.hh
@@ -35,8 +35,6 @@
class DefaultBP
{
- protected:
- typedef TheISA::Addr Addr;
public:
/**
* Default branch predictor constructor.
diff --git a/cpu/o3/alpha_cpu.hh b/cpu/o3/alpha_cpu.hh
index bf3556b..2be70f5 100644
--- a/cpu/o3/alpha_cpu.hh
+++ b/cpu/o3/alpha_cpu.hh
@@ -40,7 +40,6 @@
class AlphaFullCPU : public FullO3CPU<Impl>
{
protected:
- typedef AlphaISA::Addr Addr;
typedef TheISA::IntReg IntReg;
public:
typedef typename Impl::Params Params;
diff --git a/cpu/o3/alpha_dyn_inst.hh b/cpu/o3/alpha_dyn_inst.hh
index 22be2aa..b113d94 100644
--- a/cpu/o3/alpha_dyn_inst.hh
+++ b/cpu/o3/alpha_dyn_inst.hh
@@ -50,8 +50,6 @@
/** Binary machine instruction type. */
typedef TheISA::MachInst MachInst;
- /** Memory address type. */
- typedef TheISA::Addr Addr;
/** Logical register index type. */
typedef TheISA::RegIndex RegIndex;
/** Integer register index type. */
diff --git a/cpu/o3/bpred_unit.hh b/cpu/o3/bpred_unit.hh
index c874f9e..0a77b83 100644
--- a/cpu/o3/bpred_unit.hh
+++ b/cpu/o3/bpred_unit.hh
@@ -53,8 +53,6 @@
template<class Impl>
class TwobitBPredUnit
{
- protected:
- typedef TheISA::Addr Addr;
public:
typedef typename Impl::Params Params;
typedef typename Impl::DynInstPtr DynInstPtr;
diff --git a/cpu/o3/btb.hh b/cpu/o3/btb.hh
index f443ddb..77bdc32 100644
--- a/cpu/o3/btb.hh
+++ b/cpu/o3/btb.hh
@@ -34,8 +34,6 @@
class DefaultBTB
{
- protected:
- typedef TheISA::Addr Addr;
private:
struct BTBEntry
{
diff --git a/cpu/o3/decode.hh b/cpu/o3/decode.hh
index bae9a70..5b9a0f8 100644
--- a/cpu/o3/decode.hh
+++ b/cpu/o3/decode.hh
@@ -49,9 +49,6 @@
typedef typename CPUPol::DecodeStruct DecodeStruct;
typedef typename CPUPol::TimeStruct TimeStruct;
- // Typedefs from the ISA.
- typedef TheISA::Addr Addr;
-
public:
// The only time decode will become blocked is if dispatch becomes
// blocked, which means IQ or ROB is probably full.
diff --git a/cpu/o3/fetch.hh b/cpu/o3/fetch.hh
index e4d374c..82a6cd8 100644
--- a/cpu/o3/fetch.hh
+++ b/cpu/o3/fetch.hh
@@ -61,7 +61,6 @@
/** Typedefs from ISA. */
typedef TheISA::MachInst MachInst;
- typedef TheISA::Addr Addr;
public:
enum Status {
diff --git a/cpu/o3/ras.hh b/cpu/o3/ras.hh
index fd7f5fe..46d9818 100644
--- a/cpu/o3/ras.hh
+++ b/cpu/o3/ras.hh
@@ -34,8 +34,6 @@
class ReturnAddrStack
{
- protected:
- typedef TheISA::Addr Addr;
public:
ReturnAddrStack(unsigned numEntries);
diff --git a/cpu/o3/regfile.hh b/cpu/o3/regfile.hh
index 655a3ca..021f9b0 100644
--- a/cpu/o3/regfile.hh
+++ b/cpu/o3/regfile.hh
@@ -53,7 +53,6 @@
class PhysRegFile
{
protected:
- typedef TheISA::Addr Addr;
typedef TheISA::IntReg IntReg;
typedef TheISA::FloatReg FloatReg;
typedef TheISA::MiscRegFile MiscRegFile;
diff --git a/cpu/o3/rename.hh b/cpu/o3/rename.hh
index 9781480..07b4429 100644
--- a/cpu/o3/rename.hh
+++ b/cpu/o3/rename.hh
@@ -61,7 +61,6 @@
typedef typename CPUPol::RenameMap RenameMap;
// Typedefs from the ISA.
- typedef TheISA::Addr Addr;
typedef TheISA::RegIndex RegIndex;
public:
diff --git a/cpu/o3/store_set.hh b/cpu/o3/store_set.hh
index c67d30f..5a885d8 100644
--- a/cpu/o3/store_set.hh
+++ b/cpu/o3/store_set.hh
@@ -36,8 +36,6 @@
class StoreSet
{
- protected:
- typedef TheISA::Addr Addr;
public:
typedef unsigned SSID;
diff --git a/cpu/o3/tournament_pred.hh b/cpu/o3/tournament_pred.hh
index 6cfd24c..cb93c2f 100644
--- a/cpu/o3/tournament_pred.hh
+++ b/cpu/o3/tournament_pred.hh
@@ -35,8 +35,6 @@
class TournamentBP
{
- protected:
- typedef TheISA::Addr Addr;
public:
/**
* Default branch predictor constructor.
diff --git a/cpu/pc_event.cc b/cpu/pc_event.cc
index 7a29486..83fbc3e 100644
--- a/cpu/pc_event.cc
+++ b/cpu/pc_event.cc
@@ -136,14 +136,14 @@
#if FULL_SYSTEM
extern "C"
void
-sched_break_pc_sys(System *sys, TheISA::Addr addr)
+sched_break_pc_sys(System *sys, Addr addr)
{
new BreakPCEvent(&sys->pcEventQueue, "debug break", addr, true);
}
extern "C"
void
-sched_break_pc(TheISA::Addr addr)
+sched_break_pc(Addr addr)
{
for (vector<System *>::iterator sysi = System::systemList.begin();
sysi != System::systemList.end(); ++sysi) {
diff --git a/cpu/pc_event.hh b/cpu/pc_event.hh
index 3033a3c..7fa3902 100644
--- a/cpu/pc_event.hh
+++ b/cpu/pc_event.hh
@@ -39,7 +39,6 @@
class PCEvent
{
protected:
- typedef TheISA::Addr Addr;
static const Addr badpc = MemReq::inval_addr;
protected:
@@ -65,7 +64,6 @@
class PCEventQueue
{
protected:
- typedef TheISA::Addr Addr;
typedef PCEvent * record_t;
class MapCompare {
public:
@@ -134,7 +132,6 @@
class BreakPCEvent : public PCEvent
{
protected:
- typedef TheISA::Addr Addr;
bool remove;
public:
diff --git a/cpu/profile.hh b/cpu/profile.hh
index b55f87a..18061f9 100644
--- a/cpu/profile.hh
+++ b/cpu/profile.hh
@@ -37,8 +37,6 @@
class ProfileNode
{
- protected:
- typedef TheISA::Addr Addr;
private:
friend class FunctionProfile;
@@ -59,8 +57,6 @@
class Callback;
class FunctionProfile
{
- public:
- typedef TheISA::Addr Addr;
private:
Callback *reset;
const SymbolTable *symtab;
diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh
index 1ff14df..5106dcf 100644
--- a/cpu/static_inst.hh
+++ b/cpu/static_inst.hh
@@ -229,8 +229,6 @@
/// Binary machine instruction type.
typedef TheISA::MachInst MachInst;
- /// Memory address type.
- typedef TheISA::Addr Addr;
/// Logical register index type.
typedef TheISA::RegIndex RegIndex;
diff --git a/cpu/trace/opt_cpu.hh b/cpu/trace/opt_cpu.hh
index 704dc09..f816917 100644
--- a/cpu/trace/opt_cpu.hh
+++ b/cpu/trace/opt_cpu.hh
@@ -49,8 +49,6 @@
*/
class OptCPU : public SimObject
{
- protected:
- typedef TheISA::Addr Addr;
private:
typedef int RefIndex;
diff --git a/cpu/trace/reader/itx_reader.hh b/cpu/trace/reader/itx_reader.hh
index e402b2d..a16a080 100644
--- a/cpu/trace/reader/itx_reader.hh
+++ b/cpu/trace/reader/itx_reader.hh
@@ -46,8 +46,6 @@
*/
class ITXReader : public MemTraceReader
{
- protected:
- typedef TheISA::Addr Addr;
private:
/** Trace file. */
FILE *trace;
diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh
index 32888c8..a656ca4 100644
--- a/dev/ide_disk.hh
+++ b/dev/ide_disk.hh
@@ -188,8 +188,6 @@
class IdeDisk : public SimObject
{
protected:
- typedef TheISA::Addr Addr;
- protected:
/** The IDE controller for this disk. */
IdeController *ctrl;
/** The DMA interface to use for transfers */
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index a100bf7..c8d9685 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -53,8 +53,6 @@
*/
class PciConfigData : public SimObject
{
- protected:
- typedef TheISA::Addr Addr;
public:
/**
* Constructor to initialize the devices config space to 0.
diff --git a/dev/platform.hh b/dev/platform.hh
index 8781025..1ee6454 100644
--- a/dev/platform.hh
+++ b/dev/platform.hh
@@ -44,8 +44,6 @@
class Platform : public SimObject
{
- protected:
- typedef TheISA::Addr Addr;
public:
/** Pointer to the interrupt controller */
IntrControl *intrctrl;
diff --git a/dev/simple_disk.hh b/dev/simple_disk.hh
index f68d5bf..57f81c5 100644
--- a/dev/simple_disk.hh
+++ b/dev/simple_disk.hh
@@ -44,8 +44,6 @@
*/
class SimpleDisk : public SimObject
{
- protected:
- typedef TheISA::Addr Addr;
public:
typedef uint64_t baddr_t;
diff --git a/dev/sinicreg.hh b/dev/sinicreg.hh
index 1378e07..fc1f4c0 100644
--- a/dev/sinicreg.hh
+++ b/dev/sinicreg.hh
@@ -163,7 +163,7 @@
/* namespace Regs */ }
inline const Regs::Info&
-regInfo(TheISA::Addr daddr)
+regInfo(Addr daddr)
{
static Regs::Info invalid = { 0, false, false, "invalid" };
static Regs::Info info [] = {
@@ -199,7 +199,7 @@
}
inline bool
-regValid(TheISA::Addr daddr)
+regValid(Addr daddr)
{
if (daddr > Regs::Size)
return false;
diff --git a/dev/tsunami.hh b/dev/tsunami.hh
index 79b561e..7fd91d5 100644
--- a/dev/tsunami.hh
+++ b/dev/tsunami.hh
@@ -55,8 +55,6 @@
class Tsunami : public Platform
{
- protected:
- typedef TheISA::Addr Addr;
public:
/** Max number of CPUs in a Tsunami */
static const int Max_CPUs = 64;
diff --git a/kern/kernel_stats.hh b/kern/kernel_stats.hh
index 3e4fdf9..273a56e 100644
--- a/kern/kernel_stats.hh
+++ b/kern/kernel_stats.hh
@@ -50,8 +50,6 @@
class Binning
{
- protected:
- typedef TheISA::Addr Addr;
private:
std::string myname;
System *system;
@@ -126,8 +124,6 @@
class Statistics : public Serializable
{
- protected:
- typedef TheISA::Addr Addr;
private:
friend class Binning;
diff --git a/kern/linux/aligned.hh b/kern/linux/aligned.hh
index 137f650..18d1b43 100644
--- a/kern/linux/aligned.hh
+++ b/kern/linux/aligned.hh
@@ -37,7 +37,7 @@
#if __GNUC__ == 3 && __GNUC_MINOR__ != 3
typedef uint64_t uint64_ta __attribute__ ((aligned (8))) ;
typedef int64_t int64_ta __attribute__ ((aligned (8))) ;
-typedef TheISA::Addr Addr_a __attribute__ ((aligned (8))) ;
+typedef Addr Addr_a __attribute__ ((aligned (8))) ;
#else
#define uint64_ta uint64_t __attribute__ ((aligned (8)))
#define int64_ta int64_t __attribute__ ((aligned (8)))
diff --git a/kern/linux/linux.hh b/kern/linux/linux.hh
index bac6d6a..0dbccf5 100644
--- a/kern/linux/linux.hh
+++ b/kern/linux/linux.hh
@@ -53,9 +53,6 @@
///
class Linux {
- protected:
- typedef TheISA::Addr Addr;
-
public:
//@{
diff --git a/kern/linux/linux_threadinfo.hh b/kern/linux/linux_threadinfo.hh
index f201883..a1c378d 100644
--- a/kern/linux/linux_threadinfo.hh
+++ b/kern/linux/linux_threadinfo.hh
@@ -37,8 +37,6 @@
class ThreadInfo
{
- protected:
- typedef TheISA::Addr Addr;
private:
ExecContext *xc;
diff --git a/kern/tru64/mbuf.hh b/kern/tru64/mbuf.hh
index 7b84b5e..9342485 100644
--- a/kern/tru64/mbuf.hh
+++ b/kern/tru64/mbuf.hh
@@ -35,35 +35,35 @@
namespace tru64 {
struct m_hdr {
- TheISA::Addr mh_next; // 0x00
- TheISA::Addr mh_nextpkt; // 0x08
- TheISA::Addr mh_data; // 0x10
+ Addr mh_next; // 0x00
+ Addr mh_nextpkt; // 0x08
+ Addr mh_data; // 0x10
int32_t mh_len; // 0x18
int32_t mh_type; // 0x1C
int32_t mh_flags; // 0x20
int32_t mh_pad0; // 0x24
- TheISA::Addr mh_foo[4]; // 0x28, 0x30, 0x38, 0x40
+ Addr mh_foo[4]; // 0x28, 0x30, 0x38, 0x40
};
struct pkthdr {
int32_t len;
int32_t protocolSum;
- TheISA::Addr rcvif;
+ Addr rcvif;
};
struct m_ext {
- TheISA::Addr ext_buf; // 0x00
- TheISA::Addr ext_free; // 0x08
+ Addr ext_buf; // 0x00
+ Addr ext_free; // 0x08
uint32_t ext_size; // 0x10
uint32_t ext_pad0; // 0x14
- TheISA::Addr ext_arg; // 0x18
+ Addr ext_arg; // 0x18
struct ext_refq {
- TheISA::Addr forw, back; // 0x20, 0x28
+ Addr forw, back; // 0x20, 0x28
} ext_ref;
- TheISA::Addr uiomove_f; // 0x30
+ Addr uiomove_f; // 0x30
int32_t protocolSum; // 0x38
int32_t bytesSummed; // 0x3C
- TheISA::Addr checksum; // 0x40
+ Addr checksum; // 0x40
};
struct mbuf {
diff --git a/kern/tru64/tru64.hh b/kern/tru64/tru64.hh
index a21cd6b..1579a54 100644
--- a/kern/tru64/tru64.hh
+++ b/kern/tru64/tru64.hh
@@ -392,7 +392,7 @@
/// For stack_create.
struct vm_stack {
// was void *
- TheISA::Addr address; //!< address hint
+ Addr address; //!< address hint
size_t rsize; //!< red zone size
size_t ysize; //!< yellow zone size
size_t gsize; //!< green zone size
@@ -401,7 +401,7 @@
uint64_t align; //!< address alignment
uint64_t flags; //!< MAP_FIXED etc.
// was struct memalloc_attr *
- TheISA::Addr attr; //!< allocation policy
+ Addr attr; //!< allocation policy
uint64_t reserved; //!< reserved
};
@@ -433,7 +433,7 @@
sigset_t sigmask; //!< thread signal mask
sigset_t sig; //!< thread pending mask
// struct nxm_pth_state *
- TheISA::Addr pth_id; //!< out-of-line state
+ Addr pth_id; //!< out-of-line state
int flags; //!< shared flags
#define US_SIGSTACK 0x1 // thread called sigaltstack
#define US_ONSTACK 0x2 // thread is running on altstack
@@ -469,12 +469,12 @@
int nxm_set_quantum; //!< quantum reset value
int nxm_sysevent; //!< syscall state
// struct nxm_upcall *
- TheISA::Addr nxm_uc_ret; //!< stack ptr of null thread
+ Addr nxm_uc_ret; //!< stack ptr of null thread
// void *
- TheISA::Addr nxm_tid; //!< scheduler's thread id
+ Addr nxm_tid; //!< scheduler's thread id
int64_t nxm_va; //!< page fault address
// struct nxm_pth_state *
- TheISA::Addr nxm_pthid; //!< id of null thread
+ Addr nxm_pthid; //!< id of null thread
uint64_t nxm_bound_pcs_count; //!< bound PCS thread count
int64_t pad[2]; //!< pad
};
@@ -502,9 +502,9 @@
int nxm_nslots_per_rad; //!< max number of VP slots per RAD
int nxm_nrads; //!< max number of RADs
// nxm_slot_state_t *
- TheISA::Addr nxm_slot_state; //!< per-VP slot state
+ Addr nxm_slot_state; //!< per-VP slot state
// struct nxm_shared *
- TheISA::Addr nxm_rad[1]; //!< per-RAD shared areas
+ Addr nxm_rad[1]; //!< per-RAD shared areas
};
/// For nxm_thread_create.
@@ -523,7 +523,7 @@
int policy; //!< policy
int signal_type; //!< signal_type
// void *
- TheISA::Addr pthid; //!< pthid
+ Addr pthid; //!< pthid
sigset_t sigmask; //!< sigmask
/// Initial register values.
struct {
@@ -539,7 +539,7 @@
/// memory space. Used by stat(), fstat(), and lstat().
template <class T>
static void
- copyOutStatBuf(FunctionalMemory *mem, TheISA::Addr addr, global_stat *host)
+ copyOutStatBuf(FunctionalMemory *mem, Addr addr, global_stat *host)
{
TypedBufferArg<T> tgt(addr);
@@ -565,7 +565,7 @@
/// memory space. Used by statfs() and fstatfs().
template <class T>
static void
- copyOutStatfsBuf(FunctionalMemory *mem, TheISA::Addr addr, global_statfs *host)
+ copyOutStatfsBuf(FunctionalMemory *mem, Addr addr, global_statfs *host)
{
TypedBufferArg<T> tgt(addr);
@@ -589,13 +589,13 @@
class F64 {
public:
- static void copyOutStatBuf(FunctionalMemory *mem, TheISA::Addr addr,
+ static void copyOutStatBuf(FunctionalMemory *mem, Addr addr,
global_stat *host)
{
Tru64::copyOutStatBuf<Tru64::F64_stat>(mem, addr, host);
}
- static void copyOutStatfsBuf(FunctionalMemory *mem, TheISA::Addr addr,
+ static void copyOutStatfsBuf(FunctionalMemory *mem, Addr addr,
global_statfs *host)
{
Tru64::copyOutStatfsBuf<Tru64::F64_statfs>(mem, addr, host);
@@ -604,13 +604,13 @@
class PreF64 {
public:
- static void copyOutStatBuf(FunctionalMemory *mem, TheISA::Addr addr,
+ static void copyOutStatBuf(FunctionalMemory *mem, Addr addr,
global_stat *host)
{
Tru64::copyOutStatBuf<Tru64::pre_F64_stat>(mem, addr, host);
}
- static void copyOutStatfsBuf(FunctionalMemory *mem, TheISA::Addr addr,
+ static void copyOutStatfsBuf(FunctionalMemory *mem, Addr addr,
global_statfs *host)
{
Tru64::copyOutStatfsBuf<Tru64::pre_F64_statfs>(mem, addr, host);
@@ -622,7 +622,7 @@
/// the simulated memory space. Used by pre_F64_stat(),
/// pre_F64_fstat(), and pre_F64_lstat().
static void
- copyOutPreF64StatBuf(FunctionalMemory *mem, TheISA::Addr addr, struct stat *host)
+ copyOutPreF64StatBuf(FunctionalMemory *mem, Addr addr, struct stat *host)
{
TypedBufferArg<Tru64::pre_F64_stat> tgt(addr);
@@ -653,7 +653,6 @@
getdirentriesFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
#ifdef __CYGWIN__
panic("getdirent not implemented on cygwin!");
#else
@@ -809,7 +808,6 @@
nxm_task_initFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
TypedBufferArg<Tru64::nxm_task_attr> attrp(xc->getSyscallArg(0));
TypedBufferArg<Addr> configptr_ptr(xc->getSyscallArg(1));
@@ -939,7 +937,6 @@
nxm_thread_createFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
TypedBufferArg<Tru64::nxm_thread_attr> attrp(xc->getSyscallArg(0));
TypedBufferArg<uint64_t> kidp(xc->getSyscallArg(1));
int thread_index = xc->getSyscallArg(2);
@@ -1079,7 +1076,6 @@
nxm_blockFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr uaddr = xc->getSyscallArg(0);
uint64_t val = xc->getSyscallArg(1);
uint64_t secs = xc->getSyscallArg(2);
@@ -1101,7 +1097,6 @@
nxm_unblockFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr uaddr = xc->getSyscallArg(0);
cout << xc->cpu->name() << ": nxm_unblock "
@@ -1129,7 +1124,7 @@
/// Activate exec context waiting on a channel. Just activate one
/// by default.
static int
- activate_waiting_context(TheISA::Addr uaddr, Process *process,
+ activate_waiting_context(Addr uaddr, Process *process,
bool activate_all = false)
{
int num_activated = 0;
@@ -1158,7 +1153,7 @@
/// M5 hacked-up lock acquire.
static void
- m5_lock_mutex(TheISA::Addr uaddr, Process *process, ExecContext *xc)
+ m5_lock_mutex(Addr uaddr, Process *process, ExecContext *xc)
{
TypedBufferArg<uint64_t> lockp(uaddr);
@@ -1177,7 +1172,7 @@
/// M5 unlock call.
static void
- m5_unlock_mutex(TheISA::Addr uaddr, Process *process, ExecContext *xc)
+ m5_unlock_mutex(Addr uaddr, Process *process, ExecContext *xc)
{
TypedBufferArg<uint64_t> lockp(uaddr);
@@ -1199,7 +1194,6 @@
m5_mutex_lockFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr uaddr = xc->getSyscallArg(0);
m5_lock_mutex(uaddr, process, xc);
@@ -1215,7 +1209,6 @@
m5_mutex_trylockFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr uaddr = xc->getSyscallArg(0);
TypedBufferArg<uint64_t> lockp(uaddr);
@@ -1236,7 +1229,6 @@
m5_mutex_unlockFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr uaddr = xc->getSyscallArg(0);
m5_unlock_mutex(uaddr, process, xc);
@@ -1249,7 +1241,6 @@
m5_cond_signalFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr cond_addr = xc->getSyscallArg(0);
// Wake up one process waiting on the condition variable.
@@ -1263,7 +1254,6 @@
m5_cond_broadcastFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr cond_addr = xc->getSyscallArg(0);
activate_waiting_context(cond_addr, process, true);
@@ -1276,7 +1266,6 @@
m5_cond_waitFunc(SyscallDesc *desc, int callnum, Process *process,
ExecContext *xc)
{
- using TheISA::Addr;
Addr cond_addr = xc->getSyscallArg(0);
Addr lock_addr = xc->getSyscallArg(1);
TypedBufferArg<uint64_t> condp(cond_addr);
diff --git a/sim/host.hh b/sim/host.hh
index ef70080..f7e64f2 100644
--- a/sim/host.hh
+++ b/sim/host.hh
@@ -54,4 +54,12 @@
*/
typedef int64_t Tick;
+/**
+ * Address type
+ * This will probably be moved somewhere else in the near future.
+ * This should be at least as big as the biggest address width in use
+ * in the system, which will probably be 64 bits.
+ */
+typedef uint64_t Addr;
+
#endif // __HOST_H__
diff --git a/sim/process.hh b/sim/process.hh
index 6e91bb0..71b7d02 100644
--- a/sim/process.hh
+++ b/sim/process.hh
@@ -52,7 +52,6 @@
class Process : public SimObject
{
protected:
- typedef TheISA::Addr Addr;
typedef TheISA::RegFile RegFile;
typedef TheISA::MachInst MachInst;
public:
diff --git a/sim/pseudo_inst.hh b/sim/pseudo_inst.hh
index 07bdd70..3857f20 100644
--- a/sim/pseudo_inst.hh
+++ b/sim/pseudo_inst.hh
@@ -52,8 +52,8 @@
void dumpstats(ExecContext *xc, Tick delay, Tick period);
void dumpresetstats(ExecContext *xc, Tick delay, Tick period);
void m5checkpoint(ExecContext *xc, Tick delay, Tick period);
- uint64_t readfile(ExecContext *xc, TheISA::Addr vaddr, uint64_t len, uint64_t offset);
+ uint64_t readfile(ExecContext *xc, Addr vaddr, uint64_t len, uint64_t offset);
void debugbreak(ExecContext *xc);
void switchcpu(ExecContext *xc);
- void addsymbol(ExecContext *xc, TheISA::Addr addr, TheISA::Addr symbolAddr);
+ void addsymbol(ExecContext *xc, Addr addr, Addr symbolAddr);
}
diff --git a/sim/syscall_emul.hh b/sim/syscall_emul.hh
index 4e4f9a5..f49248d 100644
--- a/sim/syscall_emul.hh
+++ b/sim/syscall_emul.hh
@@ -90,9 +90,6 @@
class BaseBufferArg {
- protected:
- typedef TheISA::Addr Addr;
-
public:
BaseBufferArg(Addr _addr, int _size) : addr(_addr), size(_size)
@@ -643,7 +640,7 @@
SyscallReturn
mmapFunc(SyscallDesc *desc, int num, Process *p, ExecContext *xc)
{
- TheISA::Addr start = xc->getSyscallArg(0);
+ Addr start = xc->getSyscallArg(0);
uint64_t length = xc->getSyscallArg(1);
// int prot = xc->getSyscallArg(2);
int flags = xc->getSyscallArg(3);
diff --git a/sim/system.hh b/sim/system.hh
index 4bf33a1..aa697c0 100644
--- a/sim/system.hh
+++ b/sim/system.hh
@@ -50,8 +50,6 @@
class System : public SimObject
{
- protected:
- typedef TheISA::Addr Addr;
public:
MemoryController *memctrl;
PhysicalMemory *physmem;
diff --git a/sim/vptr.hh b/sim/vptr.hh
index 1baa006..7ec4360 100644
--- a/sim/vptr.hh
+++ b/sim/vptr.hh
@@ -37,8 +37,6 @@
template <class T>
class VPtr
{
- protected:
- typedef TheISA::Addr Addr;
public:
typedef T Type;
