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gem5
/
arm
/
gem5
/
0358ccee23072eef0b6448e3170457037682a452
/
.
/
src
/
python
/
m5
/
objects
/
IntrControl.py
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from
m5
.
SimObject
import
SimObject
from
m5
.
params
import
*
from
m5
.
proxy
import
*
class
IntrControl
(
SimObject
):
type
=
'IntrControl'
cpu
=
Param
.
BaseCPU
(
Parent
.
cpu
[
0
],
"the cpu"
)