arch-arm: Add haveEL pseudocode function

This patch introduces the ARM pseudocode haveEL function
into gem5.

Change-Id: I0d96070959e8e13773eb7fa9964894ec0ff2cac2
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/6162
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc
index 1fe7060..097a87b 100644
--- a/src/arch/arm/system.cc
+++ b/src/arch/arm/system.cc
@@ -225,6 +225,23 @@
     return FullSystem? getArmSystem(tc)->highestEL() : EL1;
 }
 
+bool
+ArmSystem::haveEL(ThreadContext *tc, ExceptionLevel el)
+{
+    switch (el) {
+      case EL0:
+      case EL1:
+        return true;
+      case EL2:
+        return haveVirtualization(tc);
+      case EL3:
+        return haveSecurity(tc);
+      default:
+        warn("Unimplemented Exception Level\n");
+        return false;
+    }
+}
+
 Addr
 ArmSystem::resetAddr64(ThreadContext *tc)
 {
diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh
index b81ec05..46103f4 100644
--- a/src/arch/arm/system.hh
+++ b/src/arch/arm/system.hh
@@ -259,8 +259,11 @@
      */
     static ExceptionLevel highestEL(ThreadContext *tc);
 
-    /** Returns the reset address if the highest implemented exception level for
-     * the system of a specific thread context is 64 bits (ARMv8)
+    /** Return true if the system implements a specific exception level */
+    static bool haveEL(ThreadContext *tc, ExceptionLevel el);
+
+    /** Returns the reset address if the highest implemented exception level
+     * for the system of a specific thread context is 64 bits (ARMv8)
      */
     static Addr resetAddr64(ThreadContext *tc);