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gem5
/
arm
/
gem5
/
a23ff5ac96782b1fc4dac8e6f21d90c1a2547e7a
/
.
/
python
/
m5
/
objects
/
IntrControl.py
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from
m5
import
*
class
IntrControl
(
SimObject
):
type
=
'IntrControl'
cpu
=
Param
.
BaseCPU
(
Parent
.
any
,
"the cpu"
)
