commit bd7eadb4670458044c7628dc67d94d50c3f7593d
author Matt Sinclair <mattdsinclair@gmail.com> Wed Dec 06 20:29:11 2017 -0500
committer Matt Sinclair <mattdsinclair@gmail.com> Fri Dec 08 04:05:58 2017 +0000
tree d56ccd3bea7765af275fdbfcdcdd6b4665775b2e
parent 66a55ce3ffd42663981a54144cfca311502f22b6

x86,misc: add additional info on faulting X86 instruction, fetched PC

Print faulting instruction for unmapped address panic in faults.cc
and print extra info about corresponding fetched PC in base.cc.

Change-Id: Id9e15d3e88df2ad6b809fb3cf9f6ae97e9e97e0f
Reviewed-on: https://gem5-review.googlesource.com/6461
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>

src/arch/x86/faults.cc

diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc
index 4198bcc..093926d 100644
--- a/src/arch/x86/faults.cc
+++ b/src/arch/x86/faults.cc
@@ -44,6 +44,7 @@
 
 #include "arch/x86/generated/decoder.hh"
 #include "arch/x86/isa_traits.hh"
+#include "base/loader/symtab.hh"
 #include "base/trace.hh"
 #include "cpu/thread_context.hh"
 #include "debug/Faults.hh"
@@ -161,7 +162,15 @@
                 modeStr = "write";
             else
                 modeStr = "read";
-            panic("Tried to %s unmapped address %#x.\n", modeStr, addr);
+
+            // print information about what we are panic'ing on
+            if (!inst) {
+                panic("Tried to %s unmapped address %#x.\n", modeStr, addr);
+            } else {
+                panic("Tried to %s unmapped address %#x.\nPC: %#x, Instr: %s",
+                      modeStr, addr, tc->pcState().pc(),
+                      inst->disassemble(tc->pcState().pc(), debugSymbolTable));
+            }
         }
     }
 

src/cpu/simple/base.cc

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 5c8eba6..1f12afb 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -475,13 +475,13 @@
     SimpleThread* thread = t_info.thread;
 
     Addr instAddr = thread->instAddr();
+    Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
 
     // set up memory request for instruction fetch
-    DPRINTF(Fetch, "Fetch: PC:%08p\n", instAddr);
+    DPRINTF(Fetch, "Fetch: Inst PC:%08p, Fetch PC:%08p\n", instAddr, fetchPC);
 
-    Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
-    req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH, instMasterId(),
-            instAddr);
+    req->setVirt(0, fetchPC, sizeof(MachInst), Request::INST_FETCH,
+                 instMasterId(), instAddr);
 }