| // Copyright (c) 2015 ARM Limited |
| // All rights reserved. |
| // |
| // The license below extends only to copyright in the software and shall |
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| // this software without specific prior written permission. |
| // |
| // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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| // Copyright 2009-2014 Sandia Coporation. Under the terms |
| // of Contract DE-AC04-94AL85000 with Sandia Corporation, the U.S. |
| // Government retains certain rights in this software. |
| // |
| // Copyright (c) 2009-2014, Sandia Corporation |
| // All rights reserved. |
| // |
| // For license information, see the LICENSE file in the current directory. |
| |
| #ifndef EXT_SST_GEM5_HH |
| #define EXT_SST_GEM5_HH |
| |
| #include <string> |
| #include <vector> |
| |
| #include <core/sst_config.h> |
| #include <core/component.h> |
| |
| #include <sim/simulate.hh> |
| |
| #include "ExtMaster.hh" |
| #include "ExtSlave.hh" |
| |
| namespace SST { |
| namespace gem5 { |
| |
| class gem5Component : public SST::Component, |
| public ExternalSlave::Handler, |
| public ExternalMaster::Handler { |
| private: |
| |
| Output dbg; |
| Output info; |
| uint64_t sim_cycles; |
| uint64_t clocks_processed; |
| |
| std::vector<ExtMaster*> masters; |
| std::vector<ExtSlave*> slaves; |
| |
| void splitCommandArgs(std::string &cmd, std::vector<char*> &args); |
| void initPython(int argc, char *argv[]); |
| |
| public: |
| gem5Component(ComponentId_t id, Params ¶ms); |
| ~gem5Component(); |
| virtual void init(unsigned); |
| virtual void setup(); |
| virtual void finish(); |
| bool clockTick(Cycle_t); |
| |
| virtual ExternalMaster::Port *getExternalPort( |
| const std::string &name, ExternalMaster &owner, |
| const std::string &port_data); |
| |
| virtual ExternalSlave::Port *getExternalPort( |
| const std::string &name, ExternalSlave &owner, |
| const std::string &port_data); |
| }; |
| |
| } |
| } |
| |
| #endif |