arch-arm: Turn dc ivac to dc civac when some conditions are met
The Arm ARM defines that at EL1 a data cache invalidate instruction
performs a data cache clean and invalidate operation if all of the
* EL2 is implemented,
* HCR_EL2.VM is set to 1,
* SCR_EL3.NS is set to 1 or EL3 is not implemented.
This changeset implements this behavior.
Reviewed-by: Andreas Sandberg <email@example.com>
Maintainer: Andreas Sandberg <firstname.lastname@example.org>
1 file changed