| # -*- mode:python -*- | |
| # Copyright (c) 2006 The Regents of The University of Michigan | |
| # All rights reserved. | |
| # | |
| # Redistribution and use in source and binary forms, with or without | |
| # modification, are permitted provided that the following conditions are | |
| # met: redistributions of source code must retain the above copyright | |
| # notice, this list of conditions and the following disclaimer; | |
| # redistributions in binary form must reproduce the above copyright | |
| # notice, this list of conditions and the following disclaimer in the | |
| # documentation and/or other materials provided with the distribution; | |
| # neither the name of the copyright holders nor the names of its | |
| # contributors may be used to endorse or promote products derived from | |
| # this software without specific prior written permission. | |
| # | |
| # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
| # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
| # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
| # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
| # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
| # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
| # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
| # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
| # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
| # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| # | |
| # Authors: Steve Reinhardt | |
| # Gabe Black | |
| Import('*') | |
| SimObject('Device.py') | |
| Source('io_device.cc') | |
| Source('isa_fake.cc') | |
| DebugFlag('IsaFake') | |
| if env['TARGET_ISA'] == 'null': | |
| Return() | |
| SimObject('BadDevice.py') | |
| SimObject('CopyEngine.py') | |
| SimObject('DiskImage.py') | |
| SimObject('Ethernet.py') | |
| SimObject('Ide.py') | |
| SimObject('Pci.py') | |
| SimObject('Platform.py') | |
| SimObject('SimpleDisk.py') | |
| SimObject('Terminal.py') | |
| SimObject('Uart.py') | |
| Source('baddev.cc') | |
| Source('copy_engine.cc') | |
| Source('disk_image.cc') | |
| Source('dma_device.cc') | |
| Source('etherbus.cc') | |
| Source('etherdevice.cc') | |
| Source('etherdump.cc') | |
| Source('etherint.cc') | |
| Source('etherlink.cc') | |
| Source('etherpkt.cc') | |
| Source('ethertap.cc') | |
| Source('i8254xGBe.cc') | |
| Source('ide_ctrl.cc') | |
| Source('ide_disk.cc') | |
| Source('intel_8254_timer.cc') | |
| Source('mc146818.cc') | |
| Source('ns_gige.cc') | |
| Source('pciconfigall.cc') | |
| Source('pcidev.cc') | |
| Source('pktfifo.cc') | |
| Source('platform.cc') | |
| Source('ps2.cc') | |
| Source('simple_disk.cc') | |
| Source('sinic.cc') | |
| Source('terminal.cc') | |
| Source('uart.cc') | |
| Source('uart8250.cc') | |
| DebugFlag('DiskImageRead') | |
| DebugFlag('DiskImageWrite') | |
| DebugFlag('DMA') | |
| DebugFlag('DMACopyEngine') | |
| DebugFlag('Ethernet') | |
| DebugFlag('EthernetCksum') | |
| DebugFlag('EthernetDMA') | |
| DebugFlag('EthernetData') | |
| DebugFlag('EthernetDesc') | |
| DebugFlag('EthernetEEPROM') | |
| DebugFlag('EthernetIntr') | |
| DebugFlag('EthernetPIO') | |
| DebugFlag('EthernetSM') | |
| DebugFlag('IdeCtrl') | |
| DebugFlag('IdeDisk') | |
| DebugFlag('Intel8254Timer') | |
| DebugFlag('MC146818') | |
| DebugFlag('PCIDEV') | |
| DebugFlag('PciConfigAll') | |
| DebugFlag('SimpleDisk') | |
| DebugFlag('SimpleDiskData') | |
| DebugFlag('Terminal') | |
| DebugFlag('TerminalVerbose') | |
| DebugFlag('Uart') | |
| CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ]) | |
| CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA', | |
| 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM', | |
| 'EthernetCksum', 'EthernetEEPROM' ]) | |
| CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc', | |
| 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ]) | |
| CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ]) |