OMAPDSS: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.
Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 77d6221..e3136ef 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -230,12 +230,12 @@
static inline void dispc_write_reg(const u16 idx, u32 val)
{
- __raw_writel(val, dispc.base + idx);
+ writel_relaxed(val, dispc.base + idx);
}
static inline u32 dispc_read_reg(const u16 idx)
{
- return __raw_readl(dispc.base + idx);
+ return readl_relaxed(dispc.base + idx);
}
static u32 mgr_fld_read(enum omap_channel channel, enum mgr_reg_fields regfld)
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index a820c37..1c6aef4 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -435,7 +435,7 @@
default: return;
}
- __raw_writel(val, base + idx.idx);
+ writel_relaxed(val, base + idx.idx);
}
static inline u32 dsi_read_reg(struct platform_device *dsidev,
@@ -451,7 +451,7 @@
default: return 0;
}
- return __raw_readl(base + idx.idx);
+ return readl_relaxed(base + idx.idx);
}
static void dsi_bus_lock(struct omap_dss_device *dssdev)
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 9a145da..a6b2fcd 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -103,12 +103,12 @@
static inline void dss_write_reg(const struct dss_reg idx, u32 val)
{
- __raw_writel(val, dss.base + idx.idx);
+ writel_relaxed(val, dss.base + idx.idx);
}
static inline u32 dss_read_reg(const struct dss_reg idx)
{
- return __raw_readl(dss.base + idx.idx);
+ return readl_relaxed(dss.base + idx.idx);
}
#define SR(reg) \
diff --git a/drivers/video/omap2/dss/hdmi.h b/drivers/video/omap2/dss/hdmi.h
index e25681f..d148b70 100644
--- a/drivers/video/omap2/dss/hdmi.h
+++ b/drivers/video/omap2/dss/hdmi.h
@@ -363,12 +363,12 @@
static inline void hdmi_write_reg(void __iomem *base_addr, const u16 idx,
u32 val)
{
- __raw_writel(val, base_addr + idx);
+ writel_relaxed(val, base_addr + idx);
}
static inline u32 hdmi_read_reg(void __iomem *base_addr, const u16 idx)
{
- return __raw_readl(base_addr + idx);
+ return readl_relaxed(base_addr + idx);
}
#define REG_FLD_MOD(base, idx, val, start, end) \
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index c8a81a2..7772e33 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -122,12 +122,12 @@
static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
{
- __raw_writel(val, rfbi.base + idx.idx);
+ writel_relaxed(val, rfbi.base + idx.idx);
}
static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
{
- return __raw_readl(rfbi.base + idx.idx);
+ return readl_relaxed(rfbi.base + idx.idx);
}
static int rfbi_runtime_get(void)
@@ -263,8 +263,8 @@
for (; h; --h) {
for (i = 0; i < w; ++i) {
const u8 __iomem *b = (const u8 __iomem *)pd;
- rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
- rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
+ rfbi_write_reg(RFBI_PARAM, readb_relaxed(b+1));
+ rfbi_write_reg(RFBI_PARAM, readb_relaxed(b+0));
++pd;
}
pd += horiz_offset;
@@ -277,9 +277,9 @@
for (; h; --h) {
for (i = 0; i < w; ++i) {
const u8 __iomem *b = (const u8 __iomem *)pd;
- rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
- rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
- rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
+ rfbi_write_reg(RFBI_PARAM, readb_relaxed(b+2));
+ rfbi_write_reg(RFBI_PARAM, readb_relaxed(b+1));
+ rfbi_write_reg(RFBI_PARAM, readb_relaxed(b+0));
++pd;
}
pd += horiz_offset;
@@ -291,7 +291,7 @@
for (; h; --h) {
for (i = 0; i < w; ++i) {
- rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
+ rfbi_write_reg(RFBI_PARAM, readw_relaxed(pd));
++pd;
}
pd += horiz_offset;
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index 2cd7f7e..92af50b 100644
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -309,12 +309,12 @@
static inline void venc_write_reg(int idx, u32 val)
{
- __raw_writel(val, venc.base + idx);
+ writel_relaxed(val, venc.base + idx);
}
static inline u32 venc_read_reg(int idx)
{
- u32 l = __raw_readl(venc.base + idx);
+ u32 l = readl_relaxed(venc.base + idx);
return l;
}
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
index fcb9e93..45fc52f 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -82,18 +82,18 @@
g = g * 64 / 256;
b = b * 32 / 256;
- __raw_writew((r << 11) | (g << 5) | (b << 0), p);
+ writew_relaxed((r << 11) | (g << 5) | (b << 0), p);
} else if (var->bits_per_pixel == 24) {
u8 __iomem *p = (u8 __iomem *)addr;
p += (y * line_len + x) * 3;
- __raw_writeb(b, p + 0);
- __raw_writeb(g, p + 1);
- __raw_writeb(r, p + 2);
+ writeb_relaxed(b, p + 0);
+ writeb_relaxed(g, p + 1);
+ writeb_relaxed(r, p + 2);
} else if (var->bits_per_pixel == 32) {
u32 __iomem *p = (u32 __iomem *)addr;
p += y * line_len + x;
- __raw_writel(color, p);
+ writel_relaxed(color, p);
}
}
diff --git a/drivers/video/omap2/vrfb.c b/drivers/video/omap2/vrfb.c
index f346b02..0324690 100644
--- a/drivers/video/omap2/vrfb.c
+++ b/drivers/video/omap2/vrfb.c
@@ -82,17 +82,17 @@
static void omap2_sms_write_rot_control(u32 val, unsigned ctx)
{
- __raw_writel(val, vrfb_base + SMS_ROT_CONTROL(ctx));
+ writel_relaxed(val, vrfb_base + SMS_ROT_CONTROL(ctx));
}
static void omap2_sms_write_rot_size(u32 val, unsigned ctx)
{
- __raw_writel(val, vrfb_base + SMS_ROT_SIZE(ctx));
+ writel_relaxed(val, vrfb_base + SMS_ROT_SIZE(ctx));
}
static void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx)
{
- __raw_writel(val, vrfb_base + SMS_ROT_PHYSICAL_BA(ctx));
+ writel_relaxed(val, vrfb_base + SMS_ROT_PHYSICAL_BA(ctx));
}
static inline void restore_hw_context(int ctx)
