ARM: Fix broken coherency for DMA ops
This fixes a problem with dc zva/WriteInvalidate testing on v7. The
The system has coherent I/O and the kernel needs to know this.
What would happen is the IO cache would hold DMA descriptor information
in Exclusive state and the core would send uncacheable requests that
effectively bypassed the coherence. The IO device would then act on
incoherent data.
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index e701a4d..d9c3cf6 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -22,6 +22,8 @@
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
+ if (arch_is_coherent())
+ return &arm_coherent_dma_ops;
return &arm_dma_ops;
}
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 4afb376..f0c2bc4 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -24,6 +24,10 @@
#include <mach/memory.h>
#endif
+#ifndef arch_is_coherent
+#define arch_is_coherent() 0
+#endif
+
/*
* Allow for constants defined here to be used from assembly code
* by prepending the UL suffix only with actual C code compilation.
