Add architecture timer in DTB for gem5 This change in conjunction with changeset 2258 in gem5 (patch queue) makes the architecture timer work. Signed-off-by: Rene de Jong <rene.dejong@arm.com> Signed-off-by: Chris Emmons <chris.emmons@arm.com>
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts index 078079e..ae0d683 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1-gem5.dts
@@ -127,14 +127,25 @@ }; */ + + timer { + compatible = "arm,cortex-a15-timer", + "arm,armv7-timer"; + interrupts = <1 13 0xff01>, + <1 14 0xff01>; + clocks = <&oscclk7>; + clock-names="apb_pclk"; + }; + + /** HACK : cortex-a9-twd-timer hack -- temporary fix */ - timer@2c080000 { + /*timer@2c080000 { compatible = "arm,cortex-a9-twd-timer"; reg = <0 0x2c080000 0 0x20>; interrupts = <1 13 0xf04>; clocks = <&oscclk7>; clock-names = "apb_pclk"; - }; + };*/ pmu { compatible = "arm,cortex-a15-pmu";