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| IBM Akebono board device tree |
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| The IBM Akebono board is a development board for the PPC476GTR SoC. |
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| 0) The root node |
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| Required properties: |
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| - model : "ibm,akebono". |
| - compatible : "ibm,akebono" , "ibm,476gtr". |
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| 1.a) The Secure Digital Host Controller Interface (SDHCI) node |
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| Represent the Secure Digital Host Controller Interfaces. |
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| Required properties: |
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| - compatible : should be "ibm,476gtr-sdhci","generic-sdhci". |
| - reg : should contain the SDHCI registers location and length. |
| - interrupt-parent : a phandle for the interrupt controller. |
| - interrupts : should contain the SDHCI interrupt. |
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| 1.b) The Advanced Host Controller Interface (AHCI) SATA node |
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| Represents the advanced host controller SATA interface. |
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| Required properties: |
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| - compatible : should be "ibm,476gtr-ahci". |
| - reg : should contain the AHCI registers location and length. |
| - interrupt-parent : a phandle for the interrupt controller. |
| - interrupts : should contain the AHCI interrupt. |
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| 1.c) The FPGA node |
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| The Akebono board stores some board information such as the revision |
| number in an FPGA which is represented by this node. |
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| Required properties: |
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| - compatible : should be "ibm,akebono-fpga". |
| - reg : should contain the FPGA registers location and length. |
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| 1.d) The AVR node |
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| The Akebono board has an Atmel AVR microprocessor attached to the I2C |
| bus as a power controller for the board. |
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| Required properties: |
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| - compatible : should be "ibm,akebono-avr". |
| - reg : should contain the I2C bus address for the AVR. |