| Allwinner sun4i USB PHY |
| ----------------------- |
| |
| Required properties: |
| - compatible : should be one of |
| * allwinner,sun4i-a10-usb-phy |
| * allwinner,sun5i-a13-usb-phy |
| * allwinner,sun6i-a31-usb-phy |
| * allwinner,sun7i-a20-usb-phy |
| - reg : a list of offset + length pairs |
| - reg-names : |
| * "phy_ctrl" |
| * "pmu1" |
| * "pmu2" for sun4i, sun6i or sun7i |
| - #phy-cells : from the generic phy bindings, must be 1 |
| - clocks : phandle + clock specifier for the phy clocks |
| - clock-names : |
| * "usb_phy" for sun4i, sun5i or sun7i |
| * "usb0_phy", "usb1_phy" and "usb2_phy" for sun6i |
| - resets : a list of phandle + reset specifier pairs |
| - reset-names : |
| * "usb0_reset" |
| * "usb1_reset" |
| * "usb2_reset" for sun4i, sun6i or sun7i |
| |
| Example: |
| usbphy: phy@0x01c13400 { |
| #phy-cells = <1>; |
| compatible = "allwinner,sun4i-a10-usb-phy"; |
| /* phy base regs, phy1 pmu reg, phy2 pmu reg */ |
| reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>; |
| reg-names = "phy_ctrl", "pmu1", "pmu2"; |
| clocks = <&usb_clk 8>; |
| clock-names = "usb_phy"; |
| resets = <&usb_clk 1>, <&usb_clk 2>; |
| reset-names = "usb1_reset", "usb2_reset"; |
| }; |
