| /* |
| * Copyright (c) 2012-2013, NVIDIA Corporation. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #include <linux/clk.h> |
| |
| #include "drm.h" |
| #include "gem.h" |
| #include "gr2d.h" |
| |
| struct gr2d { |
| struct tegra_drm_client client; |
| struct host1x_channel *channel; |
| struct clk *clk; |
| |
| DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS); |
| }; |
| |
| static inline struct gr2d *to_gr2d(struct tegra_drm_client *client) |
| { |
| return container_of(client, struct gr2d, client); |
| } |
| |
| static int gr2d_init(struct host1x_client *client) |
| { |
| struct tegra_drm_client *drm = host1x_to_drm_client(client); |
| struct tegra_drm *tegra = dev_get_drvdata(client->parent); |
| unsigned long flags = HOST1X_SYNCPT_HAS_BASE; |
| struct gr2d *gr2d = to_gr2d(drm); |
| |
| gr2d->channel = host1x_channel_request(client->dev); |
| if (!gr2d->channel) |
| return -ENOMEM; |
| |
| client->syncpts[0] = host1x_syncpt_request(client->dev, flags); |
| if (!client->syncpts[0]) { |
| host1x_channel_free(gr2d->channel); |
| return -ENOMEM; |
| } |
| |
| return tegra_drm_register_client(tegra, drm); |
| } |
| |
| static int gr2d_exit(struct host1x_client *client) |
| { |
| struct tegra_drm_client *drm = host1x_to_drm_client(client); |
| struct tegra_drm *tegra = dev_get_drvdata(client->parent); |
| struct gr2d *gr2d = to_gr2d(drm); |
| int err; |
| |
| err = tegra_drm_unregister_client(tegra, drm); |
| if (err < 0) |
| return err; |
| |
| host1x_syncpt_free(client->syncpts[0]); |
| host1x_channel_free(gr2d->channel); |
| |
| return 0; |
| } |
| |
| static const struct host1x_client_ops gr2d_client_ops = { |
| .init = gr2d_init, |
| .exit = gr2d_exit, |
| }; |
| |
| static int gr2d_open_channel(struct tegra_drm_client *client, |
| struct tegra_drm_context *context) |
| { |
| struct gr2d *gr2d = to_gr2d(client); |
| |
| context->channel = host1x_channel_get(gr2d->channel); |
| if (!context->channel) |
| return -ENOMEM; |
| |
| return 0; |
| } |
| |
| static void gr2d_close_channel(struct tegra_drm_context *context) |
| { |
| host1x_channel_put(context->channel); |
| } |
| |
| static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset) |
| { |
| struct gr2d *gr2d = dev_get_drvdata(dev); |
| |
| switch (class) { |
| case HOST1X_CLASS_HOST1X: |
| if (offset == 0x2b) |
| return 1; |
| |
| break; |
| |
| case HOST1X_CLASS_GR2D: |
| case HOST1X_CLASS_GR2D_SB: |
| if (offset >= GR2D_NUM_REGS) |
| break; |
| |
| if (test_bit(offset, gr2d->addr_regs)) |
| return 1; |
| |
| break; |
| } |
| |
| return 0; |
| } |
| |
| static const struct tegra_drm_client_ops gr2d_ops = { |
| .open_channel = gr2d_open_channel, |
| .close_channel = gr2d_close_channel, |
| .is_addr_reg = gr2d_is_addr_reg, |
| .submit = tegra_drm_submit, |
| }; |
| |
| static const struct of_device_id gr2d_match[] = { |
| { .compatible = "nvidia,tegra30-gr2d" }, |
| { .compatible = "nvidia,tegra20-gr2d" }, |
| { }, |
| }; |
| |
| static const u32 gr2d_addr_regs[] = { |
| GR2D_UA_BASE_ADDR, |
| GR2D_VA_BASE_ADDR, |
| GR2D_PAT_BASE_ADDR, |
| GR2D_DSTA_BASE_ADDR, |
| GR2D_DSTB_BASE_ADDR, |
| GR2D_DSTC_BASE_ADDR, |
| GR2D_SRCA_BASE_ADDR, |
| GR2D_SRCB_BASE_ADDR, |
| GR2D_SRC_BASE_ADDR_SB, |
| GR2D_DSTA_BASE_ADDR_SB, |
| GR2D_DSTB_BASE_ADDR_SB, |
| GR2D_UA_BASE_ADDR_SB, |
| GR2D_VA_BASE_ADDR_SB, |
| }; |
| |
| static int gr2d_probe(struct platform_device *pdev) |
| { |
| struct device *dev = &pdev->dev; |
| struct host1x_syncpt **syncpts; |
| struct gr2d *gr2d; |
| unsigned int i; |
| int err; |
| |
| gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL); |
| if (!gr2d) |
| return -ENOMEM; |
| |
| syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL); |
| if (!syncpts) |
| return -ENOMEM; |
| |
| gr2d->clk = devm_clk_get(dev, NULL); |
| if (IS_ERR(gr2d->clk)) { |
| dev_err(dev, "cannot get clock\n"); |
| return PTR_ERR(gr2d->clk); |
| } |
| |
| err = clk_prepare_enable(gr2d->clk); |
| if (err) { |
| dev_err(dev, "cannot turn on clock\n"); |
| return err; |
| } |
| |
| INIT_LIST_HEAD(&gr2d->client.base.list); |
| gr2d->client.base.ops = &gr2d_client_ops; |
| gr2d->client.base.dev = dev; |
| gr2d->client.base.class = HOST1X_CLASS_GR2D; |
| gr2d->client.base.syncpts = syncpts; |
| gr2d->client.base.num_syncpts = 1; |
| |
| INIT_LIST_HEAD(&gr2d->client.list); |
| gr2d->client.ops = &gr2d_ops; |
| |
| err = host1x_client_register(&gr2d->client.base); |
| if (err < 0) { |
| dev_err(dev, "failed to register host1x client: %d\n", err); |
| clk_disable_unprepare(gr2d->clk); |
| return err; |
| } |
| |
| /* initialize address register map */ |
| for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++) |
| set_bit(gr2d_addr_regs[i], gr2d->addr_regs); |
| |
| platform_set_drvdata(pdev, gr2d); |
| |
| return 0; |
| } |
| |
| static int gr2d_remove(struct platform_device *pdev) |
| { |
| struct gr2d *gr2d = platform_get_drvdata(pdev); |
| int err; |
| |
| err = host1x_client_unregister(&gr2d->client.base); |
| if (err < 0) { |
| dev_err(&pdev->dev, "failed to unregister host1x client: %d\n", |
| err); |
| return err; |
| } |
| |
| clk_disable_unprepare(gr2d->clk); |
| |
| return 0; |
| } |
| |
| struct platform_driver tegra_gr2d_driver = { |
| .driver = { |
| .name = "tegra-gr2d", |
| .of_match_table = gr2d_match, |
| }, |
| .probe = gr2d_probe, |
| .remove = gr2d_remove, |
| }; |