| /* |
| * Allwinner A13 SoCs pinctrl driver. |
| * |
| * Copyright (C) 2014 Maxime Ripard |
| * |
| * Maxime Ripard <maxime.ripard@free-electrons.com> |
| * |
| * This file is licensed under the terms of the GNU General Public |
| * License version 2. This program is licensed "as is" without any |
| * warranty of any kind, whether express or implied. |
| */ |
| |
| #include <linux/module.h> |
| #include <linux/platform_device.h> |
| #include <linux/of.h> |
| #include <linux/of_device.h> |
| #include <linux/pinctrl/pinctrl.h> |
| |
| #include "pinctrl-sunxi.h" |
| |
| static const struct sunxi_desc_pin sun5i_a13_pins[] = { |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "pwm"), |
| SUNXI_FUNCTION_IRQ(0x6, 16)), /* EINT16 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "ir0"), /* TX */ |
| SUNXI_FUNCTION_IRQ(0x6, 17)), /* EINT17 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "ir0"), /* RX */ |
| SUNXI_FUNCTION_IRQ(0x6, 18)), /* EINT18 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */ |
| SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ |
| SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ |
| SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ |
| SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */ |
| SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0")), /* NRE */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ |
| SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */ |
| SUNXI_FUNCTION(0x4, "uart3")), /* RTS */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D2 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D3 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D4 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D5 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D6 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D7 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D10 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D11 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D12 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D13 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D14 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D15 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D18 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D19 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* DE */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* PCLK */ |
| SUNXI_FUNCTION(0x4, "spi2"), /* CS0 */ |
| SUNXI_FUNCTION_IRQ(0x6, 14)), /* EINT14 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* MCLK */ |
| SUNXI_FUNCTION(0x4, "spi2"), /* CLK */ |
| SUNXI_FUNCTION_IRQ(0x6, 15)), /* EINT15 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* HSYNC */ |
| SUNXI_FUNCTION(0x4, "spi2")), /* MOSI */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* VSYNC */ |
| SUNXI_FUNCTION(0x4, "spi2")), /* MISO */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D0 */ |
| SUNXI_FUNCTION(0x4, "mmc2")), /* D0 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D1 */ |
| SUNXI_FUNCTION(0x4, "mmc2")), /* D1 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D2 */ |
| SUNXI_FUNCTION(0x4, "mmc2")), /* D2 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D3 */ |
| SUNXI_FUNCTION(0x4, "mmc2")), /* D3 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D4 */ |
| SUNXI_FUNCTION(0x4, "mmc2")), /* CMD */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D5 */ |
| SUNXI_FUNCTION(0x4, "mmc2")), /* CLK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D6 */ |
| SUNXI_FUNCTION(0x4, "uart1")), /* TX */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x3, "csi0"), /* D7 */ |
| SUNXI_FUNCTION(0x4, "uart1")), /* RX */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc0")), /* D1 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc0")), /* D0 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc0")), /* CLK */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc0")), /* CMD */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc0")), /* D3 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc0")), /* D2 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION_IRQ(0x6, 0)), /* EINT0 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION_IRQ(0x6, 1)), /* EINT1 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION_IRQ(0x6, 2)), /* EINT2 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ |
| SUNXI_FUNCTION(0x4, "uart1"), /* TX */ |
| SUNXI_FUNCTION_IRQ(0x6, 3)), /* EINT3 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ |
| SUNXI_FUNCTION(0x4, "uart1"), /* RX */ |
| SUNXI_FUNCTION_IRQ(0x6, 4)), /* EINT4 */ |
| /* Hole */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ |
| SUNXI_FUNCTION(0x3, "uart3"), /* TX */ |
| SUNXI_FUNCTION_IRQ(0x6, 9)), /* EINT9 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ |
| SUNXI_FUNCTION(0x3, "uart3"), /* RX */ |
| SUNXI_FUNCTION_IRQ(0x6, 10)), /* EINT10 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ |
| SUNXI_FUNCTION(0x3, "uart3"), /* CTS */ |
| SUNXI_FUNCTION_IRQ(0x6, 11)), /* EINT11 */ |
| SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12), |
| SUNXI_FUNCTION(0x0, "gpio_in"), |
| SUNXI_FUNCTION(0x1, "gpio_out"), |
| SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ |
| SUNXI_FUNCTION(0x3, "uart3"), /* RTS */ |
| SUNXI_FUNCTION_IRQ(0x6, 12)), /* EINT12 */ |
| }; |
| |
| static const struct sunxi_pinctrl_desc sun5i_a13_pinctrl_data = { |
| .pins = sun5i_a13_pins, |
| .npins = ARRAY_SIZE(sun5i_a13_pins), |
| }; |
| |
| static int sun5i_a13_pinctrl_probe(struct platform_device *pdev) |
| { |
| return sunxi_pinctrl_init(pdev, |
| &sun5i_a13_pinctrl_data); |
| } |
| |
| static struct of_device_id sun5i_a13_pinctrl_match[] = { |
| { .compatible = "allwinner,sun5i-a13-pinctrl", }, |
| {} |
| }; |
| MODULE_DEVICE_TABLE(of, sun5i_a13_pinctrl_match); |
| |
| static struct platform_driver sun5i_a13_pinctrl_driver = { |
| .probe = sun5i_a13_pinctrl_probe, |
| .driver = { |
| .name = "sun5i-a13-pinctrl", |
| .owner = THIS_MODULE, |
| .of_match_table = sun5i_a13_pinctrl_match, |
| }, |
| }; |
| module_platform_driver(sun5i_a13_pinctrl_driver); |
| |
| MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com"); |
| MODULE_DESCRIPTION("Allwinner A13 pinctrl driver"); |
| MODULE_LICENSE("GPL"); |
