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gem5
/
arm
/
linux-arm64-legacy
/
c6c88bbde4d8b2ffe9886b7130b2e23781d424e5
/
.
/
include
/
asm-arm
/
cache.h
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/*
* linux/include/asm-arm/cache.h
*/
#ifndef
__ASMARM_CACHE_H
#define
__ASMARM_CACHE_H
#define
L1_CACHE_SHIFT
5
#define
L1_CACHE_BYTES
(
1
<<
L1_CACHE_SHIFT
)
/*
* largest L1 which this arch supports
*/
#define
L1_CACHE_SHIFT_MAX
5
#endif