Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-tegra/gpio.c |
| 3 | * |
| 4 | * Copyright (c) 2010 Google, Inc |
| 5 | * |
| 6 | * Author: |
| 7 | * Erik Gilling <konkers@google.com> |
| 8 | * |
| 9 | * This software is licensed under the terms of the GNU General Public |
| 10 | * License version 2, as published by the Free Software Foundation, and |
| 11 | * may be copied, distributed, and modified under those terms. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | */ |
| 19 | |
Thierry Reding | 641d034 | 2013-01-21 11:09:01 +0100 | [diff] [blame] | 20 | #include <linux/err.h> |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 21 | #include <linux/init.h> |
| 22 | #include <linux/irq.h> |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 23 | #include <linux/interrupt.h> |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 24 | #include <linux/io.h> |
| 25 | #include <linux/gpio.h> |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 26 | #include <linux/of_device.h> |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
| 28 | #include <linux/module.h> |
Stephen Warren | 6f74dc9 | 2012-01-04 08:39:37 +0000 | [diff] [blame] | 29 | #include <linux/irqdomain.h> |
Catalin Marinas | de88cbb | 2013-01-18 15:31:37 +0000 | [diff] [blame] | 30 | #include <linux/irqchip/chained_irq.h> |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 31 | #include <linux/pinctrl/consumer.h> |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 32 | #include <linux/pm.h> |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 33 | |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 34 | #define GPIO_BANK(x) ((x) >> 5) |
| 35 | #define GPIO_PORT(x) (((x) >> 3) & 0x3) |
| 36 | #define GPIO_BIT(x) ((x) & 0x7) |
| 37 | |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 38 | #define GPIO_REG(x) (GPIO_BANK(x) * tegra_gpio_bank_stride + \ |
| 39 | GPIO_PORT(x) * 4) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 40 | |
| 41 | #define GPIO_CNF(x) (GPIO_REG(x) + 0x00) |
| 42 | #define GPIO_OE(x) (GPIO_REG(x) + 0x10) |
| 43 | #define GPIO_OUT(x) (GPIO_REG(x) + 0X20) |
| 44 | #define GPIO_IN(x) (GPIO_REG(x) + 0x30) |
| 45 | #define GPIO_INT_STA(x) (GPIO_REG(x) + 0x40) |
| 46 | #define GPIO_INT_ENB(x) (GPIO_REG(x) + 0x50) |
| 47 | #define GPIO_INT_LVL(x) (GPIO_REG(x) + 0x60) |
| 48 | #define GPIO_INT_CLR(x) (GPIO_REG(x) + 0x70) |
| 49 | |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 50 | #define GPIO_MSK_CNF(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x00) |
| 51 | #define GPIO_MSK_OE(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x10) |
| 52 | #define GPIO_MSK_OUT(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0X20) |
| 53 | #define GPIO_MSK_INT_STA(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x40) |
| 54 | #define GPIO_MSK_INT_ENB(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x50) |
| 55 | #define GPIO_MSK_INT_LVL(x) (GPIO_REG(x) + tegra_gpio_upper_offset + 0x60) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 56 | |
| 57 | #define GPIO_INT_LVL_MASK 0x010101 |
| 58 | #define GPIO_INT_LVL_EDGE_RISING 0x000101 |
| 59 | #define GPIO_INT_LVL_EDGE_FALLING 0x000100 |
| 60 | #define GPIO_INT_LVL_EDGE_BOTH 0x010100 |
| 61 | #define GPIO_INT_LVL_LEVEL_HIGH 0x000001 |
| 62 | #define GPIO_INT_LVL_LEVEL_LOW 0x000000 |
| 63 | |
| 64 | struct tegra_gpio_bank { |
| 65 | int bank; |
| 66 | int irq; |
| 67 | spinlock_t lvl_lock[4]; |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 68 | #ifdef CONFIG_PM_SLEEP |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 69 | u32 cnf[4]; |
| 70 | u32 out[4]; |
| 71 | u32 oe[4]; |
| 72 | u32 int_enb[4]; |
| 73 | u32 int_lvl[4]; |
Joseph Lo | 203f31c | 2013-04-03 19:31:44 +0800 | [diff] [blame] | 74 | u32 wake_enb[4]; |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 75 | #endif |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 76 | }; |
| 77 | |
Stephen Warren | df231f2 | 2013-10-16 13:25:33 -0600 | [diff] [blame] | 78 | static struct device *dev; |
Stephen Warren | bdc93a7 | 2012-02-13 16:21:15 -0700 | [diff] [blame] | 79 | static struct irq_domain *irq_domain; |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 80 | static void __iomem *regs; |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 81 | static u32 tegra_gpio_bank_count; |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 82 | static u32 tegra_gpio_bank_stride; |
| 83 | static u32 tegra_gpio_upper_offset; |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 84 | static struct tegra_gpio_bank *tegra_gpio_banks; |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 85 | |
| 86 | static inline void tegra_gpio_writel(u32 val, u32 reg) |
| 87 | { |
| 88 | __raw_writel(val, regs + reg); |
| 89 | } |
| 90 | |
| 91 | static inline u32 tegra_gpio_readl(u32 reg) |
| 92 | { |
| 93 | return __raw_readl(regs + reg); |
| 94 | } |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 95 | |
| 96 | static int tegra_gpio_compose(int bank, int port, int bit) |
| 97 | { |
| 98 | return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7); |
| 99 | } |
| 100 | |
| 101 | static void tegra_gpio_mask_write(u32 reg, int gpio, int value) |
| 102 | { |
| 103 | u32 val; |
| 104 | |
| 105 | val = 0x100 << GPIO_BIT(gpio); |
| 106 | if (value) |
| 107 | val |= 1 << GPIO_BIT(gpio); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 108 | tegra_gpio_writel(val, reg); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 109 | } |
| 110 | |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 111 | static void tegra_gpio_enable(int gpio) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 112 | { |
| 113 | tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 1); |
| 114 | } |
| 115 | |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 116 | static void tegra_gpio_disable(int gpio) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 117 | { |
| 118 | tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 0); |
| 119 | } |
| 120 | |
Axel Lin | 924a098 | 2012-11-08 10:45:24 +0800 | [diff] [blame] | 121 | static int tegra_gpio_request(struct gpio_chip *chip, unsigned offset) |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 122 | { |
| 123 | return pinctrl_request_gpio(offset); |
| 124 | } |
| 125 | |
Axel Lin | 924a098 | 2012-11-08 10:45:24 +0800 | [diff] [blame] | 126 | static void tegra_gpio_free(struct gpio_chip *chip, unsigned offset) |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 127 | { |
| 128 | pinctrl_free_gpio(offset); |
| 129 | tegra_gpio_disable(offset); |
| 130 | } |
| 131 | |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 132 | static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 133 | { |
| 134 | tegra_gpio_mask_write(GPIO_MSK_OUT(offset), offset, value); |
| 135 | } |
| 136 | |
| 137 | static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 138 | { |
Laxman Dewangan | 195812e | 2012-11-09 11:34:20 +0530 | [diff] [blame] | 139 | /* If gpio is in output mode then read from the out value */ |
| 140 | if ((tegra_gpio_readl(GPIO_OE(offset)) >> GPIO_BIT(offset)) & 1) |
| 141 | return (tegra_gpio_readl(GPIO_OUT(offset)) >> |
| 142 | GPIO_BIT(offset)) & 0x1; |
| 143 | |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 144 | return (tegra_gpio_readl(GPIO_IN(offset)) >> GPIO_BIT(offset)) & 0x1; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
| 148 | { |
| 149 | tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 0); |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 150 | tegra_gpio_enable(offset); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset, |
| 155 | int value) |
| 156 | { |
| 157 | tegra_gpio_set(chip, offset, value); |
| 158 | tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 1); |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 159 | tegra_gpio_enable(offset); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 160 | return 0; |
| 161 | } |
| 162 | |
Stephen Warren | 438a99c | 2011-08-23 00:39:56 +0100 | [diff] [blame] | 163 | static int tegra_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
| 164 | { |
Stephen Warren | bdc93a7 | 2012-02-13 16:21:15 -0700 | [diff] [blame] | 165 | return irq_find_mapping(irq_domain, offset); |
Stephen Warren | 438a99c | 2011-08-23 00:39:56 +0100 | [diff] [blame] | 166 | } |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 167 | |
| 168 | static struct gpio_chip tegra_gpio_chip = { |
| 169 | .label = "tegra-gpio", |
Stephen Warren | 3e215d0 | 2012-02-18 01:04:55 -0700 | [diff] [blame] | 170 | .request = tegra_gpio_request, |
| 171 | .free = tegra_gpio_free, |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 172 | .direction_input = tegra_gpio_direction_input, |
| 173 | .get = tegra_gpio_get, |
| 174 | .direction_output = tegra_gpio_direction_output, |
| 175 | .set = tegra_gpio_set, |
Stephen Warren | 438a99c | 2011-08-23 00:39:56 +0100 | [diff] [blame] | 176 | .to_irq = tegra_gpio_to_irq, |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 177 | .base = 0, |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 178 | }; |
| 179 | |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 180 | static void tegra_gpio_irq_ack(struct irq_data *d) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 181 | { |
Stephen Warren | 6f74dc9 | 2012-01-04 08:39:37 +0000 | [diff] [blame] | 182 | int gpio = d->hwirq; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 183 | |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 184 | tegra_gpio_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 185 | } |
| 186 | |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 187 | static void tegra_gpio_irq_mask(struct irq_data *d) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 188 | { |
Stephen Warren | 6f74dc9 | 2012-01-04 08:39:37 +0000 | [diff] [blame] | 189 | int gpio = d->hwirq; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 190 | |
| 191 | tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0); |
| 192 | } |
| 193 | |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 194 | static void tegra_gpio_irq_unmask(struct irq_data *d) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 195 | { |
Stephen Warren | 6f74dc9 | 2012-01-04 08:39:37 +0000 | [diff] [blame] | 196 | int gpio = d->hwirq; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 197 | |
| 198 | tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1); |
| 199 | } |
| 200 | |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 201 | static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 202 | { |
Stephen Warren | 6f74dc9 | 2012-01-04 08:39:37 +0000 | [diff] [blame] | 203 | int gpio = d->hwirq; |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 204 | struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 205 | int port = GPIO_PORT(gpio); |
| 206 | int lvl_type; |
| 207 | int val; |
| 208 | unsigned long flags; |
Stephen Warren | df231f2 | 2013-10-16 13:25:33 -0600 | [diff] [blame] | 209 | int ret; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 210 | |
| 211 | switch (type & IRQ_TYPE_SENSE_MASK) { |
| 212 | case IRQ_TYPE_EDGE_RISING: |
| 213 | lvl_type = GPIO_INT_LVL_EDGE_RISING; |
| 214 | break; |
| 215 | |
| 216 | case IRQ_TYPE_EDGE_FALLING: |
| 217 | lvl_type = GPIO_INT_LVL_EDGE_FALLING; |
| 218 | break; |
| 219 | |
| 220 | case IRQ_TYPE_EDGE_BOTH: |
| 221 | lvl_type = GPIO_INT_LVL_EDGE_BOTH; |
| 222 | break; |
| 223 | |
| 224 | case IRQ_TYPE_LEVEL_HIGH: |
| 225 | lvl_type = GPIO_INT_LVL_LEVEL_HIGH; |
| 226 | break; |
| 227 | |
| 228 | case IRQ_TYPE_LEVEL_LOW: |
| 229 | lvl_type = GPIO_INT_LVL_LEVEL_LOW; |
| 230 | break; |
| 231 | |
| 232 | default: |
| 233 | return -EINVAL; |
| 234 | } |
| 235 | |
Stephen Warren | df231f2 | 2013-10-16 13:25:33 -0600 | [diff] [blame] | 236 | ret = gpio_lock_as_irq(&tegra_gpio_chip, gpio); |
| 237 | if (ret) { |
| 238 | dev_err(dev, "unable to lock Tegra GPIO %d as IRQ\n", gpio); |
| 239 | return ret; |
| 240 | } |
| 241 | |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 242 | spin_lock_irqsave(&bank->lvl_lock[port], flags); |
| 243 | |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 244 | val = tegra_gpio_readl(GPIO_INT_LVL(gpio)); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 245 | val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio)); |
| 246 | val |= lvl_type << GPIO_BIT(gpio); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 247 | tegra_gpio_writel(val, GPIO_INT_LVL(gpio)); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 248 | |
| 249 | spin_unlock_irqrestore(&bank->lvl_lock[port], flags); |
| 250 | |
Stephen Warren | d941136 | 2012-03-19 10:31:58 -0600 | [diff] [blame] | 251 | tegra_gpio_mask_write(GPIO_MSK_OE(gpio), gpio, 0); |
| 252 | tegra_gpio_enable(gpio); |
| 253 | |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 254 | if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 255 | __irq_set_handler_locked(d->irq, handle_level_irq); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 256 | else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 257 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 258 | |
| 259 | return 0; |
| 260 | } |
| 261 | |
Stephen Warren | df231f2 | 2013-10-16 13:25:33 -0600 | [diff] [blame] | 262 | static void tegra_gpio_irq_shutdown(struct irq_data *d) |
| 263 | { |
| 264 | int gpio = d->hwirq; |
| 265 | |
| 266 | gpio_unlock_as_irq(&tegra_gpio_chip, gpio); |
| 267 | } |
| 268 | |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 269 | static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) |
| 270 | { |
| 271 | struct tegra_gpio_bank *bank; |
| 272 | int port; |
| 273 | int pin; |
| 274 | int unmasked = 0; |
Will Deacon | 9802294 | 2011-02-21 13:58:10 +0000 | [diff] [blame] | 275 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 276 | |
Will Deacon | 9802294 | 2011-02-21 13:58:10 +0000 | [diff] [blame] | 277 | chained_irq_enter(chip, desc); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 278 | |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 279 | bank = irq_get_handler_data(irq); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 280 | |
| 281 | for (port = 0; port < 4; port++) { |
| 282 | int gpio = tegra_gpio_compose(bank->bank, port, 0); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 283 | unsigned long sta = tegra_gpio_readl(GPIO_INT_STA(gpio)) & |
| 284 | tegra_gpio_readl(GPIO_INT_ENB(gpio)); |
| 285 | u32 lvl = tegra_gpio_readl(GPIO_INT_LVL(gpio)); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 286 | |
| 287 | for_each_set_bit(pin, &sta, 8) { |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 288 | tegra_gpio_writel(1 << pin, GPIO_INT_CLR(gpio)); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 289 | |
| 290 | /* if gpio is edge triggered, clear condition |
| 291 | * before executing the hander so that we don't |
| 292 | * miss edges |
| 293 | */ |
| 294 | if (lvl & (0x100 << pin)) { |
| 295 | unmasked = 1; |
Will Deacon | 9802294 | 2011-02-21 13:58:10 +0000 | [diff] [blame] | 296 | chained_irq_exit(chip, desc); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 297 | } |
| 298 | |
| 299 | generic_handle_irq(gpio_to_irq(gpio + pin)); |
| 300 | } |
| 301 | } |
| 302 | |
| 303 | if (!unmasked) |
Will Deacon | 9802294 | 2011-02-21 13:58:10 +0000 | [diff] [blame] | 304 | chained_irq_exit(chip, desc); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 305 | |
| 306 | } |
| 307 | |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 308 | #ifdef CONFIG_PM_SLEEP |
| 309 | static int tegra_gpio_resume(struct device *dev) |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 310 | { |
| 311 | unsigned long flags; |
Colin Cross | c8309ef | 2011-03-30 00:24:43 -0700 | [diff] [blame] | 312 | int b; |
| 313 | int p; |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 314 | |
| 315 | local_irq_save(flags); |
| 316 | |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 317 | for (b = 0; b < tegra_gpio_bank_count; b++) { |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 318 | struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; |
| 319 | |
| 320 | for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { |
| 321 | unsigned int gpio = (b<<5) | (p<<3); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 322 | tegra_gpio_writel(bank->cnf[p], GPIO_CNF(gpio)); |
| 323 | tegra_gpio_writel(bank->out[p], GPIO_OUT(gpio)); |
| 324 | tegra_gpio_writel(bank->oe[p], GPIO_OE(gpio)); |
| 325 | tegra_gpio_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio)); |
| 326 | tegra_gpio_writel(bank->int_enb[p], GPIO_INT_ENB(gpio)); |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 327 | } |
| 328 | } |
| 329 | |
| 330 | local_irq_restore(flags); |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 331 | return 0; |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 332 | } |
| 333 | |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 334 | static int tegra_gpio_suspend(struct device *dev) |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 335 | { |
| 336 | unsigned long flags; |
Colin Cross | c8309ef | 2011-03-30 00:24:43 -0700 | [diff] [blame] | 337 | int b; |
| 338 | int p; |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 339 | |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 340 | local_irq_save(flags); |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 341 | for (b = 0; b < tegra_gpio_bank_count; b++) { |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 342 | struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; |
| 343 | |
| 344 | for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { |
| 345 | unsigned int gpio = (b<<5) | (p<<3); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 346 | bank->cnf[p] = tegra_gpio_readl(GPIO_CNF(gpio)); |
| 347 | bank->out[p] = tegra_gpio_readl(GPIO_OUT(gpio)); |
| 348 | bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio)); |
| 349 | bank->int_enb[p] = tegra_gpio_readl(GPIO_INT_ENB(gpio)); |
| 350 | bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio)); |
Joseph Lo | 203f31c | 2013-04-03 19:31:44 +0800 | [diff] [blame] | 351 | |
| 352 | /* Enable gpio irq for wake up source */ |
| 353 | tegra_gpio_writel(bank->wake_enb[p], |
| 354 | GPIO_INT_ENB(gpio)); |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 355 | } |
| 356 | } |
| 357 | local_irq_restore(flags); |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 358 | return 0; |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 359 | } |
| 360 | |
Joseph Lo | 203f31c | 2013-04-03 19:31:44 +0800 | [diff] [blame] | 361 | static int tegra_gpio_irq_set_wake(struct irq_data *d, unsigned int enable) |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 362 | { |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 363 | struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); |
Joseph Lo | 203f31c | 2013-04-03 19:31:44 +0800 | [diff] [blame] | 364 | int gpio = d->hwirq; |
| 365 | u32 port, bit, mask; |
| 366 | |
| 367 | port = GPIO_PORT(gpio); |
| 368 | bit = GPIO_BIT(gpio); |
| 369 | mask = BIT(bit); |
| 370 | |
| 371 | if (enable) |
| 372 | bank->wake_enb[port] |= mask; |
| 373 | else |
| 374 | bank->wake_enb[port] &= ~mask; |
| 375 | |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 376 | return irq_set_irq_wake(bank->irq, enable); |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 377 | } |
| 378 | #endif |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 379 | |
| 380 | static struct irq_chip tegra_gpio_irq_chip = { |
| 381 | .name = "GPIO", |
Lennert Buytenhek | 37337a8 | 2010-11-29 11:14:46 +0100 | [diff] [blame] | 382 | .irq_ack = tegra_gpio_irq_ack, |
| 383 | .irq_mask = tegra_gpio_irq_mask, |
| 384 | .irq_unmask = tegra_gpio_irq_unmask, |
| 385 | .irq_set_type = tegra_gpio_irq_set_type, |
Stephen Warren | df231f2 | 2013-10-16 13:25:33 -0600 | [diff] [blame] | 386 | .irq_shutdown = tegra_gpio_irq_shutdown, |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 387 | #ifdef CONFIG_PM_SLEEP |
Joseph Lo | 203f31c | 2013-04-03 19:31:44 +0800 | [diff] [blame] | 388 | .irq_set_wake = tegra_gpio_irq_set_wake, |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 389 | #endif |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 390 | }; |
| 391 | |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 392 | static const struct dev_pm_ops tegra_gpio_pm_ops = { |
| 393 | SET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume) |
| 394 | }; |
| 395 | |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 396 | struct tegra_gpio_soc_config { |
| 397 | u32 bank_stride; |
| 398 | u32 upper_offset; |
| 399 | }; |
| 400 | |
| 401 | static struct tegra_gpio_soc_config tegra20_gpio_config = { |
| 402 | .bank_stride = 0x80, |
| 403 | .upper_offset = 0x800, |
| 404 | }; |
| 405 | |
| 406 | static struct tegra_gpio_soc_config tegra30_gpio_config = { |
| 407 | .bank_stride = 0x100, |
| 408 | .upper_offset = 0x80, |
| 409 | }; |
| 410 | |
Jingoo Han | 30373b6 | 2014-05-07 18:07:42 +0900 | [diff] [blame] | 411 | static const struct of_device_id tegra_gpio_of_match[] = { |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 412 | { .compatible = "nvidia,tegra30-gpio", .data = &tegra30_gpio_config }, |
| 413 | { .compatible = "nvidia,tegra20-gpio", .data = &tegra20_gpio_config }, |
| 414 | { }, |
| 415 | }; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 416 | |
| 417 | /* This lock class tells lockdep that GPIO irqs are in a different |
| 418 | * category than their parents, so it won't report false recursion. |
| 419 | */ |
| 420 | static struct lock_class_key gpio_lock_class; |
| 421 | |
Bill Pemberton | 3836309 | 2012-11-19 13:22:34 -0500 | [diff] [blame] | 422 | static int tegra_gpio_probe(struct platform_device *pdev) |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 423 | { |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 424 | const struct of_device_id *match; |
| 425 | struct tegra_gpio_soc_config *config; |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 426 | struct resource *res; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 427 | struct tegra_gpio_bank *bank; |
Stephen Warren | f57f98a | 2013-12-06 13:36:11 -0700 | [diff] [blame] | 428 | int ret; |
Stephen Warren | 4700800 | 2011-08-23 00:39:55 +0100 | [diff] [blame] | 429 | int gpio; |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 430 | int i; |
| 431 | int j; |
| 432 | |
Stephen Warren | df231f2 | 2013-10-16 13:25:33 -0600 | [diff] [blame] | 433 | dev = &pdev->dev; |
| 434 | |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 435 | match = of_match_device(tegra_gpio_of_match, &pdev->dev); |
Stephen Warren | 165b6c2 | 2013-02-15 14:54:48 -0700 | [diff] [blame] | 436 | if (!match) { |
| 437 | dev_err(&pdev->dev, "Error: No device match found\n"); |
| 438 | return -ENODEV; |
| 439 | } |
| 440 | config = (struct tegra_gpio_soc_config *)match->data; |
Stephen Warren | 5c1e2c9 | 2012-03-16 17:35:08 -0600 | [diff] [blame] | 441 | |
| 442 | tegra_gpio_bank_stride = config->bank_stride; |
| 443 | tegra_gpio_upper_offset = config->upper_offset; |
| 444 | |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 445 | for (;;) { |
| 446 | res = platform_get_resource(pdev, IORESOURCE_IRQ, tegra_gpio_bank_count); |
| 447 | if (!res) |
| 448 | break; |
| 449 | tegra_gpio_bank_count++; |
| 450 | } |
| 451 | if (!tegra_gpio_bank_count) { |
| 452 | dev_err(&pdev->dev, "Missing IRQ resource\n"); |
| 453 | return -ENODEV; |
| 454 | } |
| 455 | |
| 456 | tegra_gpio_chip.ngpio = tegra_gpio_bank_count * 32; |
| 457 | |
| 458 | tegra_gpio_banks = devm_kzalloc(&pdev->dev, |
| 459 | tegra_gpio_bank_count * sizeof(*tegra_gpio_banks), |
| 460 | GFP_KERNEL); |
Jingoo Han | c88a73b | 2014-04-29 17:44:14 +0900 | [diff] [blame] | 461 | if (!tegra_gpio_banks) |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 462 | return -ENODEV; |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 463 | |
Linus Walleij | d023567 | 2012-10-16 21:00:09 +0200 | [diff] [blame] | 464 | irq_domain = irq_domain_add_linear(pdev->dev.of_node, |
| 465 | tegra_gpio_chip.ngpio, |
Stephen Warren | bdc93a7 | 2012-02-13 16:21:15 -0700 | [diff] [blame] | 466 | &irq_domain_simple_ops, NULL); |
Linus Walleij | d023567 | 2012-10-16 21:00:09 +0200 | [diff] [blame] | 467 | if (!irq_domain) |
| 468 | return -ENODEV; |
Stephen Warren | 6f74dc9 | 2012-01-04 08:39:37 +0000 | [diff] [blame] | 469 | |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 470 | for (i = 0; i < tegra_gpio_bank_count; i++) { |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 471 | res = platform_get_resource(pdev, IORESOURCE_IRQ, i); |
| 472 | if (!res) { |
| 473 | dev_err(&pdev->dev, "Missing IRQ resource\n"); |
| 474 | return -ENODEV; |
| 475 | } |
| 476 | |
| 477 | bank = &tegra_gpio_banks[i]; |
| 478 | bank->bank = i; |
| 479 | bank->irq = res->start; |
| 480 | } |
| 481 | |
| 482 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Thierry Reding | 641d034 | 2013-01-21 11:09:01 +0100 | [diff] [blame] | 483 | regs = devm_ioremap_resource(&pdev->dev, res); |
| 484 | if (IS_ERR(regs)) |
| 485 | return PTR_ERR(regs); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 486 | |
Stephen Warren | 4a3398e | 2012-03-16 17:37:24 -0600 | [diff] [blame] | 487 | for (i = 0; i < tegra_gpio_bank_count; i++) { |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 488 | for (j = 0; j < 4; j++) { |
| 489 | int gpio = tegra_gpio_compose(i, j, 0); |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 490 | tegra_gpio_writel(0x00, GPIO_INT_ENB(gpio)); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 491 | } |
| 492 | } |
| 493 | |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 494 | tegra_gpio_chip.of_node = pdev->dev.of_node; |
Grant Likely | df22122 | 2011-06-15 14:54:14 -0600 | [diff] [blame] | 495 | |
Stephen Warren | f57f98a | 2013-12-06 13:36:11 -0700 | [diff] [blame] | 496 | ret = gpiochip_add(&tegra_gpio_chip); |
| 497 | if (ret < 0) { |
| 498 | irq_domain_remove(irq_domain); |
| 499 | return ret; |
| 500 | } |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 501 | |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 502 | for (gpio = 0; gpio < tegra_gpio_chip.ngpio; gpio++) { |
Linus Walleij | d023567 | 2012-10-16 21:00:09 +0200 | [diff] [blame] | 503 | int irq = irq_create_mapping(irq_domain, gpio); |
Stephen Warren | 4700800 | 2011-08-23 00:39:55 +0100 | [diff] [blame] | 504 | /* No validity check; all Tegra GPIOs are valid IRQs */ |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 505 | |
Stephen Warren | 4700800 | 2011-08-23 00:39:55 +0100 | [diff] [blame] | 506 | bank = &tegra_gpio_banks[GPIO_BANK(gpio)]; |
| 507 | |
| 508 | irq_set_lockdep_class(irq, &gpio_lock_class); |
| 509 | irq_set_chip_data(irq, bank); |
| 510 | irq_set_chip_and_handler(irq, &tegra_gpio_irq_chip, |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 511 | handle_simple_irq); |
Stephen Warren | 4700800 | 2011-08-23 00:39:55 +0100 | [diff] [blame] | 512 | set_irq_flags(irq, IRQF_VALID); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 513 | } |
| 514 | |
Stephen Warren | 3391811 | 2012-01-19 08:16:35 +0000 | [diff] [blame] | 515 | for (i = 0; i < tegra_gpio_bank_count; i++) { |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 516 | bank = &tegra_gpio_banks[i]; |
| 517 | |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 518 | irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler); |
| 519 | irq_set_handler_data(bank->irq, bank); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 520 | |
| 521 | for (j = 0; j < 4; j++) |
| 522 | spin_lock_init(&bank->lvl_lock[j]); |
| 523 | } |
| 524 | |
| 525 | return 0; |
| 526 | } |
| 527 | |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 528 | static struct platform_driver tegra_gpio_driver = { |
| 529 | .driver = { |
| 530 | .name = "tegra-gpio", |
| 531 | .owner = THIS_MODULE, |
Laxman Dewangan | 8939ddc | 2012-11-07 20:31:32 +0530 | [diff] [blame] | 532 | .pm = &tegra_gpio_pm_ops, |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 533 | .of_match_table = tegra_gpio_of_match, |
| 534 | }, |
| 535 | .probe = tegra_gpio_probe, |
| 536 | }; |
| 537 | |
| 538 | static int __init tegra_gpio_init(void) |
| 539 | { |
| 540 | return platform_driver_register(&tegra_gpio_driver); |
| 541 | } |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 542 | postcore_initcall(tegra_gpio_init); |
| 543 | |
| 544 | #ifdef CONFIG_DEBUG_FS |
| 545 | |
| 546 | #include <linux/debugfs.h> |
| 547 | #include <linux/seq_file.h> |
| 548 | |
| 549 | static int dbg_gpio_show(struct seq_file *s, void *unused) |
| 550 | { |
| 551 | int i; |
| 552 | int j; |
| 553 | |
Stephen Warren | 4a3398e | 2012-03-16 17:37:24 -0600 | [diff] [blame] | 554 | for (i = 0; i < tegra_gpio_bank_count; i++) { |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 555 | for (j = 0; j < 4; j++) { |
| 556 | int gpio = tegra_gpio_compose(i, j, 0); |
Colin Cross | 2e47b8b | 2010-04-07 12:59:42 -0700 | [diff] [blame] | 557 | seq_printf(s, |
| 558 | "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", |
| 559 | i, j, |
Stephen Warren | 88d8951 | 2011-10-11 16:16:14 -0600 | [diff] [blame] | 560 | tegra_gpio_readl(GPIO_CNF(gpio)), |
| 561 | tegra_gpio_readl(GPIO_OE(gpio)), |
| 562 | tegra_gpio_readl(GPIO_OUT(gpio)), |
| 563 | tegra_gpio_readl(GPIO_IN(gpio)), |
| 564 | tegra_gpio_readl(GPIO_INT_STA(gpio)), |
| 565 | tegra_gpio_readl(GPIO_INT_ENB(gpio)), |
| 566 | tegra_gpio_readl(GPIO_INT_LVL(gpio))); |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 567 | } |
| 568 | } |
| 569 | return 0; |
| 570 | } |
| 571 | |
| 572 | static int dbg_gpio_open(struct inode *inode, struct file *file) |
| 573 | { |
| 574 | return single_open(file, dbg_gpio_show, &inode->i_private); |
| 575 | } |
| 576 | |
| 577 | static const struct file_operations debug_fops = { |
| 578 | .open = dbg_gpio_open, |
| 579 | .read = seq_read, |
| 580 | .llseek = seq_lseek, |
| 581 | .release = single_release, |
| 582 | }; |
| 583 | |
| 584 | static int __init tegra_gpio_debuginit(void) |
| 585 | { |
| 586 | (void) debugfs_create_file("tegra_gpio", S_IRUGO, |
| 587 | NULL, NULL, &debug_fops); |
| 588 | return 0; |
| 589 | } |
| 590 | late_initcall(tegra_gpio_debuginit); |
| 591 | #endif |