Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 3 | * these modifications are Copyright 2004-2010 Analog Devices Inc. |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 4 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 5 | * Licensed under the GPL-2 |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <linux/kernel.h> |
| 9 | #include <linux/sched.h> |
| 10 | #include <linux/mm.h> |
| 11 | #include <linux/smp.h> |
Mike Frysinger | e50e2f2 | 2010-02-14 22:58:02 +0000 | [diff] [blame] | 12 | #include <linux/elf.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 13 | #include <linux/errno.h> |
| 14 | #include <linux/ptrace.h> |
| 15 | #include <linux/user.h> |
Mike Frysinger | e50e2f2 | 2010-02-14 22:58:02 +0000 | [diff] [blame] | 16 | #include <linux/regset.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 17 | #include <linux/signal.h> |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 18 | #include <linux/tracehook.h> |
Mike Frysinger | 1f83b8f | 2007-07-12 22:58:21 +0800 | [diff] [blame] | 19 | #include <linux/uaccess.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 20 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 21 | #include <asm/page.h> |
| 22 | #include <asm/pgtable.h> |
| 23 | #include <asm/system.h> |
| 24 | #include <asm/processor.h> |
| 25 | #include <asm/asm-offsets.h> |
| 26 | #include <asm/dma.h> |
Jie Zhang | 2615639 | 2007-08-05 16:25:23 +0800 | [diff] [blame] | 27 | #include <asm/fixed_code.h> |
Jie Zhang | 7786ce8 | 2009-03-05 18:50:26 +0800 | [diff] [blame] | 28 | #include <asm/cacheflush.h> |
Graf Yang | dbc895f | 2009-01-07 23:14:39 +0800 | [diff] [blame] | 29 | #include <asm/mem_map.h> |
Barry Song | 175671e | 2010-06-21 10:19:50 +0000 | [diff] [blame] | 30 | #include <asm/mmu_context.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 31 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 32 | /* |
| 33 | * does not yet catch signals sent when the child dies. |
| 34 | * in exit.c or in signal.c. |
| 35 | */ |
| 36 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 37 | /* |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 38 | * Get contents of register REGNO in task TASK. |
| 39 | */ |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 40 | static inline long |
Namhyung Kim | aeebd3a | 2010-10-27 15:33:51 -0700 | [diff] [blame] | 41 | get_reg(struct task_struct *task, unsigned long regno, |
| 42 | unsigned long __user *datap) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 43 | { |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 44 | long tmp; |
| 45 | struct pt_regs *regs = task_pt_regs(task); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 46 | |
Namhyung Kim | aeebd3a | 2010-10-27 15:33:51 -0700 | [diff] [blame] | 47 | if (regno & 3 || regno > PT_LAST_PSEUDO) |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 48 | return -EIO; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 49 | |
| 50 | switch (regno) { |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 51 | case PT_TEXT_ADDR: |
| 52 | tmp = task->mm->start_code; |
| 53 | break; |
| 54 | case PT_TEXT_END_ADDR: |
| 55 | tmp = task->mm->end_code; |
| 56 | break; |
| 57 | case PT_DATA_ADDR: |
| 58 | tmp = task->mm->start_data; |
| 59 | break; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 60 | case PT_USP: |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 61 | tmp = task->thread.usp; |
| 62 | break; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 63 | default: |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 64 | if (regno < sizeof(*regs)) { |
| 65 | void *reg_ptr = regs; |
| 66 | tmp = *(long *)(reg_ptr + regno); |
| 67 | } else |
| 68 | return -EIO; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 69 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 70 | |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 71 | return put_user(tmp, datap); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 72 | } |
| 73 | |
| 74 | /* |
| 75 | * Write contents of register REGNO in task TASK. |
| 76 | */ |
| 77 | static inline int |
Namhyung Kim | aeebd3a | 2010-10-27 15:33:51 -0700 | [diff] [blame] | 78 | put_reg(struct task_struct *task, unsigned long regno, unsigned long data) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 79 | { |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 80 | struct pt_regs *regs = task_pt_regs(task); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 81 | |
Namhyung Kim | aeebd3a | 2010-10-27 15:33:51 -0700 | [diff] [blame] | 82 | if (regno & 3 || regno > PT_LAST_PSEUDO) |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 83 | return -EIO; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 84 | |
| 85 | switch (regno) { |
| 86 | case PT_PC: |
| 87 | /*********************************************************************/ |
| 88 | /* At this point the kernel is most likely in exception. */ |
| 89 | /* The RETX register will be used to populate the pc of the process. */ |
| 90 | /*********************************************************************/ |
| 91 | regs->retx = data; |
| 92 | regs->pc = data; |
| 93 | break; |
| 94 | case PT_RETX: |
| 95 | break; /* regs->retx = data; break; */ |
| 96 | case PT_USP: |
| 97 | regs->usp = data; |
| 98 | task->thread.usp = data; |
| 99 | break; |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 100 | case PT_SYSCFG: /* don't let userspace screw with this */ |
| 101 | if ((data & ~1) != 0x6) |
| 102 | pr_warning("ptrace: ignore syscfg write of %#lx\n", data); |
| 103 | break; /* regs->syscfg = data; break; */ |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 104 | default: |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 105 | if (regno < sizeof(*regs)) { |
| 106 | void *reg_offset = regs; |
| 107 | *(long *)(reg_offset + regno) = data; |
| 108 | } |
| 109 | /* Ignore writes to pseudo registers */ |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 110 | } |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 111 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | /* |
| 116 | * check that an address falls within the bounds of the target process's memory mappings |
| 117 | */ |
Sonic Zhang | 99a5b28 | 2010-09-06 10:16:04 +0000 | [diff] [blame] | 118 | int |
| 119 | is_user_addr_valid(struct task_struct *child, unsigned long start, unsigned long len) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 120 | { |
David Howells | 8feae13 | 2009-01-08 12:04:47 +0000 | [diff] [blame] | 121 | struct vm_area_struct *vma; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 122 | struct sram_list_struct *sraml; |
| 123 | |
Mike Frysinger | 3c08f1d | 2008-10-10 17:12:51 +0800 | [diff] [blame] | 124 | /* overflow */ |
| 125 | if (start + len < start) |
| 126 | return -EIO; |
| 127 | |
David Howells | 8feae13 | 2009-01-08 12:04:47 +0000 | [diff] [blame] | 128 | vma = find_vma(child->mm, start); |
| 129 | if (vma && start >= vma->vm_start && start + len <= vma->vm_end) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 130 | return 0; |
| 131 | |
| 132 | for (sraml = child->mm->context.sram_list; sraml; sraml = sraml->next) |
| 133 | if (start >= (unsigned long)sraml->addr |
Mike Frysinger | d207a8c | 2008-10-10 17:26:57 +0800 | [diff] [blame] | 134 | && start + len < (unsigned long)sraml->addr + sraml->length) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 135 | return 0; |
| 136 | |
Mike Frysinger | d207a8c | 2008-10-10 17:26:57 +0800 | [diff] [blame] | 137 | if (start >= FIXED_CODE_START && start + len < FIXED_CODE_END) |
Jie Zhang | 2615639 | 2007-08-05 16:25:23 +0800 | [diff] [blame] | 138 | return 0; |
| 139 | |
Barry Song | 175671e | 2010-06-21 10:19:50 +0000 | [diff] [blame] | 140 | #ifdef CONFIG_APP_STACK_L1 |
| 141 | if (child->mm->context.l1_stack_save) |
| 142 | if (start >= (unsigned long)l1_stack_base && |
| 143 | start + len < (unsigned long)l1_stack_base + l1_stack_len) |
| 144 | return 0; |
| 145 | #endif |
| 146 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 147 | return -EIO; |
| 148 | } |
| 149 | |
Mike Frysinger | e50e2f2 | 2010-02-14 22:58:02 +0000 | [diff] [blame] | 150 | /* |
| 151 | * retrieve the contents of Blackfin userspace general registers |
| 152 | */ |
| 153 | static int genregs_get(struct task_struct *target, |
| 154 | const struct user_regset *regset, |
| 155 | unsigned int pos, unsigned int count, |
| 156 | void *kbuf, void __user *ubuf) |
| 157 | { |
| 158 | struct pt_regs *regs = task_pt_regs(target); |
| 159 | int ret; |
| 160 | |
| 161 | /* This sucks ... */ |
| 162 | regs->usp = target->thread.usp; |
| 163 | |
| 164 | ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
| 165 | regs, 0, sizeof(*regs)); |
| 166 | if (ret < 0) |
| 167 | return ret; |
| 168 | |
| 169 | return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, |
| 170 | sizeof(*regs), -1); |
| 171 | } |
| 172 | |
| 173 | /* |
| 174 | * update the contents of the Blackfin userspace general registers |
| 175 | */ |
| 176 | static int genregs_set(struct task_struct *target, |
| 177 | const struct user_regset *regset, |
| 178 | unsigned int pos, unsigned int count, |
| 179 | const void *kbuf, const void __user *ubuf) |
| 180 | { |
| 181 | struct pt_regs *regs = task_pt_regs(target); |
| 182 | int ret; |
| 183 | |
| 184 | /* Don't let people set SYSCFG (it's at the end of pt_regs) */ |
| 185 | ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
| 186 | regs, 0, PT_SYSCFG); |
| 187 | if (ret < 0) |
| 188 | return ret; |
| 189 | |
| 190 | /* This sucks ... */ |
| 191 | target->thread.usp = regs->usp; |
| 192 | /* regs->retx = regs->pc; */ |
| 193 | |
| 194 | return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, |
| 195 | PT_SYSCFG, -1); |
| 196 | } |
| 197 | |
| 198 | /* |
| 199 | * Define the register sets available on the Blackfin under Linux |
| 200 | */ |
| 201 | enum bfin_regset { |
| 202 | REGSET_GENERAL, |
| 203 | }; |
| 204 | |
| 205 | static const struct user_regset bfin_regsets[] = { |
| 206 | [REGSET_GENERAL] = { |
| 207 | .core_note_type = NT_PRSTATUS, |
| 208 | .n = sizeof(struct pt_regs) / sizeof(long), |
| 209 | .size = sizeof(long), |
| 210 | .align = sizeof(long), |
| 211 | .get = genregs_get, |
| 212 | .set = genregs_set, |
| 213 | }, |
| 214 | }; |
| 215 | |
| 216 | static const struct user_regset_view user_bfin_native_view = { |
| 217 | .name = "Blackfin", |
| 218 | .e_machine = EM_BLACKFIN, |
| 219 | .regsets = bfin_regsets, |
| 220 | .n = ARRAY_SIZE(bfin_regsets), |
| 221 | }; |
| 222 | |
| 223 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) |
| 224 | { |
| 225 | return &user_bfin_native_view; |
| 226 | } |
| 227 | |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 228 | void user_enable_single_step(struct task_struct *child) |
Mike Frysinger | cb4c173 | 2008-10-09 15:21:05 +0800 | [diff] [blame] | 229 | { |
Mike Frysinger | 5f09c77 | 2010-02-14 22:49:59 +0000 | [diff] [blame] | 230 | struct pt_regs *regs = task_pt_regs(child); |
| 231 | regs->syscfg |= SYSCFG_SSSTEP; |
Mike Frysinger | 600482c | 2010-02-17 10:44:22 +0000 | [diff] [blame] | 232 | |
| 233 | set_tsk_thread_flag(child, TIF_SINGLESTEP); |
Mike Frysinger | cb4c173 | 2008-10-09 15:21:05 +0800 | [diff] [blame] | 234 | } |
| 235 | |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 236 | void user_disable_single_step(struct task_struct *child) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 237 | { |
Mike Frysinger | 5f09c77 | 2010-02-14 22:49:59 +0000 | [diff] [blame] | 238 | struct pt_regs *regs = task_pt_regs(child); |
| 239 | regs->syscfg &= ~SYSCFG_SSSTEP; |
Mike Frysinger | 600482c | 2010-02-17 10:44:22 +0000 | [diff] [blame] | 240 | |
| 241 | clear_tsk_thread_flag(child, TIF_SINGLESTEP); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 242 | } |
| 243 | |
Namhyung Kim | 9b05a69 | 2010-10-27 15:33:47 -0700 | [diff] [blame] | 244 | long arch_ptrace(struct task_struct *child, long request, |
| 245 | unsigned long addr, unsigned long data) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 246 | { |
| 247 | int ret; |
Mike Frysinger | 0ddeeca | 2008-03-07 02:37:41 +0800 | [diff] [blame] | 248 | unsigned long __user *datap = (unsigned long __user *)data; |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 249 | void *paddr = (void *)addr; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 250 | |
| 251 | switch (request) { |
| 252 | /* when I and D space are separate, these will need to be fixed. */ |
| 253 | case PTRACE_PEEKDATA: |
| 254 | pr_debug("ptrace: PEEKDATA\n"); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 255 | /* fall through */ |
| 256 | case PTRACE_PEEKTEXT: /* read word at location addr. */ |
| 257 | { |
| 258 | unsigned long tmp = 0; |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 259 | int copied = 0, to_copy = sizeof(tmp); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 260 | |
| 261 | ret = -EIO; |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 262 | pr_debug("ptrace: PEEKTEXT at addr 0x%08lx + %i\n", addr, to_copy); |
| 263 | if (is_user_addr_valid(child, addr, to_copy) < 0) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 264 | break; |
| 265 | pr_debug("ptrace: user address is valid\n"); |
| 266 | |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 267 | switch (bfin_mem_access_type(addr, to_copy)) { |
| 268 | case BFIN_MEM_ACCESS_CORE: |
| 269 | case BFIN_MEM_ACCESS_CORE_ONLY: |
Mike Frysinger | dabaad5 | 2008-10-09 15:17:36 +0800 | [diff] [blame] | 270 | copied = access_process_vm(child, addr, &tmp, |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 271 | to_copy, 0); |
| 272 | if (copied) |
| 273 | break; |
| 274 | |
| 275 | /* hrm, why didn't that work ... maybe no mapping */ |
| 276 | if (addr >= FIXED_CODE_START && |
| 277 | addr + to_copy <= FIXED_CODE_END) { |
| 278 | copy_from_user_page(0, 0, 0, &tmp, paddr, to_copy); |
| 279 | copied = to_copy; |
| 280 | } else if (addr >= BOOT_ROM_START) { |
| 281 | memcpy(&tmp, paddr, to_copy); |
| 282 | copied = to_copy; |
| 283 | } |
| 284 | |
| 285 | break; |
| 286 | case BFIN_MEM_ACCESS_DMA: |
| 287 | if (safe_dma_memcpy(&tmp, paddr, to_copy)) |
| 288 | copied = to_copy; |
| 289 | break; |
| 290 | case BFIN_MEM_ACCESS_ITEST: |
| 291 | if (isram_memcpy(&tmp, paddr, to_copy)) |
| 292 | copied = to_copy; |
| 293 | break; |
| 294 | default: |
| 295 | copied = 0; |
| 296 | break; |
| 297 | } |
Mike Frysinger | d207a8c | 2008-10-10 17:26:57 +0800 | [diff] [blame] | 298 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 299 | pr_debug("ptrace: copied size %d [0x%08lx]\n", copied, tmp); |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 300 | if (copied == to_copy) |
| 301 | ret = put_user(tmp, datap); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 302 | break; |
| 303 | } |
| 304 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 305 | /* when I and D space are separate, this will have to be fixed. */ |
| 306 | case PTRACE_POKEDATA: |
Mike Frysinger | d3ab3a6 | 2008-10-09 15:19:50 +0800 | [diff] [blame] | 307 | pr_debug("ptrace: PTRACE_PEEKDATA\n"); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 308 | /* fall through */ |
| 309 | case PTRACE_POKETEXT: /* write the word at location addr. */ |
| 310 | { |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 311 | int copied = 0, to_copy = sizeof(data); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 312 | |
| 313 | ret = -EIO; |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 314 | pr_debug("ptrace: POKETEXT at addr 0x%08lx + %i bytes %lx\n", |
| 315 | addr, to_copy, data); |
| 316 | if (is_user_addr_valid(child, addr, to_copy) < 0) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 317 | break; |
| 318 | pr_debug("ptrace: user address is valid\n"); |
| 319 | |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 320 | switch (bfin_mem_access_type(addr, to_copy)) { |
| 321 | case BFIN_MEM_ACCESS_CORE: |
| 322 | case BFIN_MEM_ACCESS_CORE_ONLY: |
Mike Frysinger | dabaad5 | 2008-10-09 15:17:36 +0800 | [diff] [blame] | 323 | copied = access_process_vm(child, addr, &data, |
Jie Zhang | 46b60fa | 2009-11-20 22:52:08 +0000 | [diff] [blame] | 324 | to_copy, 1); |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 325 | break; |
| 326 | case BFIN_MEM_ACCESS_DMA: |
| 327 | if (safe_dma_memcpy(paddr, &data, to_copy)) |
| 328 | copied = to_copy; |
| 329 | break; |
| 330 | case BFIN_MEM_ACCESS_ITEST: |
| 331 | if (isram_memcpy(paddr, &data, to_copy)) |
| 332 | copied = to_copy; |
| 333 | break; |
| 334 | default: |
| 335 | copied = 0; |
| 336 | break; |
| 337 | } |
Mike Frysinger | d207a8c | 2008-10-10 17:26:57 +0800 | [diff] [blame] | 338 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 339 | pr_debug("ptrace: copied size %d\n", copied); |
Mike Frysinger | c014e15 | 2009-06-24 20:02:58 -0400 | [diff] [blame] | 340 | if (copied == to_copy) |
| 341 | ret = 0; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 342 | break; |
| 343 | } |
| 344 | |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 345 | case PTRACE_PEEKUSR: |
| 346 | switch (addr) { |
| 347 | #ifdef CONFIG_BINFMT_ELF_FDPIC /* backwards compat */ |
Mike Frysinger | 9c1a125 | 2010-05-26 14:42:52 -0700 | [diff] [blame] | 348 | case PT_FDPIC_EXEC: |
| 349 | request = PTRACE_GETFDPIC; |
| 350 | addr = PTRACE_GETFDPIC_EXEC; |
| 351 | goto case_default; |
| 352 | case PT_FDPIC_INTERP: |
| 353 | request = PTRACE_GETFDPIC; |
| 354 | addr = PTRACE_GETFDPIC_INTERP; |
| 355 | goto case_default; |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 356 | #endif |
| 357 | default: |
| 358 | ret = get_reg(child, addr, datap); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 359 | } |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 360 | pr_debug("ptrace: PEEKUSR reg %li with %#lx = %i\n", addr, data, ret); |
| 361 | break; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 362 | |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 363 | case PTRACE_POKEUSR: |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 364 | ret = put_reg(child, addr, data); |
Mike Frysinger | f2ce480 | 2010-02-14 22:56:24 +0000 | [diff] [blame] | 365 | pr_debug("ptrace: POKEUSR reg %li with %li = %i\n", addr, data, ret); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 366 | break; |
| 367 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 368 | case PTRACE_GETREGS: |
Mike Frysinger | e50e2f2 | 2010-02-14 22:58:02 +0000 | [diff] [blame] | 369 | pr_debug("ptrace: PTRACE_GETREGS\n"); |
| 370 | return copy_regset_to_user(child, &user_bfin_native_view, |
| 371 | REGSET_GENERAL, |
| 372 | 0, sizeof(struct pt_regs), |
Namhyung Kim | aeebd3a | 2010-10-27 15:33:51 -0700 | [diff] [blame] | 373 | datap); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 374 | |
| 375 | case PTRACE_SETREGS: |
Mike Frysinger | e50e2f2 | 2010-02-14 22:58:02 +0000 | [diff] [blame] | 376 | pr_debug("ptrace: PTRACE_SETREGS\n"); |
| 377 | return copy_regset_from_user(child, &user_bfin_native_view, |
| 378 | REGSET_GENERAL, |
| 379 | 0, sizeof(struct pt_regs), |
Namhyung Kim | aeebd3a | 2010-10-27 15:33:51 -0700 | [diff] [blame] | 380 | datap); |
Mike Frysinger | d3ab3a6 | 2008-10-09 15:19:50 +0800 | [diff] [blame] | 381 | |
Mike Frysinger | 9c1a125 | 2010-05-26 14:42:52 -0700 | [diff] [blame] | 382 | case_default: |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 383 | default: |
| 384 | ret = ptrace_request(child, request, addr, data); |
| 385 | break; |
| 386 | } |
| 387 | |
| 388 | return ret; |
| 389 | } |
| 390 | |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 391 | asmlinkage int syscall_trace_enter(struct pt_regs *regs) |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 392 | { |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 393 | int ret = 0; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 394 | |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 395 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
| 396 | ret = tracehook_report_syscall_entry(regs); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 397 | |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 398 | return ret; |
| 399 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 400 | |
Mike Frysinger | e8f263d | 2010-01-26 07:33:53 +0000 | [diff] [blame] | 401 | asmlinkage void syscall_trace_leave(struct pt_regs *regs) |
| 402 | { |
Mike Frysinger | 600482c | 2010-02-17 10:44:22 +0000 | [diff] [blame] | 403 | int step; |
| 404 | |
| 405 | step = test_thread_flag(TIF_SINGLESTEP); |
| 406 | if (step || test_thread_flag(TIF_SYSCALL_TRACE)) |
| 407 | tracehook_report_syscall_exit(regs, step); |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 408 | } |