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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * General Purpose functions for the global management of the
3 * Communication Processor Module.
4 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 *
6 * In addition to the individual control of the communication
7 * channels, there are a few functions that globally affect the
8 * communication processor.
9 *
10 * Buffer descriptors must be allocated from the dual ported memory
11 * space. The allocator for that is here. When the communication
12 * process is reset, we reclaim the memory available. There is
13 * currently no deallocator for this memory.
14 * The amount of space available is platform dependent. On the
15 * MBX, the EPPC software loads additional microcode into the
16 * communication processor, and uses some of the DP ram for this
17 * purpose. Current, the first 512 bytes and the last 256 bytes of
18 * memory are used. Right now I am conservative and only use the
19 * memory that can never be used for microcode. If there are
20 * applications that require more DP ram, we can expand the boundaries
21 * but then we have to be careful of any downloaded microcode.
22 */
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/dma-mapping.h>
27#include <linux/param.h>
28#include <linux/string.h>
29#include <linux/mm.h>
30#include <linux/interrupt.h>
31#include <linux/irq.h>
32#include <linux/module.h>
33#include <asm/mpc8xx.h>
34#include <asm/page.h>
35#include <asm/pgtable.h>
36#include <asm/8xx_immap.h>
37#include <asm/commproc.h>
38#include <asm/io.h>
39#include <asm/tlbflush.h>
40#include <asm/rheap.h>
41
Linus Torvalds1da177e2005-04-16 15:20:36 -070042static void m8xx_cpm_dpinit(void);
43static uint host_buffer; /* One page of host buffer */
44static uint host_end; /* end + 1 */
45cpm8xx_t *cpmp; /* Pointer to comm processor space */
46
47/* CPM interrupt vector functions.
48*/
49struct cpm_action {
Al Viro39e3eb72006-10-09 12:48:42 +010050 void (*handler)(void *);
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 void *dev_id;
52};
53static struct cpm_action cpm_vecs[CPMVEC_NR];
Al Viro39e3eb72006-10-09 12:48:42 +010054static irqreturn_t cpm_interrupt(int irq, void * dev);
55static irqreturn_t cpm_error_interrupt(int irq, void *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070056static void alloc_host_memory(void);
57/* Define a table of names to identify CPM interrupt handlers in
58 * /proc/interrupts.
59 */
60const char *cpm_int_name[] =
61 { "error", "PC4", "PC5", "SMC2",
62 "SMC1", "SPI", "PC6", "Timer 4",
63 "", "PC7", "PC8", "PC9",
64 "Timer 3", "", "PC10", "PC11",
65 "I2C", "RISC Timer", "Timer 2", "",
66 "IDMA2", "IDMA1", "SDMA error", "PC12",
67 "PC13", "Timer 1", "PC14", "SCC4",
68 "SCC3", "SCC2", "SCC1", "PC15"
69 };
70
71static void
72cpm_mask_irq(unsigned int irq)
73{
74 int cpm_vec = irq - CPM_IRQ_OFFSET;
75
Vitaly Bordug0ce928e2006-01-15 17:30:29 +030076 clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
Linus Torvalds1da177e2005-04-16 15:20:36 -070077}
78
79static void
80cpm_unmask_irq(unsigned int irq)
81{
82 int cpm_vec = irq - CPM_IRQ_OFFSET;
83
Vitaly Bordug0ce928e2006-01-15 17:30:29 +030084 setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
Linus Torvalds1da177e2005-04-16 15:20:36 -070085}
86
87static void
88cpm_ack(unsigned int irq)
89{
90 /* We do not need to do anything here. */
91}
92
93static void
94cpm_eoi(unsigned int irq)
95{
96 int cpm_vec = irq - CPM_IRQ_OFFSET;
97
Marcelo Tosattie37b0c92005-10-28 17:46:10 -070098 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec));
Linus Torvalds1da177e2005-04-16 15:20:36 -070099}
100
101struct hw_interrupt_type cpm_pic = {
102 .typename = " CPM ",
103 .enable = cpm_unmask_irq,
104 .disable = cpm_mask_irq,
105 .ack = cpm_ack,
106 .end = cpm_eoi,
107};
108
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109void
Marcelo Tosatti079da352005-08-07 09:42:47 -0700110m8xx_cpm_reset(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111{
112 volatile immap_t *imp;
113 volatile cpm8xx_t *commproc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114
115 imp = (immap_t *)IMAP_ADDR;
116 commproc = (cpm8xx_t *)&imp->im_cpm;
117
118#ifdef CONFIG_UCODE_PATCH
119 /* Perform a reset.
120 */
121 commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
122
123 /* Wait for it.
124 */
125 while (commproc->cp_cpcr & CPM_CR_FLG);
126
127 cpm_load_patch(imp);
128#endif
129
130 /* Set SDMA Bus Request priority 5.
131 * On 860T, this also enables FEC priority 6. I am not sure
132 * this is what we realy want for some applications, but the
133 * manual recommends it.
134 * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
135 */
Marcelo Tosattie37b0c92005-10-28 17:46:10 -0700136 out_be32(&imp->im_siu_conf.sc_sdcr, 1),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
138 /* Reclaim the DP memory for our use. */
139 m8xx_cpm_dpinit();
140
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 /* Tell everyone where the comm processor resides.
142 */
143 cpmp = (cpm8xx_t *)commproc;
144}
145
146/* We used to do this earlier, but have to postpone as long as possible
147 * to ensure the kernel VM is now running.
148 */
149static void
150alloc_host_memory(void)
151{
152 dma_addr_t physaddr;
153
154 /* Set the host page for allocation.
155 */
156 host_buffer = (uint)dma_alloc_coherent(NULL, PAGE_SIZE, &physaddr,
157 GFP_KERNEL);
158 host_end = host_buffer + PAGE_SIZE;
159}
160
161/* This is called during init_IRQ. We used to do it above, but this
162 * was too early since init_IRQ was not yet called.
163 */
164static struct irqaction cpm_error_irqaction = {
165 .handler = cpm_error_interrupt,
166 .mask = CPU_MASK_NONE,
167};
168static struct irqaction cpm_interrupt_irqaction = {
169 .handler = cpm_interrupt,
170 .mask = CPU_MASK_NONE,
171 .name = "CPM cascade",
172};
173
174void
175cpm_interrupt_init(void)
176{
177 int i;
178
179 /* Initialize the CPM interrupt controller.
180 */
Marcelo Tosattie37b0c92005-10-28 17:46:10 -0700181 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
Marcelo Tosattie37b0c92005-10-28 17:46:10 -0700183 ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK);
184 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185
186 /* install the CPM interrupt controller routines for the CPM
187 * interrupt vectors
188 */
189 for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ )
Ingo Molnard1bef4e2006-06-29 02:24:36 -0700190 irq_desc[i].chip = &cpm_pic;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
192 /* Set our interrupt handler with the core CPU. */
193 if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction))
194 panic("Could not allocate CPM IRQ!");
195
196 /* Install our own error handler. */
197 cpm_error_irqaction.name = cpm_int_name[CPMVEC_ERROR];
198 if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
199 panic("Could not allocate CPM error IRQ!");
200
Vitaly Bordug0ce928e2006-01-15 17:30:29 +0300201 setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202}
203
204/*
205 * Get the CPM interrupt vector.
206 */
207int
Al Viro39e3eb72006-10-09 12:48:42 +0100208cpm_get_irq(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209{
210 int cpm_vec;
211
212 /* Get the vector by setting the ACK bit and then reading
213 * the register.
214 */
Marcelo Tosattie37b0c92005-10-28 17:46:10 -0700215 out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1);
216 cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217 cpm_vec >>= 11;
218
219 return cpm_vec;
220}
221
222/* CPM interrupt controller cascade interrupt.
223*/
224static irqreturn_t
Al Viro39e3eb72006-10-09 12:48:42 +0100225cpm_interrupt(int irq, void * dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226{
227 /* This interrupt handler never actually gets called. It is
228 * installed only to unmask the CPM cascade interrupt in the SIU
229 * and to make the CPM cascade interrupt visible in /proc/interrupts.
230 */
231 return IRQ_HANDLED;
232}
233
234/* The CPM can generate the error interrupt when there is a race condition
235 * between generating and masking interrupts. All we have to do is ACK it
236 * and return. This is a no-op function so we don't need any special
237 * tests in the interrupt handler.
238 */
239static irqreturn_t
Al Viro39e3eb72006-10-09 12:48:42 +0100240cpm_error_interrupt(int irq, void *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241{
242 return IRQ_HANDLED;
243}
244
245/* A helper function to translate the handler prototype required by
246 * request_irq() to the handler prototype required by cpm_install_handler().
247 */
248static irqreturn_t
Al Viro39e3eb72006-10-09 12:48:42 +0100249cpm_handler_helper(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250{
251 int cpm_vec = irq - CPM_IRQ_OFFSET;
252
Al Viro39e3eb72006-10-09 12:48:42 +0100253 (*cpm_vecs[cpm_vec].handler)(dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254
255 return IRQ_HANDLED;
256}
257
258/* Install a CPM interrupt handler.
259 * This routine accepts a CPM interrupt vector in the range 0 to 31.
260 * This routine is retained for backward compatibility. Rather than using
261 * this routine to install a CPM interrupt handler, you can now use
262 * request_irq() with an IRQ in the range CPM_IRQ_OFFSET to
263 * CPM_IRQ_OFFSET + NR_CPM_INTS - 1 (16 to 47).
264 *
265 * Notice that the prototype of the interrupt handler function must be
266 * different depending on whether you install the handler with
267 * request_irq() or cpm_install_handler().
268 */
269void
Al Viro39e3eb72006-10-09 12:48:42 +0100270cpm_install_handler(int cpm_vec, void (*handler)(void *), void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271{
272 int err;
273
274 /* If null handler, assume we are trying to free the IRQ.
275 */
276 if (!handler) {
277 free_irq(CPM_IRQ_OFFSET + cpm_vec, dev_id);
278 return;
279 }
280
281 if (cpm_vecs[cpm_vec].handler != 0)
282 printk(KERN_INFO "CPM interrupt %x replacing %x\n",
283 (uint)handler, (uint)cpm_vecs[cpm_vec].handler);
284 cpm_vecs[cpm_vec].handler = handler;
285 cpm_vecs[cpm_vec].dev_id = dev_id;
286
287 if ((err = request_irq(CPM_IRQ_OFFSET + cpm_vec, cpm_handler_helper,
288 0, cpm_int_name[cpm_vec], dev_id)))
289 printk(KERN_ERR "request_irq() returned %d for CPM vector %d\n",
290 err, cpm_vec);
291}
292
293/* Free a CPM interrupt handler.
294 * This routine accepts a CPM interrupt vector in the range 0 to 31.
295 * This routine is retained for backward compatibility.
296 */
297void
298cpm_free_handler(int cpm_vec)
299{
300 request_irq(CPM_IRQ_OFFSET + cpm_vec, NULL, 0, 0,
301 cpm_vecs[cpm_vec].dev_id);
302
303 cpm_vecs[cpm_vec].handler = NULL;
304 cpm_vecs[cpm_vec].dev_id = NULL;
305}
306
307/* We also own one page of host buffer space for the allocation of
308 * UART "fifos" and the like.
309 */
310uint
311m8xx_cpm_hostalloc(uint size)
312{
313 uint retloc;
314
315 if (host_buffer == 0)
316 alloc_host_memory();
317
318 if ((host_buffer + size) >= host_end)
319 return(0);
320
321 retloc = host_buffer;
322 host_buffer += size;
323
324 return(retloc);
325}
326
327/* Set a baud rate generator. This needs lots of work. There are
328 * four BRGs, any of which can be wired to any channel.
329 * The internal baud rate clock is the system clock divided by 16.
330 * This assumes the baudrate is 16x oversampled by the uart.
331 */
332#define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq)
333#define BRG_UART_CLK (BRG_INT_CLK/16)
334#define BRG_UART_CLK_DIV16 (BRG_UART_CLK/16)
335
336void
337cpm_setbrg(uint brg, uint rate)
338{
339 volatile uint *bp;
340
341 /* This is good enough to get SMCs running.....
342 */
343 bp = (uint *)&cpmp->cp_brgc1;
344 bp += brg;
345 /* The BRG has a 12-bit counter. For really slow baud rates (or
346 * really fast processors), we may have to further divide by 16.
347 */
348 if (((BRG_UART_CLK / rate) - 1) < 4096)
349 *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
350 else
351 *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
352 CPM_BRG_EN | CPM_BRG_DIV16;
353}
354
355/*
356 * dpalloc / dpfree bits.
357 */
358static spinlock_t cpm_dpmem_lock;
359/*
360 * 16 blocks should be enough to satisfy all requests
361 * until the memory subsystem goes up...
362 */
363static rh_block_t cpm_boot_dpmem_rh_block[16];
364static rh_info_t cpm_dpmem_info;
365
366#define CPM_DPMEM_ALIGNMENT 8
367
368void m8xx_cpm_dpinit(void)
369{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370 spin_lock_init(&cpm_dpmem_lock);
371
372 /* Initialize the info header */
373 rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
374 sizeof(cpm_boot_dpmem_rh_block) /
375 sizeof(cpm_boot_dpmem_rh_block[0]),
376 cpm_boot_dpmem_rh_block);
377
378 /*
379 * Attach the usable dpmem area.
380 * XXX: This is actually crap. CPM_DATAONLY_BASE and
381 * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies
382 * with the processor and the microcode patches applied / activated.
383 * But the following should be at least safe.
384 */
385 rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
386}
387
388/*
389 * Allocate the requested size worth of DP memory.
Marcelo Tosatti3d9e9dc2005-11-02 12:42:16 -0200390 * This function returns an offset into the DPRAM area.
391 * Use cpm_dpram_addr() to get the virtual address of the area.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392 */
393uint cpm_dpalloc(uint size, uint align)
394{
395 void *start;
396 unsigned long flags;
397
398 spin_lock_irqsave(&cpm_dpmem_lock, flags);
399 cpm_dpmem_info.alignment = align;
400 start = rh_alloc(&cpm_dpmem_info, size, "commproc");
401 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
402
403 return (uint)start;
404}
405EXPORT_SYMBOL(cpm_dpalloc);
406
407int cpm_dpfree(uint offset)
408{
409 int ret;
410 unsigned long flags;
411
412 spin_lock_irqsave(&cpm_dpmem_lock, flags);
413 ret = rh_free(&cpm_dpmem_info, (void *)offset);
414 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
415
416 return ret;
417}
418EXPORT_SYMBOL(cpm_dpfree);
419
420uint cpm_dpalloc_fixed(uint offset, uint size, uint align)
421{
422 void *start;
423 unsigned long flags;
424
425 spin_lock_irqsave(&cpm_dpmem_lock, flags);
426 cpm_dpmem_info.alignment = align;
427 start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc");
428 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
429
430 return (uint)start;
431}
432EXPORT_SYMBOL(cpm_dpalloc_fixed);
433
434void cpm_dpdump(void)
435{
436 rh_dump(&cpm_dpmem_info);
437}
438EXPORT_SYMBOL(cpm_dpdump);
439
440void *cpm_dpram_addr(uint offset)
441{
442 return ((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem + offset;
443}
444EXPORT_SYMBOL(cpm_dpram_addr);