Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Platform data for Arizona devices |
| 3 | * |
| 4 | * Copyright 2012 Wolfson Microelectronics. PLC. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef _ARIZONA_PDATA_H |
| 12 | #define _ARIZONA_PDATA_H |
| 13 | |
| 14 | #define ARIZONA_GPN_DIR 0x8000 /* GPN_DIR */ |
| 15 | #define ARIZONA_GPN_DIR_MASK 0x8000 /* GPN_DIR */ |
| 16 | #define ARIZONA_GPN_DIR_SHIFT 15 /* GPN_DIR */ |
| 17 | #define ARIZONA_GPN_DIR_WIDTH 1 /* GPN_DIR */ |
| 18 | #define ARIZONA_GPN_PU 0x4000 /* GPN_PU */ |
| 19 | #define ARIZONA_GPN_PU_MASK 0x4000 /* GPN_PU */ |
| 20 | #define ARIZONA_GPN_PU_SHIFT 14 /* GPN_PU */ |
| 21 | #define ARIZONA_GPN_PU_WIDTH 1 /* GPN_PU */ |
| 22 | #define ARIZONA_GPN_PD 0x2000 /* GPN_PD */ |
| 23 | #define ARIZONA_GPN_PD_MASK 0x2000 /* GPN_PD */ |
| 24 | #define ARIZONA_GPN_PD_SHIFT 13 /* GPN_PD */ |
| 25 | #define ARIZONA_GPN_PD_WIDTH 1 /* GPN_PD */ |
| 26 | #define ARIZONA_GPN_LVL 0x0800 /* GPN_LVL */ |
| 27 | #define ARIZONA_GPN_LVL_MASK 0x0800 /* GPN_LVL */ |
| 28 | #define ARIZONA_GPN_LVL_SHIFT 11 /* GPN_LVL */ |
| 29 | #define ARIZONA_GPN_LVL_WIDTH 1 /* GPN_LVL */ |
| 30 | #define ARIZONA_GPN_POL 0x0400 /* GPN_POL */ |
| 31 | #define ARIZONA_GPN_POL_MASK 0x0400 /* GPN_POL */ |
| 32 | #define ARIZONA_GPN_POL_SHIFT 10 /* GPN_POL */ |
| 33 | #define ARIZONA_GPN_POL_WIDTH 1 /* GPN_POL */ |
| 34 | #define ARIZONA_GPN_OP_CFG 0x0200 /* GPN_OP_CFG */ |
| 35 | #define ARIZONA_GPN_OP_CFG_MASK 0x0200 /* GPN_OP_CFG */ |
| 36 | #define ARIZONA_GPN_OP_CFG_SHIFT 9 /* GPN_OP_CFG */ |
| 37 | #define ARIZONA_GPN_OP_CFG_WIDTH 1 /* GPN_OP_CFG */ |
| 38 | #define ARIZONA_GPN_DB 0x0100 /* GPN_DB */ |
| 39 | #define ARIZONA_GPN_DB_MASK 0x0100 /* GPN_DB */ |
| 40 | #define ARIZONA_GPN_DB_SHIFT 8 /* GPN_DB */ |
| 41 | #define ARIZONA_GPN_DB_WIDTH 1 /* GPN_DB */ |
| 42 | #define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */ |
| 43 | #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */ |
| 44 | #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */ |
| 45 | |
| 46 | #define ARIZONA_MAX_GPIO 5 |
| 47 | |
| 48 | #define ARIZONA_32KZ_MCLK1 1 |
| 49 | #define ARIZONA_32KZ_MCLK2 2 |
| 50 | #define ARIZONA_32KZ_NONE 3 |
| 51 | |
Mark Brown | e102bef | 2012-07-10 12:37:58 +0100 | [diff] [blame] | 52 | #define ARIZONA_MAX_INPUT 4 |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 53 | |
| 54 | #define ARIZONA_DMIC_MICVDD 0 |
| 55 | #define ARIZONA_DMIC_MICBIAS1 1 |
| 56 | #define ARIZONA_DMIC_MICBIAS2 2 |
| 57 | #define ARIZONA_DMIC_MICBIAS3 3 |
| 58 | |
Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 59 | #define ARIZONA_MAX_MICBIAS 3 |
| 60 | |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 61 | #define ARIZONA_INMODE_DIFF 0 |
| 62 | #define ARIZONA_INMODE_SE 1 |
| 63 | #define ARIZONA_INMODE_DMIC 2 |
| 64 | |
Mark Brown | e102bef | 2012-07-10 12:37:58 +0100 | [diff] [blame] | 65 | #define ARIZONA_MAX_OUTPUT 6 |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 66 | |
Mark Brown | c94aa30 | 2013-01-17 16:35:14 +0900 | [diff] [blame] | 67 | #define ARIZONA_MAX_AIF 3 |
| 68 | |
Mark Brown | 9dd555e | 2012-11-26 21:17:21 +0000 | [diff] [blame] | 69 | #define ARIZONA_HAP_ACT_ERM 0 |
| 70 | #define ARIZONA_HAP_ACT_LRA 2 |
| 71 | |
Mark Brown | 2a51da0 | 2012-07-09 19:33:14 +0100 | [diff] [blame] | 72 | #define ARIZONA_MAX_PDM_SPK 2 |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 73 | |
| 74 | struct regulator_init_data; |
| 75 | |
Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 76 | struct arizona_micbias { |
| 77 | int mV; /** Regulated voltage */ |
| 78 | unsigned int ext_cap:1; /** External capacitor fitted */ |
| 79 | unsigned int discharge:1; /** Actively discharge */ |
Charles Keepax | f773fc6 | 2013-05-21 14:56:58 +0100 | [diff] [blame] | 80 | unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ |
Mark Brown | 544c7aa | 2013-01-29 18:44:41 +0800 | [diff] [blame] | 81 | unsigned int bypass:1; /** Use bypass mode */ |
Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 82 | }; |
| 83 | |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 84 | struct arizona_micd_config { |
| 85 | unsigned int src; |
| 86 | unsigned int bias; |
| 87 | bool gpio; |
| 88 | }; |
| 89 | |
Mark Brown | 6fed4d8 | 2013-04-01 22:03:06 +0100 | [diff] [blame] | 90 | struct arizona_micd_range { |
| 91 | int max; /** Ohms */ |
| 92 | int key; /** Key to report to input layer */ |
| 93 | }; |
| 94 | |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 95 | struct arizona_pdata { |
| 96 | int reset; /** GPIO controlling /RESET, if any */ |
| 97 | int ldoena; /** GPIO controlling LODENA, if any */ |
| 98 | |
| 99 | /** Regulator configuration for MICVDD */ |
| 100 | struct regulator_init_data *micvdd; |
| 101 | |
| 102 | /** Regulator configuration for LDO1 */ |
| 103 | struct regulator_init_data *ldo1; |
| 104 | |
| 105 | /** If a direct 32kHz clock is provided on an MCLK specify it here */ |
| 106 | int clk32k_src; |
| 107 | |
Mark Brown | f8a0941 | 2013-03-22 12:59:33 +0100 | [diff] [blame] | 108 | /** Mode for primary IRQ (defaults to active low) */ |
| 109 | unsigned int irq_flags; |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 110 | |
| 111 | /* Base GPIO */ |
| 112 | int gpio_base; |
| 113 | |
| 114 | /** Pin state for GPIO pins */ |
| 115 | int gpio_defaults[ARIZONA_MAX_GPIO]; |
| 116 | |
Mark Brown | c94aa30 | 2013-01-17 16:35:14 +0900 | [diff] [blame] | 117 | /** |
| 118 | * Maximum number of channels clocks will be generated for, |
| 119 | * useful for systems where and I2S bus with multiple data |
| 120 | * lines is mastered. |
| 121 | */ |
| 122 | int max_channels_clocked[ARIZONA_MAX_AIF]; |
| 123 | |
Mark Brown | 92a4987 | 2013-01-11 08:55:39 +0900 | [diff] [blame] | 124 | /** GPIO5 is used for jack detection */ |
| 125 | bool jd_gpio5; |
| 126 | |
Mark Brown | e56a0a5 | 2013-04-01 19:03:52 +0100 | [diff] [blame] | 127 | /** Internal pull on GPIO5 is disabled when used for jack detection */ |
| 128 | bool jd_gpio5_nopull; |
| 129 | |
Mark Brown | dd235ee | 2013-01-11 08:55:51 +0900 | [diff] [blame] | 130 | /** Use the headphone detect circuit to identify the accessory */ |
| 131 | bool hpdet_acc_id; |
| 132 | |
Mark Brown | 9c2ba27 | 2013-02-25 23:42:31 +0000 | [diff] [blame] | 133 | /** Check for line output with HPDET method */ |
| 134 | bool hpdet_acc_id_line; |
| 135 | |
Mark Brown | 1eda6aa | 2013-01-11 08:55:54 +0900 | [diff] [blame] | 136 | /** GPIO used for mic isolation with HPDET */ |
| 137 | int hpdet_id_gpio; |
| 138 | |
Mark Brown | cd59e79 | 2013-04-01 19:21:48 +0100 | [diff] [blame] | 139 | /** Extra debounce timeout used during initial mic detection (ms) */ |
| 140 | int micd_detect_debounce; |
| 141 | |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 142 | /** GPIO for mic detection polarity */ |
| 143 | int micd_pol_gpio; |
| 144 | |
Mark Brown | b17e546 | 2013-01-11 08:55:24 +0900 | [diff] [blame] | 145 | /** Mic detect ramp rate */ |
| 146 | int micd_bias_start_time; |
| 147 | |
Mark Brown | 2e033db | 2013-01-21 17:36:33 +0900 | [diff] [blame] | 148 | /** Mic detect sample rate */ |
| 149 | int micd_rate; |
| 150 | |
| 151 | /** Mic detect debounce level */ |
| 152 | int micd_dbtime; |
| 153 | |
Mark Brown | 7abd4e2 | 2013-04-01 19:25:55 +0100 | [diff] [blame] | 154 | /** Mic detect timeout (ms) */ |
| 155 | int micd_timeout; |
| 156 | |
Mark Brown | bbbd46e | 2013-01-10 19:38:43 +0000 | [diff] [blame] | 157 | /** Force MICBIAS on for mic detect */ |
| 158 | bool micd_force_micbias; |
| 159 | |
Mark Brown | 6fed4d8 | 2013-04-01 22:03:06 +0100 | [diff] [blame] | 160 | /** Mic detect level parameters */ |
| 161 | const struct arizona_micd_range *micd_ranges; |
| 162 | int num_micd_ranges; |
| 163 | |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 164 | /** Headset polarity configurations */ |
| 165 | struct arizona_micd_config *micd_configs; |
| 166 | int num_micd_configs; |
| 167 | |
| 168 | /** Reference voltage for DMIC inputs */ |
| 169 | int dmic_ref[ARIZONA_MAX_INPUT]; |
| 170 | |
Mark Brown | 3d91f82 | 2013-01-29 00:47:37 +0800 | [diff] [blame] | 171 | /** MICBIAS configurations */ |
| 172 | struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS]; |
| 173 | |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 174 | /** Mode of input structures */ |
| 175 | int inmode[ARIZONA_MAX_INPUT]; |
| 176 | |
| 177 | /** Mode for outputs */ |
| 178 | bool out_mono[ARIZONA_MAX_OUTPUT]; |
| 179 | |
| 180 | /** PDM speaker mute setting */ |
| 181 | unsigned int spk_mute[ARIZONA_MAX_PDM_SPK]; |
| 182 | |
| 183 | /** PDM speaker format */ |
| 184 | unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK]; |
Mark Brown | 9dd555e | 2012-11-26 21:17:21 +0000 | [diff] [blame] | 185 | |
| 186 | /** Haptic actuator type */ |
| 187 | unsigned int hap_act; |
Mark Brown | 3092f80 | 2013-03-24 23:05:58 +0000 | [diff] [blame] | 188 | |
| 189 | /** GPIO for primary IRQ (used for edge triggered emulation) */ |
| 190 | int irq_gpio; |
Mark Brown | 3cc7298 | 2012-06-19 16:31:53 +0100 | [diff] [blame] | 191 | }; |
| 192 | |
| 193 | #endif |