Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer |
| 3 | * (C) 2005 Red Hat Inc |
| 4 | * Alan Cox <alan@redhat.com> |
| 5 | * |
| 6 | * Based in part on linux/drivers/ide/pci/pdc202xx_old.c |
| 7 | * |
| 8 | * First cut with LBA48/ATAPI |
| 9 | * |
| 10 | * TODO: |
| 11 | * Channel interlock/reset on both required ? |
| 12 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 13 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 14 | #include <linux/kernel.h> |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/pci.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/blkdev.h> |
| 19 | #include <linux/delay.h> |
| 20 | #include <scsi/scsi_host.h> |
| 21 | #include <linux/libata.h> |
| 22 | |
| 23 | #define DRV_NAME "pata_pdc202xx_old" |
Alan | 62d64ae | 2006-11-27 16:27:20 +0000 | [diff] [blame] | 24 | #define DRV_VERSION "0.2.3" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 25 | |
| 26 | /** |
| 27 | * pdc2024x_pre_reset - probe begin |
| 28 | * @ap: ATA port |
| 29 | * |
| 30 | * Set up cable type and use generic probe init |
| 31 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 32 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 33 | static int pdc2024x_pre_reset(struct ata_port *ap) |
| 34 | { |
| 35 | ap->cbl = ATA_CBL_PATA40; |
| 36 | return ata_std_prereset(ap); |
| 37 | } |
| 38 | |
| 39 | |
| 40 | static void pdc2024x_error_handler(struct ata_port *ap) |
| 41 | { |
| 42 | ata_bmdma_drive_eh(ap, pdc2024x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 43 | } |
| 44 | |
| 45 | |
| 46 | static int pdc2026x_pre_reset(struct ata_port *ap) |
| 47 | { |
| 48 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 49 | u16 cis; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 50 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 51 | pci_read_config_word(pdev, 0x50, &cis); |
| 52 | if (cis & (1 << (10 + ap->port_no))) |
| 53 | ap->cbl = ATA_CBL_PATA80; |
| 54 | else |
| 55 | ap->cbl = ATA_CBL_PATA40; |
| 56 | |
| 57 | return ata_std_prereset(ap); |
| 58 | } |
| 59 | |
| 60 | static void pdc2026x_error_handler(struct ata_port *ap) |
| 61 | { |
| 62 | ata_bmdma_drive_eh(ap, pdc2026x_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 63 | } |
| 64 | |
| 65 | /** |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 66 | * pdc202xx_configure_piomode - set chip PIO timing |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 67 | * @ap: ATA interface |
| 68 | * @adev: ATA device |
| 69 | * @pio: PIO mode |
| 70 | * |
| 71 | * Called to do the PIO mode setup. Our timing registers are shared |
| 72 | * so a configure_dmamode call will undo any work we do here and vice |
| 73 | * versa |
| 74 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 75 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 76 | static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 77 | { |
| 78 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 79 | int port = 0x60 + 4 * ap->port_no + 2 * adev->devno; |
| 80 | static u16 pio_timing[5] = { |
| 81 | 0x0913, 0x050C , 0x0308, 0x0206, 0x0104 |
| 82 | }; |
| 83 | u8 r_ap, r_bp; |
| 84 | |
| 85 | pci_read_config_byte(pdev, port, &r_ap); |
| 86 | pci_read_config_byte(pdev, port + 1, &r_bp); |
| 87 | r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */ |
| 88 | r_bp &= ~0x07; |
| 89 | r_ap |= (pio_timing[pio] >> 8); |
| 90 | r_bp |= (pio_timing[pio] & 0xFF); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 91 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 92 | if (ata_pio_need_iordy(adev)) |
| 93 | r_ap |= 0x20; /* IORDY enable */ |
| 94 | if (adev->class == ATA_DEV_ATA) |
| 95 | r_ap |= 0x10; /* FIFO enable */ |
| 96 | pci_write_config_byte(pdev, port, r_ap); |
| 97 | pci_write_config_byte(pdev, port + 1, r_bp); |
| 98 | } |
| 99 | |
| 100 | /** |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 101 | * pdc202xx_set_piomode - set initial PIO mode data |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 102 | * @ap: ATA interface |
| 103 | * @adev: ATA device |
| 104 | * |
| 105 | * Called to do the PIO mode setup. Our timing registers are shared |
| 106 | * but we want to set the PIO timing by default. |
| 107 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 108 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 109 | static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 110 | { |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 111 | pdc202xx_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 112 | } |
| 113 | |
| 114 | /** |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 115 | * pdc202xx_configure_dmamode - set DMA mode in chip |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 116 | * @ap: ATA interface |
| 117 | * @adev: ATA device |
| 118 | * |
| 119 | * Load DMA cycle times into the chip ready for a DMA transfer |
| 120 | * to occur. |
| 121 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 122 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 123 | static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 124 | { |
| 125 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 126 | int port = 0x60 + 4 * ap->port_no + 2 * adev->devno; |
| 127 | static u8 udma_timing[6][2] = { |
| 128 | { 0x60, 0x03 }, /* 33 Mhz Clock */ |
| 129 | { 0x40, 0x02 }, |
| 130 | { 0x20, 0x01 }, |
| 131 | { 0x40, 0x02 }, /* 66 Mhz Clock */ |
| 132 | { 0x20, 0x01 }, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 133 | { 0x20, 0x01 } |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 134 | }; |
| 135 | u8 r_bp, r_cp; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 136 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 137 | pci_read_config_byte(pdev, port + 1, &r_bp); |
| 138 | pci_read_config_byte(pdev, port + 2, &r_cp); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 139 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 140 | r_bp &= ~0xF0; |
| 141 | r_cp &= ~0x0F; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 142 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 143 | if (adev->dma_mode >= XFER_UDMA_0) { |
| 144 | int speed = adev->dma_mode - XFER_UDMA_0; |
| 145 | r_bp |= udma_timing[speed][0]; |
| 146 | r_cp |= udma_timing[speed][1]; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 147 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 148 | } else { |
| 149 | int speed = adev->dma_mode - XFER_MW_DMA_0; |
| 150 | r_bp |= 0x60; |
| 151 | r_cp |= (5 - speed); |
| 152 | } |
| 153 | pci_write_config_byte(pdev, port + 1, r_bp); |
| 154 | pci_write_config_byte(pdev, port + 2, r_cp); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 155 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 156 | } |
| 157 | |
| 158 | /** |
| 159 | * pdc2026x_bmdma_start - DMA engine begin |
| 160 | * @qc: ATA command |
| 161 | * |
| 162 | * In UDMA3 or higher we have to clock switch for the duration of the |
| 163 | * DMA transfer sequence. |
| 164 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 165 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 166 | static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc) |
| 167 | { |
| 168 | struct ata_port *ap = qc->ap; |
| 169 | struct ata_device *adev = qc->dev; |
| 170 | struct ata_taskfile *tf = &qc->tf; |
| 171 | int sel66 = ap->port_no ? 0x08: 0x02; |
| 172 | |
| 173 | unsigned long master = ap->host->ports[0]->ioaddr.bmdma_addr; |
| 174 | unsigned long clock = master + 0x11; |
| 175 | unsigned long atapi_reg = master + 0x20 + (4 * ap->port_no); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 176 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 177 | u32 len; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 178 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 179 | /* Check we keep host level locking here */ |
| 180 | if (adev->dma_mode >= XFER_UDMA_2) |
| 181 | outb(inb(clock) | sel66, clock); |
| 182 | else |
| 183 | outb(inb(clock) & ~sel66, clock); |
| 184 | |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 185 | /* The DMA clocks may have been trashed by a reset. FIXME: make conditional |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 186 | and move to qc_issue ? */ |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 187 | pdc202xx_set_dmamode(ap, qc->dev); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 188 | |
| 189 | /* Cases the state machine will not complete correctly without help */ |
| 190 | if ((tf->flags & ATA_TFLAG_LBA48) || tf->protocol == ATA_PROT_ATAPI_DMA) |
| 191 | { |
| 192 | if (tf->flags & ATA_TFLAG_LBA48) |
| 193 | len = qc->nsect * 512; |
| 194 | else |
| 195 | len = qc->nbytes; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 196 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 197 | if (tf->flags & ATA_TFLAG_WRITE) |
| 198 | len |= 0x06000000; |
| 199 | else |
| 200 | len |= 0x05000000; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 201 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 202 | outl(len, atapi_reg); |
| 203 | } |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 204 | |
| 205 | /* Activate DMA */ |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 206 | ata_bmdma_start(qc); |
| 207 | } |
| 208 | |
| 209 | /** |
| 210 | * pdc2026x_bmdma_end - DMA engine stop |
| 211 | * @qc: ATA command |
| 212 | * |
| 213 | * After a DMA completes we need to put the clock back to 33MHz for |
| 214 | * PIO timings. |
| 215 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 216 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 217 | static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc) |
| 218 | { |
| 219 | struct ata_port *ap = qc->ap; |
| 220 | struct ata_device *adev = qc->dev; |
| 221 | struct ata_taskfile *tf = &qc->tf; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 222 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 223 | int sel66 = ap->port_no ? 0x08: 0x02; |
| 224 | /* The clock bits are in the same register for both channels */ |
| 225 | unsigned long master = ap->host->ports[0]->ioaddr.bmdma_addr; |
| 226 | unsigned long clock = master + 0x11; |
| 227 | unsigned long atapi_reg = master + 0x20 + (4 * ap->port_no); |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 228 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 229 | /* Cases the state machine will not complete correctly */ |
| 230 | if (tf->protocol == ATA_PROT_ATAPI_DMA || ( tf->flags & ATA_TFLAG_LBA48)) { |
| 231 | outl(0, atapi_reg); |
| 232 | outb(inb(clock) & ~sel66, clock); |
| 233 | } |
| 234 | /* Check we keep host level locking here */ |
| 235 | /* Flip back to 33Mhz for PIO */ |
| 236 | if (adev->dma_mode >= XFER_UDMA_2) |
| 237 | outb(inb(clock) & ~sel66, clock); |
| 238 | |
| 239 | ata_bmdma_stop(qc); |
| 240 | } |
| 241 | |
| 242 | /** |
| 243 | * pdc2026x_dev_config - device setup hook |
| 244 | * @ap: ATA port |
| 245 | * @adev: newly found device |
| 246 | * |
| 247 | * Perform chip specific early setup. We need to lock the transfer |
| 248 | * sizes to 8bit to avoid making the state engine on the 2026x cards |
| 249 | * barf. |
| 250 | */ |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 251 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 252 | static void pdc2026x_dev_config(struct ata_port *ap, struct ata_device *adev) |
| 253 | { |
| 254 | adev->max_sectors = 256; |
| 255 | } |
| 256 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 257 | static struct scsi_host_template pdc202xx_sht = { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 258 | .module = THIS_MODULE, |
| 259 | .name = DRV_NAME, |
| 260 | .ioctl = ata_scsi_ioctl, |
| 261 | .queuecommand = ata_scsi_queuecmd, |
| 262 | .can_queue = ATA_DEF_QUEUE, |
| 263 | .this_id = ATA_SHT_THIS_ID, |
| 264 | .sg_tablesize = LIBATA_MAX_PRD, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 265 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 266 | .emulated = ATA_SHT_EMULATED, |
| 267 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 268 | .proc_name = DRV_NAME, |
| 269 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 270 | .slave_configure = ata_scsi_slave_config, |
Tejun Heo | afdfe89 | 2006-11-29 11:26:47 +0900 | [diff] [blame] | 271 | .slave_destroy = ata_scsi_slave_destroy, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 272 | .bios_param = ata_std_bios_param, |
Alan | 62d64ae | 2006-11-27 16:27:20 +0000 | [diff] [blame] | 273 | .resume = ata_scsi_device_resume, |
| 274 | .suspend = ata_scsi_device_suspend, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 275 | }; |
| 276 | |
| 277 | static struct ata_port_operations pdc2024x_port_ops = { |
| 278 | .port_disable = ata_port_disable, |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 279 | .set_piomode = pdc202xx_set_piomode, |
| 280 | .set_dmamode = pdc202xx_set_dmamode, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 281 | .mode_filter = ata_pci_default_filter, |
| 282 | .tf_load = ata_tf_load, |
| 283 | .tf_read = ata_tf_read, |
| 284 | .check_status = ata_check_status, |
| 285 | .exec_command = ata_exec_command, |
| 286 | .dev_select = ata_std_dev_select, |
| 287 | |
| 288 | .freeze = ata_bmdma_freeze, |
| 289 | .thaw = ata_bmdma_thaw, |
| 290 | .error_handler = pdc2024x_error_handler, |
| 291 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 292 | |
| 293 | .bmdma_setup = ata_bmdma_setup, |
| 294 | .bmdma_start = ata_bmdma_start, |
| 295 | .bmdma_stop = ata_bmdma_stop, |
| 296 | .bmdma_status = ata_bmdma_status, |
| 297 | |
| 298 | .qc_prep = ata_qc_prep, |
| 299 | .qc_issue = ata_qc_issue_prot, |
| 300 | .data_xfer = ata_pio_data_xfer, |
| 301 | |
| 302 | .irq_handler = ata_interrupt, |
| 303 | .irq_clear = ata_bmdma_irq_clear, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 304 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 305 | .port_start = ata_port_start, |
| 306 | .port_stop = ata_port_stop, |
| 307 | .host_stop = ata_host_stop |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 308 | }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 309 | |
| 310 | static struct ata_port_operations pdc2026x_port_ops = { |
| 311 | .port_disable = ata_port_disable, |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 312 | .set_piomode = pdc202xx_set_piomode, |
| 313 | .set_dmamode = pdc202xx_set_dmamode, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 314 | .mode_filter = ata_pci_default_filter, |
| 315 | .tf_load = ata_tf_load, |
| 316 | .tf_read = ata_tf_read, |
| 317 | .check_status = ata_check_status, |
| 318 | .exec_command = ata_exec_command, |
| 319 | .dev_select = ata_std_dev_select, |
| 320 | .dev_config = pdc2026x_dev_config, |
| 321 | |
| 322 | .freeze = ata_bmdma_freeze, |
| 323 | .thaw = ata_bmdma_thaw, |
| 324 | .error_handler = pdc2026x_error_handler, |
| 325 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 326 | |
| 327 | .bmdma_setup = ata_bmdma_setup, |
| 328 | .bmdma_start = pdc2026x_bmdma_start, |
| 329 | .bmdma_stop = pdc2026x_bmdma_stop, |
| 330 | .bmdma_status = ata_bmdma_status, |
| 331 | |
| 332 | .qc_prep = ata_qc_prep, |
| 333 | .qc_issue = ata_qc_issue_prot, |
| 334 | .data_xfer = ata_pio_data_xfer, |
| 335 | |
| 336 | .irq_handler = ata_interrupt, |
| 337 | .irq_clear = ata_bmdma_irq_clear, |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 338 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 339 | .port_start = ata_port_start, |
| 340 | .port_stop = ata_port_stop, |
| 341 | .host_stop = ata_host_stop |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 342 | }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 343 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 344 | static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 345 | { |
| 346 | static struct ata_port_info info[3] = { |
| 347 | { |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 348 | .sht = &pdc202xx_sht, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 349 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 350 | .pio_mask = 0x1f, |
| 351 | .mwdma_mask = 0x07, |
| 352 | .udma_mask = ATA_UDMA2, |
| 353 | .port_ops = &pdc2024x_port_ops |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 354 | }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 355 | { |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 356 | .sht = &pdc202xx_sht, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 357 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 358 | .pio_mask = 0x1f, |
| 359 | .mwdma_mask = 0x07, |
| 360 | .udma_mask = ATA_UDMA4, |
| 361 | .port_ops = &pdc2026x_port_ops |
| 362 | }, |
| 363 | { |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 364 | .sht = &pdc202xx_sht, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 365 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 366 | .pio_mask = 0x1f, |
| 367 | .mwdma_mask = 0x07, |
| 368 | .udma_mask = ATA_UDMA5, |
| 369 | .port_ops = &pdc2026x_port_ops |
| 370 | } |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 371 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 372 | }; |
| 373 | static struct ata_port_info *port_info[2]; |
| 374 | |
| 375 | port_info[0] = port_info[1] = &info[id->driver_data]; |
Jeff Garzik | 85cd725 | 2006-08-31 00:03:49 -0400 | [diff] [blame] | 376 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 377 | if (dev->device == PCI_DEVICE_ID_PROMISE_20265) { |
| 378 | struct pci_dev *bridge = dev->bus->self; |
| 379 | /* Don't grab anything behind a Promise I2O RAID */ |
| 380 | if (bridge && bridge->vendor == PCI_VENDOR_ID_INTEL) { |
| 381 | if( bridge->device == PCI_DEVICE_ID_INTEL_I960) |
| 382 | return -ENODEV; |
| 383 | if( bridge->device == PCI_DEVICE_ID_INTEL_I960RM) |
| 384 | return -ENODEV; |
| 385 | } |
| 386 | } |
| 387 | return ata_pci_init_one(dev, port_info, 2); |
| 388 | } |
| 389 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 390 | static const struct pci_device_id pdc202xx[] = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 391 | { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 }, |
| 392 | { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 }, |
| 393 | { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 1 }, |
| 394 | { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 2 }, |
| 395 | { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 2 }, |
| 396 | |
| 397 | { }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 398 | }; |
| 399 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 400 | static struct pci_driver pdc202xx_pci_driver = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 401 | .name = DRV_NAME, |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 402 | .id_table = pdc202xx, |
| 403 | .probe = pdc202xx_init_one, |
Alan | 62d64ae | 2006-11-27 16:27:20 +0000 | [diff] [blame] | 404 | .remove = ata_pci_remove_one, |
| 405 | .suspend = ata_pci_device_suspend, |
| 406 | .resume = ata_pci_device_resume, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 407 | }; |
| 408 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 409 | static int __init pdc202xx_init(void) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 410 | { |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 411 | return pci_register_driver(&pdc202xx_pci_driver); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 412 | } |
| 413 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 414 | static void __exit pdc202xx_exit(void) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 415 | { |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 416 | pci_unregister_driver(&pdc202xx_pci_driver); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 417 | } |
| 418 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 419 | MODULE_AUTHOR("Alan Cox"); |
| 420 | MODULE_DESCRIPTION("low-level driver for Promise 2024x and 20262-20267"); |
| 421 | MODULE_LICENSE("GPL"); |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 422 | MODULE_DEVICE_TABLE(pci, pdc202xx); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 423 | MODULE_VERSION(DRV_VERSION); |
| 424 | |
Alan Cox | ada406c | 2006-11-03 13:18:06 +0000 | [diff] [blame] | 425 | module_init(pdc202xx_init); |
| 426 | module_exit(pdc202xx_exit); |