| Anatop Voltage regulators |
| |
| Required properties: |
| - compatible: Must be "fsl,anatop-regulator" |
| - regulator-name: A string used as a descriptive name for regulator outputs |
| - anatop-reg-offset: Anatop MFD register offset |
| - anatop-vol-bit-shift: Bit shift for the register |
| - anatop-vol-bit-width: Number of bits used in the register |
| - anatop-min-bit-val: Minimum value of this register |
| - anatop-min-voltage: Minimum voltage of this regulator |
| - anatop-max-voltage: Maximum voltage of this regulator |
| |
| Optional properties: |
| - anatop-delay-reg-offset: Anatop MFD step time register offset |
| - anatop-delay-bit-shift: Bit shift for the step time register |
| - anatop-delay-bit-width: Number of bits used in the step time register |
| - vin-supply: The supply for this regulator |
| - anatop-enable-bit: Regulator enable bit offset |
| |
| Any property defined as part of the core regulator |
| binding, defined in regulator.txt, can also be used. |
| |
| Example: |
| |
| regulator-vddpu { |
| compatible = "fsl,anatop-regulator"; |
| regulator-name = "vddpu"; |
| regulator-min-microvolt = <725000>; |
| regulator-max-microvolt = <1300000>; |
| regulator-always-on; |
| anatop-reg-offset = <0x140>; |
| anatop-vol-bit-shift = <9>; |
| anatop-vol-bit-width = <5>; |
| anatop-delay-reg-offset = <0x170>; |
| anatop-delay-bit-shift = <24>; |
| anatop-delay-bit-width = <2>; |
| anatop-min-bit-val = <1>; |
| anatop-min-voltage = <725000>; |
| anatop-max-voltage = <1300000>; |
| }; |
