Sign in
gem5
/
arm
/
linux
/
2118df93b5e1742931da358c2b8804c46fd64490
/
.
/
Documentation
/
devicetree
/
bindings
/
reset
/
st,stm32-rcc.txt
blob: 01db34375192e64e151d68ea77805bc987885109 [
file
] [
log
] [
blame
]
STMicroelectronics STM32 Peripheral Reset Controller
====================================================
The RCC IP is both a reset and a clock controller.
Please see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt