| /* | |
| * Copyright (c) 2016 Andreas Färber | |
| * | |
| * This file is dual-licensed: you can use it either under the terms | |
| * of the GPL or the X11 license, at your option. Note that this dual | |
| * licensing only applies to this file, and not this project as a | |
| * whole. | |
| * | |
| * a) This library is free software; you can redistribute it and/or | |
| * modify it under the terms of the GNU General Public License as | |
| * published by the Free Software Foundation; either version 2 of the | |
| * License, or (at your option) any later version. | |
| * | |
| * This library is distributed in the hope that it will be useful, | |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| * GNU General Public License for more details. | |
| * | |
| * Or, alternatively, | |
| * | |
| * b) Permission is hereby granted, free of charge, to any person | |
| * obtaining a copy of this software and associated documentation | |
| * files (the "Software"), to deal in the Software without | |
| * restriction, including without limitation the rights to use, | |
| * copy, modify, merge, publish, distribute, sublicense, and/or | |
| * sell copies of the Software, and to permit persons to whom the | |
| * Software is furnished to do so, subject to the following | |
| * conditions: | |
| * | |
| * The above copyright notice and this permission notice shall be | |
| * included in all copies or substantial portions of the Software. | |
| * | |
| * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| * OTHER DEALINGS IN THE SOFTWARE. | |
| */ | |
| #include <dt-bindings/gpio/gpio.h> | |
| #include <dt-bindings/interrupt-controller/irq.h> | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| #include <dt-bindings/gpio/meson-gxbb-gpio.h> | |
| #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> | |
| #include <dt-bindings/clock/gxbb-clkc.h> | |
| #include <dt-bindings/clock/gxbb-aoclkc.h> | |
| #include <dt-bindings/reset/gxbb-aoclkc.h> | |
| / { | |
| compatible = "amlogic,meson-gxbb"; | |
| interrupt-parent = <&gic>; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| cpus { | |
| #address-cells = <0x2>; | |
| #size-cells = <0x0>; | |
| cpu0: cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53", "arm,armv8"; | |
| reg = <0x0 0x0>; | |
| enable-method = "psci"; | |
| }; | |
| cpu1: cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53", "arm,armv8"; | |
| reg = <0x0 0x1>; | |
| enable-method = "psci"; | |
| }; | |
| cpu2: cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53", "arm,armv8"; | |
| reg = <0x0 0x2>; | |
| enable-method = "psci"; | |
| }; | |
| cpu3: cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53", "arm,armv8"; | |
| reg = <0x0 0x3>; | |
| enable-method = "psci"; | |
| }; | |
| }; | |
| arm-pmu { | |
| compatible = "arm,cortex-a53-pmu"; | |
| interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, | |
| <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | |
| interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; | |
| }; | |
| psci { | |
| compatible = "arm,psci-0.2"; | |
| method = "smc"; | |
| }; | |
| firmware { | |
| sm: secure-monitor { | |
| compatible = "amlogic,meson-gxbb-sm"; | |
| }; | |
| }; | |
| efuse: efuse { | |
| compatible = "amlogic,meson-gxbb-efuse"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| sn: sn@14 { | |
| reg = <0x14 0x10>; | |
| }; | |
| eth_mac: eth_mac@34 { | |
| reg = <0x34 0x10>; | |
| }; | |
| bid: bid@46 { | |
| reg = <0x46 0x30>; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv8-timer"; | |
| interrupts = <GIC_PPI 13 | |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, | |
| <GIC_PPI 14 | |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, | |
| <GIC_PPI 11 | |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>, | |
| <GIC_PPI 10 | |
| (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>; | |
| }; | |
| xtal: xtal-clk { | |
| compatible = "fixed-clock"; | |
| clock-frequency = <24000000>; | |
| clock-output-names = "xtal"; | |
| #clock-cells = <0>; | |
| }; | |
| soc { | |
| compatible = "simple-bus"; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges; | |
| usb0_phy: phy@c0000000 { | |
| compatible = "amlogic,meson-gxbb-usb2-phy"; | |
| #phy-cells = <0>; | |
| reg = <0x0 0xc0000000 0x0 0x20>; | |
| resets = <&reset RESET_USB_OTG>; | |
| clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>; | |
| clock-names = "usb_general", "usb"; | |
| status = "disabled"; | |
| }; | |
| usb1_phy: phy@c0000020 { | |
| compatible = "amlogic,meson-gxbb-usb2-phy"; | |
| #phy-cells = <0>; | |
| reg = <0x0 0xc0000020 0x0 0x20>; | |
| clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>; | |
| clock-names = "usb_general", "usb"; | |
| status = "disabled"; | |
| }; | |
| cbus: cbus@c1100000 { | |
| compatible = "simple-bus"; | |
| reg = <0x0 0xc1100000 0x0 0x100000>; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; | |
| reset: reset-controller@4404 { | |
| compatible = "amlogic,meson-gxbb-reset"; | |
| reg = <0x0 0x04404 0x0 0x20>; | |
| #reset-cells = <1>; | |
| }; | |
| uart_A: serial@84c0 { | |
| compatible = "amlogic,meson-uart"; | |
| reg = <0x0 0x84c0 0x0 0x14>; | |
| interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&xtal>; | |
| status = "disabled"; | |
| }; | |
| uart_B: serial@84dc { | |
| compatible = "amlogic,meson-uart"; | |
| reg = <0x0 0x84dc 0x0 0x14>; | |
| interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&xtal>; | |
| status = "disabled"; | |
| }; | |
| pwm_ab: pwm@8550 { | |
| compatible = "amlogic,meson-gxbb-pwm"; | |
| reg = <0x0 0x08550 0x0 0x10>; | |
| #pwm-cells = <3>; | |
| status = "disabled"; | |
| }; | |
| pwm_cd: pwm@8650 { | |
| compatible = "amlogic,meson-gxbb-pwm"; | |
| reg = <0x0 0x08650 0x0 0x10>; | |
| #pwm-cells = <3>; | |
| status = "disabled"; | |
| }; | |
| pwm_ef: pwm@86c0 { | |
| compatible = "amlogic,meson-gxbb-pwm"; | |
| reg = <0x0 0x086c0 0x0 0x10>; | |
| #pwm-cells = <3>; | |
| status = "disabled"; | |
| }; | |
| uart_C: serial@8700 { | |
| compatible = "amlogic,meson-uart"; | |
| reg = <0x0 0x8700 0x0 0x14>; | |
| interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&xtal>; | |
| status = "disabled"; | |
| }; | |
| watchdog@98d0 { | |
| compatible = "amlogic,meson-gxbb-wdt"; | |
| reg = <0x0 0x098d0 0x0 0x10>; | |
| clocks = <&xtal>; | |
| }; | |
| spifc: spi@8c80 { | |
| compatible = "amlogic,meson-gxbb-spifc"; | |
| reg = <0x0 0x08c80 0x0 0x80>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| clocks = <&clkc CLKID_SPI>; | |
| status = "disabled"; | |
| }; | |
| i2c_A: i2c@8500 { | |
| compatible = "amlogic,meson-gxbb-i2c"; | |
| reg = <0x0 0x08500 0x0 0x20>; | |
| interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&clkc CLKID_I2C>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| status = "disabled"; | |
| }; | |
| i2c_B: i2c@87c0 { | |
| compatible = "amlogic,meson-gxbb-i2c"; | |
| reg = <0x0 0x087c0 0x0 0x20>; | |
| interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&clkc CLKID_I2C>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| status = "disabled"; | |
| }; | |
| i2c_C: i2c@87e0 { | |
| compatible = "amlogic,meson-gxbb-i2c"; | |
| reg = <0x0 0x087e0 0x0 0x20>; | |
| interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&clkc CLKID_I2C>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| gic: interrupt-controller@c4301000 { | |
| compatible = "arm,gic-400"; | |
| reg = <0x0 0xc4301000 0 0x1000>, | |
| <0x0 0xc4302000 0 0x2000>, | |
| <0x0 0xc4304000 0 0x2000>, | |
| <0x0 0xc4306000 0 0x2000>; | |
| interrupt-controller; | |
| interrupts = <GIC_PPI 9 | |
| (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; | |
| #interrupt-cells = <3>; | |
| #address-cells = <0>; | |
| }; | |
| aobus: aobus@c8100000 { | |
| compatible = "simple-bus"; | |
| reg = <0x0 0xc8100000 0x0 0x100000>; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; | |
| pinctrl_aobus: pinctrl@14 { | |
| compatible = "amlogic,meson-gxbb-aobus-pinctrl"; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges; | |
| gpio_ao: bank@14 { | |
| reg = <0x0 0x00014 0x0 0x8>, | |
| <0x0 0x0002c 0x0 0x4>, | |
| <0x0 0x00024 0x0 0x8>; | |
| reg-names = "mux", "pull", "gpio"; | |
| gpio-controller; | |
| #gpio-cells = <2>; | |
| }; | |
| uart_ao_a_pins: uart_ao_a { | |
| mux { | |
| groups = "uart_tx_ao_a", "uart_rx_ao_a"; | |
| function = "uart_ao"; | |
| }; | |
| }; | |
| remote_input_ao_pins: remote_input_ao { | |
| mux { | |
| groups = "remote_input_ao"; | |
| function = "remote_input_ao"; | |
| }; | |
| }; | |
| i2c_ao_pins: i2c_ao { | |
| mux { | |
| groups = "i2c_sck_ao", | |
| "i2c_sda_ao"; | |
| function = "i2c_ao"; | |
| }; | |
| }; | |
| pwm_ao_a_3_pins: pwm_ao_a_3 { | |
| mux { | |
| groups = "pwm_ao_a_3"; | |
| function = "pwm_ao_a_3"; | |
| }; | |
| }; | |
| pwm_ao_a_6_pins: pwm_ao_a_6 { | |
| mux { | |
| groups = "pwm_ao_a_6"; | |
| function = "pwm_ao_a_6"; | |
| }; | |
| }; | |
| pwm_ao_a_12_pins: pwm_ao_a_12 { | |
| mux { | |
| groups = "pwm_ao_a_12"; | |
| function = "pwm_ao_a_12"; | |
| }; | |
| }; | |
| pwm_ao_b_pins: pwm_ao_b { | |
| mux { | |
| groups = "pwm_ao_b"; | |
| function = "pwm_ao_b"; | |
| }; | |
| }; | |
| }; | |
| clkc_AO: clock-controller@040 { | |
| compatible = "amlogic,gxbb-aoclkc"; | |
| reg = <0x0 0x00040 0x0 0x4>; | |
| #clock-cells = <1>; | |
| #reset-cells = <1>; | |
| }; | |
| uart_AO: serial@4c0 { | |
| compatible = "amlogic,meson-uart"; | |
| reg = <0x0 0x004c0 0x0 0x14>; | |
| interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&xtal>; | |
| status = "disabled"; | |
| }; | |
| ir: ir@580 { | |
| compatible = "amlogic,meson-gxbb-ir"; | |
| reg = <0x0 0x00580 0x0 0x40>; | |
| interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; | |
| status = "disabled"; | |
| }; | |
| pwm_ab_AO: pwm@550 { | |
| compatible = "amlogic,meson-gxbb-pwm"; | |
| reg = <0x0 0x0550 0x0 0x10>; | |
| #pwm-cells = <3>; | |
| status = "disabled"; | |
| }; | |
| i2c_AO: i2c@500 { | |
| compatible = "amlogic,meson-gxbb-i2c"; | |
| reg = <0x0 0x500 0x0 0x20>; | |
| interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; | |
| clocks = <&clkc CLKID_AO_I2C>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| periphs: periphs@c8834000 { | |
| compatible = "simple-bus"; | |
| reg = <0x0 0xc8834000 0x0 0x2000>; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; | |
| rng { | |
| compatible = "amlogic,meson-rng"; | |
| reg = <0x0 0x0 0x0 0x4>; | |
| }; | |
| pinctrl_periphs: pinctrl@4b0 { | |
| compatible = "amlogic,meson-gxbb-periphs-pinctrl"; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges; | |
| gpio: bank@4b0 { | |
| reg = <0x0 0x004b0 0x0 0x28>, | |
| <0x0 0x004e8 0x0 0x14>, | |
| <0x0 0x00120 0x0 0x14>, | |
| <0x0 0x00430 0x0 0x40>; | |
| reg-names = "mux", "pull", "pull-enable", "gpio"; | |
| gpio-controller; | |
| #gpio-cells = <2>; | |
| }; | |
| emmc_pins: emmc { | |
| mux { | |
| groups = "emmc_nand_d07", | |
| "emmc_cmd", | |
| "emmc_clk"; | |
| function = "emmc"; | |
| }; | |
| }; | |
| nor_pins: nor { | |
| mux { | |
| groups = "nor_d", | |
| "nor_q", | |
| "nor_c", | |
| "nor_cs"; | |
| function = "nor"; | |
| }; | |
| }; | |
| sdcard_pins: sdcard { | |
| mux { | |
| groups = "sdcard_d0", | |
| "sdcard_d1", | |
| "sdcard_d2", | |
| "sdcard_d3", | |
| "sdcard_cmd", | |
| "sdcard_clk"; | |
| function = "sdcard"; | |
| }; | |
| }; | |
| sdio_pins: sdio { | |
| mux { | |
| groups = "sdio_d0", | |
| "sdio_d1", | |
| "sdio_d2", | |
| "sdio_d3", | |
| "sdio_cmd", | |
| "sdio_clk"; | |
| function = "sdio"; | |
| }; | |
| }; | |
| sdio_irq_pins: sdio_irq { | |
| mux { | |
| groups = "sdio_irq"; | |
| function = "sdio"; | |
| }; | |
| }; | |
| uart_a_pins: uart_a { | |
| mux { | |
| groups = "uart_tx_a", | |
| "uart_rx_a"; | |
| function = "uart_a"; | |
| }; | |
| }; | |
| uart_b_pins: uart_b { | |
| mux { | |
| groups = "uart_tx_b", | |
| "uart_rx_b"; | |
| function = "uart_b"; | |
| }; | |
| }; | |
| uart_c_pins: uart_c { | |
| mux { | |
| groups = "uart_tx_c", | |
| "uart_rx_c"; | |
| function = "uart_c"; | |
| }; | |
| }; | |
| i2c_a_pins: i2c_a { | |
| mux { | |
| groups = "i2c_sck_a", | |
| "i2c_sda_a"; | |
| function = "i2c_a"; | |
| }; | |
| }; | |
| i2c_b_pins: i2c_b { | |
| mux { | |
| groups = "i2c_sck_b", | |
| "i2c_sda_b"; | |
| function = "i2c_b"; | |
| }; | |
| }; | |
| i2c_c_pins: i2c_c { | |
| mux { | |
| groups = "i2c_sck_c", | |
| "i2c_sda_c"; | |
| function = "i2c_c"; | |
| }; | |
| }; | |
| eth_pins: eth_c { | |
| mux { | |
| groups = "eth_mdio", | |
| "eth_mdc", | |
| "eth_clk_rx_clk", | |
| "eth_rx_dv", | |
| "eth_rxd0", | |
| "eth_rxd1", | |
| "eth_rxd2", | |
| "eth_rxd3", | |
| "eth_rgmii_tx_clk", | |
| "eth_tx_en", | |
| "eth_txd0", | |
| "eth_txd1", | |
| "eth_txd2", | |
| "eth_txd3"; | |
| function = "eth"; | |
| }; | |
| }; | |
| pwm_a_x_pins: pwm_a_x { | |
| mux { | |
| groups = "pwm_a_x"; | |
| function = "pwm_a_x"; | |
| }; | |
| }; | |
| pwm_a_y_pins: pwm_a_y { | |
| mux { | |
| groups = "pwm_a_y"; | |
| function = "pwm_a_y"; | |
| }; | |
| }; | |
| pwm_b_pins: pwm_b { | |
| mux { | |
| groups = "pwm_b"; | |
| function = "pwm_b"; | |
| }; | |
| }; | |
| pwm_d_pins: pwm_d { | |
| mux { | |
| groups = "pwm_d"; | |
| function = "pwm_d"; | |
| }; | |
| }; | |
| pwm_e_pins: pwm_e { | |
| mux { | |
| groups = "pwm_e"; | |
| function = "pwm_e"; | |
| }; | |
| }; | |
| pwm_f_x_pins: pwm_f_x { | |
| mux { | |
| groups = "pwm_f_x"; | |
| function = "pwm_f_x"; | |
| }; | |
| }; | |
| pwm_f_y_pins: pwm_f_y { | |
| mux { | |
| groups = "pwm_f_y"; | |
| function = "pwm_f_y"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| hiubus: hiubus@c883c000 { | |
| compatible = "simple-bus"; | |
| reg = <0x0 0xc883c000 0x0 0x2000>; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; | |
| clkc: clock-controller@0 { | |
| compatible = "amlogic,gxbb-clkc"; | |
| #clock-cells = <1>; | |
| reg = <0x0 0x0 0x0 0x3db>; | |
| }; | |
| mailbox: mailbox@404 { | |
| compatible = "amlogic,meson-gxbb-mhu"; | |
| reg = <0 0x404 0 0x4c>; | |
| interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, | |
| <0 209 IRQ_TYPE_EDGE_RISING>, | |
| <0 210 IRQ_TYPE_EDGE_RISING>; | |
| #mbox-cells = <1>; | |
| }; | |
| }; | |
| apb: apb@d0000000 { | |
| compatible = "simple-bus"; | |
| reg = <0x0 0xd0000000 0x0 0x200000>; | |
| #address-cells = <2>; | |
| #size-cells = <2>; | |
| ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>; | |
| }; | |
| usb0: usb@c9000000 { | |
| compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; | |
| reg = <0x0 0xc9000000 0x0 0x40000>; | |
| interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&clkc CLKID_USB0_DDR_BRIDGE>; | |
| clock-names = "otg"; | |
| phys = <&usb0_phy>; | |
| phy-names = "usb2-phy"; | |
| dr_mode = "host"; | |
| status = "disabled"; | |
| }; | |
| usb1: usb@c9100000 { | |
| compatible = "amlogic,meson-gxbb-usb", "snps,dwc2"; | |
| reg = <0x0 0xc9100000 0x0 0x40000>; | |
| interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | |
| clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; | |
| clock-names = "otg"; | |
| phys = <&usb1_phy>; | |
| phy-names = "usb2-phy"; | |
| dr_mode = "host"; | |
| status = "disabled"; | |
| }; | |
| ethmac: ethernet@c9410000 { | |
| compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; | |
| reg = <0x0 0xc9410000 0x0 0x10000 | |
| 0x0 0xc8834540 0x0 0x4>; | |
| interrupts = <0 8 1>; | |
| interrupt-names = "macirq"; | |
| clocks = <&clkc CLKID_ETH>, | |
| <&clkc CLKID_FCLK_DIV2>, | |
| <&clkc CLKID_MPLL2>; | |
| clock-names = "stmmaceth", "clkin0", "clkin1"; | |
| phy-mode = "rgmii"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| }; |