| /* | |
| * MPC8349E-mITX Device Tree Source | |
| * | |
| * Copyright 2006 Freescale Semiconductor Inc. | |
| * | |
| * This program is free software; you can redistribute it and/or modify it | |
| * under the terms of the GNU General Public License as published by the | |
| * Free Software Foundation; either version 2 of the License, or (at your | |
| * option) any later version. | |
| */ | |
| /dts-v1/; | |
| / { | |
| model = "MPC8349EMITX"; | |
| compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| aliases { | |
| ethernet0 = &enet0; | |
| ethernet1 = &enet1; | |
| serial0 = &serial0; | |
| serial1 = &serial1; | |
| pci0 = &pci0; | |
| pci1 = &pci1; | |
| }; | |
| cpus { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| PowerPC,8349@0 { | |
| device_type = "cpu"; | |
| reg = <0x0>; | |
| d-cache-line-size = <32>; | |
| i-cache-line-size = <32>; | |
| d-cache-size = <32768>; | |
| i-cache-size = <32768>; | |
| timebase-frequency = <0>; // from bootloader | |
| bus-frequency = <0>; // from bootloader | |
| clock-frequency = <0>; // from bootloader | |
| }; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x00000000 0x10000000>; | |
| }; | |
| soc8349@e0000000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| device_type = "soc"; | |
| compatible = "simple-bus"; | |
| ranges = <0x0 0xe0000000 0x00100000>; | |
| reg = <0xe0000000 0x00000200>; | |
| bus-frequency = <0>; // from bootloader | |
| wdt@200 { | |
| device_type = "watchdog"; | |
| compatible = "mpc83xx_wdt"; | |
| reg = <0x200 0x100>; | |
| }; | |
| gpio1: gpio-controller@c00 { | |
| #gpio-cells = <2>; | |
| compatible = "fsl,mpc8349-gpio"; | |
| reg = <0xc00 0x100>; | |
| interrupts = <74 0x8>; | |
| interrupt-parent = <&ipic>; | |
| gpio-controller; | |
| }; | |
| gpio2: gpio-controller@d00 { | |
| #gpio-cells = <2>; | |
| compatible = "fsl,mpc8349-gpio"; | |
| reg = <0xd00 0x100>; | |
| interrupts = <75 0x8>; | |
| interrupt-parent = <&ipic>; | |
| gpio-controller; | |
| }; | |
| i2c@3000 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cell-index = <0>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x3000 0x100>; | |
| interrupts = <14 0x8>; | |
| interrupt-parent = <&ipic>; | |
| dfsrr; | |
| eeprom: at24@50 { | |
| compatible = "st,24c256"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@3100 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cell-index = <1>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x3100 0x100>; | |
| interrupts = <15 0x8>; | |
| interrupt-parent = <&ipic>; | |
| dfsrr; | |
| rtc@68 { | |
| compatible = "dallas,ds1339"; | |
| reg = <0x68>; | |
| interrupts = <18 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| pcf1: iexp@38 { | |
| #gpio-cells = <2>; | |
| compatible = "ti,pcf8574a"; | |
| reg = <0x38>; | |
| gpio-controller; | |
| }; | |
| pcf2: iexp@39 { | |
| #gpio-cells = <2>; | |
| compatible = "ti,pcf8574a"; | |
| reg = <0x39>; | |
| gpio-controller; | |
| }; | |
| spd: at24@51 { | |
| compatible = "at24,spd"; | |
| reg = <0x51>; | |
| }; | |
| mcu_pio: mcu@a { | |
| #gpio-cells = <2>; | |
| compatible = "fsl,mc9s08qg8-mpc8349emitx", | |
| "fsl,mcu-mpc8349emitx"; | |
| reg = <0x0a>; | |
| gpio-controller; | |
| }; | |
| }; | |
| spi@7000 { | |
| cell-index = <0>; | |
| compatible = "fsl,spi"; | |
| reg = <0x7000 0x1000>; | |
| interrupts = <16 0x8>; | |
| interrupt-parent = <&ipic>; | |
| mode = "cpu"; | |
| }; | |
| dma@82a8 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | |
| reg = <0x82a8 4>; | |
| ranges = <0 0x8100 0x1a8>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| cell-index = <0>; | |
| dma-channel@0 { | |
| compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0 0x80>; | |
| cell-index = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@80 { | |
| compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x80 0x80>; | |
| cell-index = <1>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@100 { | |
| compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x100 0x80>; | |
| cell-index = <2>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@180 { | |
| compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x180 0x28>; | |
| cell-index = <3>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| }; | |
| usb@22000 { | |
| compatible = "fsl-usb2-mph"; | |
| reg = <0x22000 0x1000>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <39 0x8>; | |
| phy_type = "ulpi"; | |
| port0; | |
| }; | |
| usb@23000 { | |
| compatible = "fsl-usb2-dr"; | |
| reg = <0x23000 0x1000>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <38 0x8>; | |
| dr_mode = "peripheral"; | |
| phy_type = "ulpi"; | |
| }; | |
| enet0: ethernet@24000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| cell-index = <0>; | |
| device_type = "network"; | |
| model = "TSEC"; | |
| compatible = "gianfar"; | |
| reg = <0x24000 0x1000>; | |
| ranges = <0x0 0x24000 0x1000>; | |
| local-mac-address = [ 00 00 00 00 00 00 ]; | |
| interrupts = <32 0x8 33 0x8 34 0x8>; | |
| interrupt-parent = <&ipic>; | |
| tbi-handle = <&tbi0>; | |
| phy-handle = <&phy1c>; | |
| linux,network-index = <0>; | |
| mdio@520 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "fsl,gianfar-mdio"; | |
| reg = <0x520 0x20>; | |
| /* Vitesse 8201 */ | |
| phy1c: ethernet-phy@1c { | |
| interrupt-parent = <&ipic>; | |
| interrupts = <18 0x8>; | |
| reg = <0x1c>; | |
| }; | |
| tbi0: tbi-phy@11 { | |
| reg = <0x11>; | |
| device_type = "tbi-phy"; | |
| }; | |
| }; | |
| }; | |
| enet1: ethernet@25000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| cell-index = <1>; | |
| device_type = "network"; | |
| model = "TSEC"; | |
| compatible = "gianfar"; | |
| reg = <0x25000 0x1000>; | |
| ranges = <0x0 0x25000 0x1000>; | |
| local-mac-address = [ 00 00 00 00 00 00 ]; | |
| interrupts = <35 0x8 36 0x8 37 0x8>; | |
| interrupt-parent = <&ipic>; | |
| /* Vitesse 7385 isn't on the MDIO bus */ | |
| fixed-link = <1 1 1000 0 0>; | |
| linux,network-index = <1>; | |
| tbi-handle = <&tbi1>; | |
| mdio@520 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "fsl,gianfar-tbi"; | |
| reg = <0x520 0x20>; | |
| tbi1: tbi-phy@11 { | |
| reg = <0x11>; | |
| device_type = "tbi-phy"; | |
| }; | |
| }; | |
| }; | |
| serial0: serial@4500 { | |
| cell-index = <0>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x4500 0x100>; | |
| clock-frequency = <0>; // from bootloader | |
| interrupts = <9 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| serial1: serial@4600 { | |
| cell-index = <1>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x4600 0x100>; | |
| clock-frequency = <0>; // from bootloader | |
| interrupts = <10 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| crypto@30000 { | |
| compatible = "fsl,sec2.0"; | |
| reg = <0x30000 0x10000>; | |
| interrupts = <11 0x8>; | |
| interrupt-parent = <&ipic>; | |
| fsl,num-channels = <4>; | |
| fsl,channel-fifo-len = <24>; | |
| fsl,exec-units-mask = <0x7e>; | |
| fsl,descriptor-types-mask = <0x01010ebf>; | |
| }; | |
| ipic: pic@700 { | |
| interrupt-controller; | |
| #address-cells = <0>; | |
| #interrupt-cells = <2>; | |
| reg = <0x700 0x100>; | |
| device_type = "ipic"; | |
| }; | |
| gpio-leds { | |
| compatible = "gpio-leds"; | |
| green { | |
| label = "Green"; | |
| gpios = <&pcf1 0 1>; | |
| linux,default-trigger = "heartbeat"; | |
| }; | |
| yellow { | |
| label = "Yellow"; | |
| gpios = <&pcf1 1 1>; | |
| /* linux,default-trigger = "heartbeat"; */ | |
| default-state = "on"; | |
| }; | |
| }; | |
| }; | |
| pci0: pci@e0008500 { | |
| interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
| interrupt-map = < | |
| /* IDSEL 0x10 - SATA */ | |
| 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */ | |
| >; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <66 0x8>; | |
| bus-range = <0x0 0x0>; | |
| ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | |
| 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | |
| 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; | |
| clock-frequency = <66666666>; | |
| #interrupt-cells = <1>; | |
| #size-cells = <2>; | |
| #address-cells = <3>; | |
| reg = <0xe0008500 0x100 /* internal registers */ | |
| 0xe0008300 0x8>; /* config space access registers */ | |
| compatible = "fsl,mpc8349-pci"; | |
| device_type = "pci"; | |
| }; | |
| pci1: pci@e0008600 { | |
| interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
| interrupt-map = < | |
| /* IDSEL 0x0E - MiniPCI Slot */ | |
| 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */ | |
| /* IDSEL 0x0F - PCI Slot */ | |
| 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ | |
| 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ | |
| >; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <67 0x8>; | |
| bus-range = <0x0 0x0>; | |
| ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 | |
| 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 | |
| 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; | |
| clock-frequency = <66666666>; | |
| #interrupt-cells = <1>; | |
| #size-cells = <2>; | |
| #address-cells = <3>; | |
| reg = <0xe0008600 0x100 /* internal registers */ | |
| 0xe0008380 0x8>; /* config space access registers */ | |
| compatible = "fsl,mpc8349-pci"; | |
| device_type = "pci"; | |
| }; | |
| localbus@e0005000 { | |
| #address-cells = <2>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8349e-localbus", | |
| "fsl,pq2pro-localbus", | |
| "simple-bus"; | |
| reg = <0xe0005000 0xd8>; | |
| ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */ | |
| 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */ | |
| 0x2 0x0 0xf9000000 0x200000 /* exp slot */ | |
| 0x3 0x0 0xf0000000 0x210>; /* CF slot */ | |
| flash@0,0 { | |
| compatible = "cfi-flash"; | |
| reg = <0x0 0x0 0x800000>; | |
| bank-width = <2>; | |
| device-width = <1>; | |
| }; | |
| flash@0,800000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "cfi-flash"; | |
| reg = <0x0 0x800000 0x800000>; | |
| bank-width = <2>; | |
| device-width = <1>; | |
| }; | |
| pata@3,0 { | |
| compatible = "fsl,mpc8349emitx-pata", "ata-generic"; | |
| reg = <0x3 0x0 0x10 0x3 0x20c 0x4>; | |
| reg-shift = <1>; | |
| pio-mode = <6>; | |
| interrupts = <23 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| }; | |
| }; |