| # | |
| # Bus Devices | |
| # | |
| menu "Bus devices" | |
| config ARM_CCI | |
| bool | |
| config ARM_CCI_PMU | |
| bool | |
| select ARM_CCI | |
| config ARM_CCI400_COMMON | |
| bool | |
| select ARM_CCI | |
| config ARM_CCI400_PMU | |
| bool "ARM CCI400 PMU support" | |
| depends on (ARM && CPU_V7) || ARM64 | |
| depends on PERF_EVENTS | |
| select ARM_CCI400_COMMON | |
| select ARM_CCI_PMU | |
| help | |
| Support for PMU events monitoring on the ARM CCI-400 (cache coherent | |
| interconnect). CCI-400 supports counting events related to the | |
| connected slave/master interfaces. | |
| config ARM_CCI400_PORT_CTRL | |
| bool | |
| depends on ARM && OF && CPU_V7 | |
| select ARM_CCI400_COMMON | |
| help | |
| Low level power management driver for CCI400 cache coherent | |
| interconnect for ARM platforms. | |
| config ARM_CCI5xx_PMU | |
| bool "ARM CCI-500/CCI-550 PMU support" | |
| depends on (ARM && CPU_V7) || ARM64 | |
| depends on PERF_EVENTS | |
| select ARM_CCI_PMU | |
| help | |
| Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache | |
| coherent interconnects. Both of them provide 8 independent event counters, | |
| which can count events pertaining to the slave/master interfaces as well | |
| as the internal events to the CCI. | |
| If unsure, say Y | |
| config ARM_CCN | |
| tristate "ARM CCN driver support" | |
| depends on ARM || ARM64 | |
| depends on PERF_EVENTS | |
| help | |
| PMU (perf) driver supporting the ARM CCN (Cache Coherent Network) | |
| interconnect. | |
| config BRCMSTB_GISB_ARB | |
| bool "Broadcom STB GISB bus arbiter" | |
| depends on ARM || MIPS | |
| default ARCH_BRCMSTB || BMIPS_GENERIC | |
| help | |
| Driver for the Broadcom Set Top Box System-on-a-chip internal bus | |
| arbiter. This driver provides timeout and target abort error handling | |
| and internal bus master decoding. | |
| config IMX_WEIM | |
| bool "Freescale EIM DRIVER" | |
| depends on ARCH_MXC | |
| help | |
| Driver for i.MX WEIM controller. | |
| The WEIM(Wireless External Interface Module) works like a bus. | |
| You can attach many different devices on it, such as NOR, onenand. | |
| config MIPS_CDMM | |
| bool "MIPS Common Device Memory Map (CDMM) Driver" | |
| depends on CPU_MIPSR2 | |
| help | |
| Driver needed for the MIPS Common Device Memory Map bus in MIPS | |
| cores. This bus is for per-CPU tightly coupled devices such as the | |
| Fast Debug Channel (FDC). | |
| For this to work, either your bootloader needs to enable the CDMM | |
| region at an unused physical address on the boot CPU, or else your | |
| platform code needs to implement mips_cdmm_phys_base() (see | |
| asm/cdmm.h). | |
| config MVEBU_MBUS | |
| bool | |
| depends on PLAT_ORION | |
| help | |
| Driver needed for the MBus configuration on Marvell EBU SoCs | |
| (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). | |
| config OMAP_INTERCONNECT | |
| tristate "OMAP INTERCONNECT DRIVER" | |
| depends on ARCH_OMAP2PLUS | |
| help | |
| Driver to enable OMAP interconnect error handling driver. | |
| config OMAP_OCP2SCP | |
| tristate "OMAP OCP2SCP DRIVER" | |
| depends on ARCH_OMAP2PLUS | |
| help | |
| Driver to enable ocp2scp module which transforms ocp interface | |
| protocol to scp protocol. In OMAP4, USB PHY is connected via | |
| OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via | |
| OCP2SCP. | |
| config QCOM_EBI2 | |
| bool "Qualcomm External Bus Interface 2 (EBI2)" | |
| depends on HAS_IOMEM | |
| depends on ARCH_QCOM || COMPILE_TEST | |
| help | |
| Say y here to enable support for the Qualcomm External Bus | |
| Interface 2, which can be used to connect things like NAND Flash, | |
| SRAM, ethernet adapters, FPGAs and LCD displays. | |
| config SIMPLE_PM_BUS | |
| bool "Simple Power-Managed Bus Driver" | |
| depends on OF && PM | |
| depends on ARCH_RENESAS || COMPILE_TEST | |
| help | |
| Driver for transparent busses that don't need a real driver, but | |
| where the bus controller is part of a PM domain, or under the control | |
| of a functional clock, and thus relies on runtime PM for managing | |
| this PM domain and/or clock. | |
| An example of such a bus controller is the Renesas Bus State | |
| Controller (BSC, sometimes called "LBSC within Bus Bridge", or | |
| "External Bus Interface") as found on several Renesas ARM SoCs. | |
| config SUNXI_RSB | |
| tristate "Allwinner sunXi Reduced Serial Bus Driver" | |
| default MACH_SUN8I || MACH_SUN9I | |
| depends on ARCH_SUNXI | |
| select REGMAP | |
| help | |
| Say y here to enable support for Allwinner's Reduced Serial Bus | |
| (RSB) support. This controller is responsible for communicating | |
| with various RSB based devices, such as AXP223, AXP8XX PMICs, | |
| and AC100/AC200 ICs. | |
| config TEGRA_ACONNECT | |
| tristate "Tegra ACONNECT Bus Driver" | |
| depends on ARCH_TEGRA_210_SOC | |
| depends on OF && PM | |
| select PM_CLK | |
| help | |
| Driver for the Tegra ACONNECT bus which is used to interface with | |
| the devices inside the Audio Processing Engine (APE) for Tegra210. | |
| config UNIPHIER_SYSTEM_BUS | |
| tristate "UniPhier System Bus driver" | |
| depends on ARCH_UNIPHIER && OF | |
| default y | |
| help | |
| Support for UniPhier System Bus, a simple external bus. This is | |
| needed to use on-board devices connected to UniPhier SoCs. | |
| config VEXPRESS_CONFIG | |
| bool "Versatile Express configuration bus" | |
| default y if ARCH_VEXPRESS | |
| depends on ARM || ARM64 | |
| depends on OF | |
| select REGMAP | |
| help | |
| Platform configuration infrastructure for the ARM Ltd. | |
| Versatile Express. | |
| endmenu |