blob: edfeaba954295a76c1c842253004404365436208 [file] [log] [blame]
* Copyright(C) 2015 Linaro Limited. All rights reserved.
* Author: Mathieu Poirier <>
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <>.
#define CORESIGHT_ETM_PMU_NAME "cs_etm"
/* ETMv3.5/PTM's ETMCR config bit */
#define ETM_OPT_CYCACC 12
#define ETM_OPT_TS 28
#define ETM_OPT_RETSTK 29
/* ETMv4 CONFIGR programming bits for the ETM OPTs */
#define ETM4_CFG_BIT_TS 11
#define ETM4_CFG_BIT_RETSTK 12
static inline int coresight_get_trace_id(int cpu)
* A trace ID of value 0 is invalid, so let's start at some
* random value that fits in 7 bits and go from there. Since
* the common convention is to have data trace IDs be I(N) + 1,
* set instruction trace IDs as a function of the CPU number.
return (CORESIGHT_ETM_PMU_SEED + (cpu * 2));