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gem5
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arm
/
linux
/
a2d76bd8fa29f9b6dbf3ee8f6bc7bdda21bc5ce8
/
.
/
include
/
asm-um
/
cache.h
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#ifndef
__UM_CACHE_H
#define
__UM_CACHE_H
/* These are x86 numbers */
#define
L1_CACHE_SHIFT
5
#define
L1_CACHE_BYTES
(
1
<<
L1_CACHE_SHIFT
)
#define
L1_CACHE_SHIFT_MAX
7
/* largest L1 which this arch supports */
#endif