Merge branch 'sh/g3-prep'
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index ac658a7..3b9d2d8 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c
@@ -79,7 +79,7 @@ struct timer_list break_timer; int break_flag; -#ifdef CONFIG_SUPERH +#ifdef CONFIG_HAVE_CLK /* Port clock */ struct clk *clk; #endif @@ -832,7 +832,7 @@ return IRQ_HANDLED; } -#ifdef CONFIG_CPU_FREQ +#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK) /* * Here we define a transistion notifier so that we can update all of our * ports' baud rate when the peripheral clock changes. @@ -861,7 +861,7 @@ * Clean this up later.. */ clk = clk_get(NULL, "module_clk"); - port->uartclk = clk_get_rate(clk) * 16; + port->uartclk = clk_get_rate(clk); clk_put(clk); } @@ -874,7 +874,7 @@ } static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 }; -#endif /* CONFIG_CPU_FREQ */ +#endif /* CONFIG_CPU_FREQ && CONFIG_HAVE_CLK */ static int sci_request_irq(struct sci_port *port) { @@ -1009,7 +1009,7 @@ if (s->enable) s->enable(port); -#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#ifdef CONFIG_HAVE_CLK s->clk = clk_get(NULL, "module_clk"); #endif @@ -1031,7 +1031,7 @@ if (s->disable) s->disable(port); -#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#ifdef CONFIG_HAVE_CLK clk_put(s->clk); s->clk = NULL; #endif @@ -1042,24 +1042,11 @@ { struct sci_port *s = &sci_ports[port->line]; unsigned int status, baud, smr_val; - int t; + int t = -1; baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); - - switch (baud) { - case 0: - t = -1; - break; - default: - { -#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) - t = SCBRR_VALUE(baud, clk_get_rate(s->clk)); -#else - t = SCBRR_VALUE(baud); -#endif - break; - } - } + if (likely(baud)) + t = SCBRR_VALUE(baud, port->uartclk); do { status = sci_in(port, SCxSR); @@ -1212,17 +1199,17 @@ sci_ports[i].disable = h8300_sci_disable; #endif sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK; -#elif defined(CONFIG_SUPERH64) - sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16; -#else +#elif defined(CONFIG_HAVE_CLK) /* * XXX: We should use a proper SCI/SCIF clock */ { struct clk *clk = clk_get(NULL, "module_clk"); - sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; + sci_ports[i].port.uartclk = clk_get_rate(clk); clk_put(clk); } +#else +#error "Need a valid uartclk" #endif sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i]; @@ -1290,7 +1277,7 @@ port->type = serial_console_port->type; -#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) +#ifdef CONFIG_HAVE_CLK if (!serial_console_port->clk) serial_console_port->clk = clk_get(NULL, "module_clk"); #endif @@ -1494,7 +1481,7 @@ kgdb_putchar = kgdb_sci_putchar; #endif -#ifdef CONFIG_CPU_FREQ +#if defined(CONFIG_CPU_FREQ) && defined(CONFIG_HAVE_CLK) cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER); dev_info(&dev->dev, "CPU frequency notifier registered\n"); #endif
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 2b4c1df..511c10d 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h
@@ -791,9 +791,7 @@ #elif defined(CONFIG_CPU_SUBTYPE_SH7723) #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(16*bps)-1) #elif defined(__H8300H__) || defined(__H8300S__) -#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) -#elif defined(CONFIG_SUPERH64) -#define SCBRR_VALUE(bps) ((current_cpu_data.module_clock+16*bps)/(32*bps)-1) +#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif