| DDR PHY Front End (DPFE) for Broadcom STB | |
| ========================================= | |
| DPFE and the DPFE firmware provide an interface for the host CPU to | |
| communicate with the DCPU, which resides inside the DDR PHY. | |
| There are three memory regions for interacting with the DCPU. These are | |
| specified in a single reg property. | |
| Required properties: | |
| - compatible: must be "brcm,bcm7271-dpfe-cpu", "brcm,bcm7268-dpfe-cpu" | |
| or "brcm,dpfe-cpu" | |
| - reg: must reference three register ranges | |
| - start address and length of the DCPU register space | |
| - start address and length of the DCPU data memory space | |
| - start address and length of the DCPU instruction memory space | |
| - reg-names: must contain "dpfe-cpu", "dpfe-dmem", and "dpfe-imem"; | |
| they must be in the same order as the register declarations | |
| Example: | |
| dpfe_cpu0: dpfe-cpu@f1132000 { | |
| compatible = "brcm,bcm7271-dpfe-cpu", "brcm,dpfe-cpu"; | |
| reg = <0xf1132000 0x180 | |
| 0xf1134000 0x1000 | |
| 0xf1138000 0x4000>; | |
| reg-names = "dpfe-cpu", "dpfe-dmem", "dpfe-imem"; | |
| }; |