| # |
| # DMA engine configuration |
| # |
| |
| menuconfig DMADEVICES |
| bool "DMA Engine support" |
| depends on HAS_DMA |
| help |
| DMA engines can do asynchronous data transfers without |
| involving the host CPU. Currently, this framework can be |
| used to offload memory copies in the network stack and |
| RAID operations in the MD driver. This menu only presents |
| DMA Device drivers supported by the configured arch, it may |
| be empty in some cases. |
| |
| config DMADEVICES_DEBUG |
| bool "DMA Engine debugging" |
| depends on DMADEVICES != n |
| help |
| This is an option for use by developers; most people should |
| say N here. This enables DMA engine core and driver debugging. |
| |
| config DMADEVICES_VDEBUG |
| bool "DMA Engine verbose debugging" |
| depends on DMADEVICES_DEBUG != n |
| help |
| This is an option for use by developers; most people should |
| say N here. This enables deeper (more verbose) debugging of |
| the DMA engine core and drivers. |
| |
| |
| if DMADEVICES |
| |
| comment "DMA Devices" |
| |
| #core |
| config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| bool |
| |
| config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| bool |
| |
| config DMA_ENGINE |
| bool |
| |
| config DMA_VIRTUAL_CHANNELS |
| tristate |
| |
| config DMA_ACPI |
| def_bool y |
| depends on ACPI |
| |
| config DMA_OF |
| def_bool y |
| depends on OF |
| select DMA_ENGINE |
| |
| #devices |
| config ALTERA_MSGDMA |
| tristate "Altera / Intel mSGDMA Engine" |
| select DMA_ENGINE |
| help |
| Enable support for Altera / Intel mSGDMA controller. |
| |
| config AMBA_PL08X |
| bool "ARM PrimeCell PL080 or PL081 support" |
| depends on ARM_AMBA |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Say yes if your platform has a PL08x DMAC device which can |
| provide DMA engine support. This includes the original ARM |
| PL080 and PL081, Samsungs PL080 derivative and Faraday |
| Technology's FTDMAC020 PL080 derivative. |
| |
| config AMCC_PPC440SPE_ADMA |
| tristate "AMCC PPC440SPe ADMA support" |
| depends on 440SPe || 440SP |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| help |
| Enable support for the AMCC PPC440SPe RAID engines. |
| |
| config AT_HDMAC |
| tristate "Atmel AHB DMA support" |
| depends on ARCH_AT91 |
| select DMA_ENGINE |
| help |
| Support the Atmel AHB DMA controller. |
| |
| config AT_XDMAC |
| tristate "Atmel XDMA support" |
| depends on ARCH_AT91 |
| select DMA_ENGINE |
| help |
| Support the Atmel XDMA controller. |
| |
| config AXI_DMAC |
| tristate "Analog Devices AXI-DMAC DMA support" |
| depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
| controller is often used in Analog Device's reference designs for FPGA |
| platforms. |
| |
| config BCM_SBA_RAID |
| tristate "Broadcom SBA RAID engine support" |
| depends on ARM64 || COMPILE_TEST |
| depends on MAILBOX && RAID6_PQ |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| select ASYNC_TX_DISABLE_XOR_VAL_DMA |
| select ASYNC_TX_DISABLE_PQ_VAL_DMA |
| default ARCH_BCM_IPROC |
| help |
| Enable support for Broadcom SBA RAID Engine. The SBA RAID |
| engine is available on most of the Broadcom iProc SoCs. It |
| has the capability to offload memcpy, xor and pq computation |
| for raid5/6. |
| |
| config COH901318 |
| bool "ST-Ericsson COH901318 DMA support" |
| select DMA_ENGINE |
| depends on ARCH_U300 || COMPILE_TEST |
| help |
| Enable support for ST-Ericsson COH 901 318 DMA. |
| |
| config DMA_BCM2835 |
| tristate "BCM2835 DMA engine support" |
| depends on ARCH_BCM2835 |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| |
| config DMA_JZ4740 |
| tristate "JZ4740 DMA support" |
| depends on MACH_JZ4740 || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| |
| config DMA_JZ4780 |
| tristate "JZ4780 DMA support" |
| depends on MACH_JZ4780 || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
| If you have a board based on such a SoC and wish to use DMA for |
| devices which can use the DMA controller, say Y or M here. |
| |
| config DMA_OMAP |
| tristate "OMAP DMA support" |
| depends on ARCH_OMAP || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) |
| |
| config DMA_SA11X0 |
| tristate "SA-11x0 DMA support" |
| depends on ARCH_SA1100 || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support the DMA engine found on Intel StrongARM SA-1100 and |
| SA-1110 SoCs. This DMA engine can only be used with on-chip |
| devices. |
| |
| config DMA_SUN4I |
| tristate "Allwinner A10 DMA SoCs support" |
| depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
| default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable support for the DMA controller present in the sun4i, |
| sun5i and sun7i Allwinner ARM SoCs. |
| |
| config DMA_SUN6I |
| tristate "Allwinner A31 SoCs DMA support" |
| depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST |
| depends on RESET_CONTROLLER |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support for the DMA engine first found in Allwinner A31 SoCs. |
| |
| config EP93XX_DMA |
| bool "Cirrus Logic EP93xx DMA support" |
| depends on ARCH_EP93XX || COMPILE_TEST |
| select DMA_ENGINE |
| help |
| Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. |
| |
| config FSL_DMA |
| tristate "Freescale Elo series DMA support" |
| depends on FSL_SOC |
| select DMA_ENGINE |
| select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| ---help--- |
| Enable support for the Freescale Elo series DMA controllers. |
| The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the |
| EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on |
| some Txxx and Bxxx parts. |
| |
| config FSL_EDMA |
| tristate "Freescale eDMA engine support" |
| depends on OF |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support the Freescale eDMA engine with programmable channel |
| multiplexing capability for DMA request sources(slot). |
| This module can be found on Freescale Vybrid and LS-1 SoCs. |
| |
| config FSL_RAID |
| tristate "Freescale RAID engine Support" |
| depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| ---help--- |
| Enable support for Freescale RAID Engine. RAID Engine is |
| available on some QorIQ SoCs (like P5020/P5040). It has |
| the capability to offload memcpy, xor and pq computation |
| for raid5/6. |
| |
| config IMG_MDC_DMA |
| tristate "IMG MDC support" |
| depends on MIPS || COMPILE_TEST |
| depends on MFD_SYSCON |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable support for the IMG multi-threaded DMA controller (MDC). |
| |
| config IMX_DMA |
| tristate "i.MX DMA support" |
| depends on ARCH_MXC |
| select DMA_ENGINE |
| help |
| Support the i.MX DMA engine. This engine is integrated into |
| Freescale i.MX1/21/27 chips. |
| |
| config IMX_SDMA |
| tristate "i.MX SDMA support" |
| depends on ARCH_MXC |
| select DMA_ENGINE |
| help |
| Support the i.MX SDMA engine. This engine is integrated into |
| Freescale i.MX25/31/35/51/53/6 chips. |
| |
| config INTEL_IDMA64 |
| tristate "Intel integrated DMA 64-bit support" |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable DMA support for Intel Low Power Subsystem such as found on |
| Intel Skylake PCH. |
| |
| config INTEL_IOATDMA |
| tristate "Intel I/OAT DMA support" |
| depends on PCI && X86_64 |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| select DCA |
| help |
| Enable support for the Intel(R) I/OAT DMA engine present |
| in recent Intel Xeon chipsets. |
| |
| Say Y here if you have such a chipset. |
| |
| If unsure, say N. |
| |
| config INTEL_IOP_ADMA |
| tristate "Intel IOP ADMA support" |
| depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX |
| select DMA_ENGINE |
| select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| help |
| Enable support for the Intel(R) IOP Series RAID engines. |
| |
| config INTEL_MIC_X100_DMA |
| tristate "Intel MIC X100 DMA Driver" |
| depends on 64BIT && X86 && INTEL_MIC_BUS |
| select DMA_ENGINE |
| help |
| This enables DMA support for the Intel Many Integrated Core |
| (MIC) family of PCIe form factor coprocessor X100 devices that |
| run a 64 bit Linux OS. This driver will be used by both MIC |
| host and card drivers. |
| |
| If you are building host kernel with a MIC device or a card |
| kernel for a MIC device, then say M (recommended) or Y, else |
| say N. If unsure say N. |
| |
| More information about the Intel MIC family as well as the Linux |
| OS and tools for MIC to use with this driver are available from |
| <http://software.intel.com/en-us/mic-developer>. |
| |
| config K3_DMA |
| tristate "Hisilicon K3 DMA support" |
| depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support the DMA engine for Hisilicon K3 platform |
| devices. |
| |
| config LPC18XX_DMAMUX |
| bool "NXP LPC18xx/43xx DMA MUX for PL080" |
| depends on ARCH_LPC18XX || COMPILE_TEST |
| depends on OF && AMBA_PL08X |
| select MFD_SYSCON |
| help |
| Enable support for DMA on NXP LPC18xx/43xx platforms |
| with PL080 and multiplexed DMA request lines. |
| |
| config MMP_PDMA |
| bool "MMP PDMA support" |
| depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
| select DMA_ENGINE |
| help |
| Support the MMP PDMA engine for PXA and MMP platform. |
| |
| config MMP_TDMA |
| bool "MMP Two-Channel DMA support" |
| depends on ARCH_MMP || COMPILE_TEST |
| select DMA_ENGINE |
| select MMP_SRAM if ARCH_MMP |
| select GENERIC_ALLOCATOR |
| help |
| Support the MMP Two-Channel DMA engine. |
| This engine used for MMP Audio DMA and pxa910 SQU. |
| It needs sram driver under mach-mmp. |
| |
| config MOXART_DMA |
| tristate "MOXART DMA support" |
| depends on ARCH_MOXART |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable support for the MOXA ART SoC DMA controller. |
| |
| Say Y here if you enabled MMP ADMA, otherwise say N. |
| |
| config MPC512X_DMA |
| tristate "Freescale MPC512x built-in DMA engine support" |
| depends on PPC_MPC512x || PPC_MPC831x |
| select DMA_ENGINE |
| ---help--- |
| Enable support for the Freescale MPC512x built-in DMA engine. |
| |
| config MV_XOR |
| bool "Marvell XOR engine support" |
| depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| ---help--- |
| Enable support for the Marvell XOR engine. |
| |
| config MV_XOR_V2 |
| bool "Marvell XOR engine version 2 support " |
| depends on ARM64 |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| select GENERIC_MSI_IRQ_DOMAIN |
| ---help--- |
| Enable support for the Marvell version 2 XOR engine. |
| |
| This engine provides acceleration for copy, XOR and RAID6 |
| operations, and is available on Marvell Armada 7K and 8K |
| platforms. |
| |
| config MXS_DMA |
| bool "MXS DMA support" |
| depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST |
| select STMP_DEVICE |
| select DMA_ENGINE |
| help |
| Support the MXS DMA engine. This engine including APBH-DMA |
| and APBX-DMA is integrated into some Freescale chips. |
| |
| config MX3_IPU |
| bool "MX3x Image Processing Unit support" |
| depends on ARCH_MXC |
| select DMA_ENGINE |
| default y |
| help |
| If you plan to use the Image Processing unit in the i.MX3x, say |
| Y here. If unsure, select Y. |
| |
| config MX3_IPU_IRQS |
| int "Number of dynamically mapped interrupts for IPU" |
| depends on MX3_IPU |
| range 2 137 |
| default 4 |
| help |
| Out of 137 interrupt sources on i.MX31 IPU only very few are used. |
| To avoid bloating the irq_desc[] array we allocate a sufficient |
| number of IRQ slots and map them dynamically to specific sources. |
| |
| config NBPFAXI_DMA |
| tristate "Renesas Type-AXI NBPF DMA support" |
| select DMA_ENGINE |
| depends on ARM || COMPILE_TEST |
| help |
| Support for "Type-AXI" NBPF DMA IPs from Renesas |
| |
| config PCH_DMA |
| tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
| depends on PCI && (X86_32 || COMPILE_TEST) |
| select DMA_ENGINE |
| help |
| Enable support for Intel EG20T PCH DMA engine. |
| |
| This driver also can be used for LAPIS Semiconductor IOH(Input/ |
| Output Hub), ML7213, ML7223 and ML7831. |
| ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is |
| for MP(Media Phone) use and ML7831 IOH is for general purpose use. |
| ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. |
| ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. |
| |
| config PL330_DMA |
| tristate "DMA API Driver for PL330" |
| select DMA_ENGINE |
| depends on ARM_AMBA |
| help |
| Select if your platform has one or more PL330 DMACs. |
| You need to provide platform specific settings via |
| platform_data for a dma-pl330 device. |
| |
| config PXA_DMA |
| bool "PXA DMA support" |
| depends on (ARCH_MMP || ARCH_PXA) |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support the DMA engine for PXA. It is also compatible with MMP PDMA |
| platform. The internal DMA IP of all PXA variants is supported, with |
| 16 to 32 channels for peripheral to memory or memory to memory |
| transfers. |
| |
| config SIRF_DMA |
| tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
| depends on ARCH_SIRF |
| select DMA_ENGINE |
| help |
| Enable support for the CSR SiRFprimaII DMA engine. |
| |
| config STE_DMA40 |
| bool "ST-Ericsson DMA40 support" |
| depends on ARCH_U8500 |
| select DMA_ENGINE |
| help |
| Support for ST-Ericsson DMA40 controller |
| |
| config ST_FDMA |
| tristate "ST FDMA dmaengine support" |
| depends on ARCH_STI |
| depends on REMOTEPROC |
| select ST_SLIM_REMOTEPROC |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable support for ST FDMA controller. |
| It supports 16 independent DMA channels, accepts up to 32 DMA requests |
| |
| Say Y here if you have such a chipset. |
| If unsure, say N. |
| |
| config STM32_DMA |
| bool "STMicroelectronics STM32 DMA support" |
| depends on ARCH_STM32 || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Enable support for the on-chip DMA controller on STMicroelectronics |
| STM32 MCUs. |
| If you have a board based on such a MCU and wish to use DMA say Y |
| here. |
| |
| config S3C24XX_DMAC |
| bool "Samsung S3C24XX DMA support" |
| depends on ARCH_S3C24XX || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support for the Samsung S3C24XX DMA controller driver. The |
| DMA controller is having multiple DMA channels which can be |
| configured for different peripherals like audio, UART, SPI. |
| The DMA controller can transfer data from memory to peripheral, |
| periphal to memory, periphal to periphal and memory to memory. |
| |
| config TXX9_DMAC |
| tristate "Toshiba TXx9 SoC DMA support" |
| depends on MACH_TX49XX || MACH_TX39XX |
| select DMA_ENGINE |
| help |
| Support the TXx9 SoC internal DMA controller. This can be |
| integrated in chips such as the Toshiba TX4927/38/39. |
| |
| config TEGRA20_APB_DMA |
| bool "NVIDIA Tegra20 APB DMA support" |
| depends on ARCH_TEGRA |
| select DMA_ENGINE |
| help |
| Support for the NVIDIA Tegra20 APB DMA controller driver. The |
| DMA controller is having multiple DMA channel which can be |
| configured for different peripherals like audio, UART, SPI, |
| I2C etc which is in APB bus. |
| This DMA controller transfers data from memory to peripheral fifo |
| or vice versa. It does not support memory to memory data transfer. |
| |
| config TEGRA210_ADMA |
| tristate "NVIDIA Tegra210 ADMA support" |
| depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support for the NVIDIA Tegra210 ADMA controller driver. The |
| DMA controller has multiple DMA channels and is used to service |
| various audio clients in the Tegra210 audio processing engine |
| (APE). This DMA controller transfers data from memory to |
| peripheral and vice versa. It does not support memory to |
| memory data transfer. |
| |
| config TIMB_DMA |
| tristate "Timberdale FPGA DMA support" |
| depends on MFD_TIMBERDALE || COMPILE_TEST |
| select DMA_ENGINE |
| help |
| Enable support for the Timberdale FPGA DMA engine. |
| |
| config TI_CPPI41 |
| tristate "CPPI 4.1 DMA support" |
| depends on (ARCH_OMAP || ARCH_DAVINCI_DA8XX) |
| select DMA_ENGINE |
| help |
| The Communications Port Programming Interface (CPPI) 4.1 DMA engine |
| is currently used by the USB driver on AM335x and DA8xx platforms. |
| |
| config TI_DMA_CROSSBAR |
| bool |
| |
| config TI_EDMA |
| bool "TI EDMA support" |
| depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) |
| default n |
| help |
| Enable support for the TI EDMA controller. This DMA |
| engine is found on TI DaVinci and AM33xx parts. |
| |
| config XGENE_DMA |
| tristate "APM X-Gene DMA support" |
| depends on ARCH_XGENE || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_ENGINE_RAID |
| select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| help |
| Enable support for the APM X-Gene SoC DMA engine. |
| |
| config XILINX_DMA |
| tristate "Xilinx AXI DMAS Engine" |
| depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
| select DMA_ENGINE |
| help |
| Enable support for Xilinx AXI VDMA Soft IP. |
| |
| AXI VDMA engine provides high-bandwidth direct memory access |
| between memory and AXI4-Stream video type target |
| peripherals including peripherals which support AXI4- |
| Stream Video Protocol. It has two stream interfaces/ |
| channels, Memory Mapped to Stream (MM2S) and Stream to |
| Memory Mapped (S2MM) for the data transfers. |
| AXI CDMA engine provides high-bandwidth direct memory access |
| between a memory-mapped source address and a memory-mapped |
| destination address. |
| AXI DMA engine provides high-bandwidth one dimensional direct |
| memory access between memory and AXI4-Stream target peripherals. |
| |
| config XILINX_ZYNQMP_DMA |
| tristate "Xilinx ZynqMP DMA Engine" |
| depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
| select DMA_ENGINE |
| help |
| Enable support for Xilinx ZynqMP DMA controller. |
| |
| config ZX_DMA |
| tristate "ZTE ZX DMA support" |
| depends on ARCH_ZX || COMPILE_TEST |
| select DMA_ENGINE |
| select DMA_VIRTUAL_CHANNELS |
| help |
| Support the DMA engine for ZTE ZX family platform devices. |
| |
| |
| # driver files |
| source "drivers/dma/bestcomm/Kconfig" |
| |
| source "drivers/dma/qcom/Kconfig" |
| |
| source "drivers/dma/dw/Kconfig" |
| |
| source "drivers/dma/hsu/Kconfig" |
| |
| source "drivers/dma/sh/Kconfig" |
| |
| # clients |
| comment "DMA Clients" |
| depends on DMA_ENGINE |
| |
| config ASYNC_TX_DMA |
| bool "Async_tx: Offload support for the async_tx api" |
| depends on DMA_ENGINE |
| help |
| This allows the async_tx api to take advantage of offload engines for |
| memcpy, memset, xor, and raid6 p+q operations. If your platform has |
| a dma engine that can perform raid operations and you have enabled |
| MD_RAID456 say Y. |
| |
| If unsure, say N. |
| |
| config DMATEST |
| tristate "DMA Test client" |
| depends on DMA_ENGINE |
| select DMA_ENGINE_RAID |
| help |
| Simple DMA test client. Say N unless you're debugging a |
| DMA Device driver. |
| |
| config DMA_ENGINE_RAID |
| bool |
| |
| endif |
