| +Mediatek 65xx/67xx/81xx sysirq |
| |
| Mediatek SOCs sysirq support controllable irq inverter for each GIC SPI |
| interrupt. |
| |
| Required properties: |
| - compatible: should be one of: |
| "mediatek,mt8173-sysirq" |
| "mediatek,mt8135-sysirq" |
| "mediatek,mt8127-sysirq" |
| "mediatek,mt6795-sysirq" |
| "mediatek,mt6755-sysirq" |
| "mediatek,mt6592-sysirq" |
| "mediatek,mt6589-sysirq" |
| "mediatek,mt6582-sysirq" |
| "mediatek,mt6580-sysirq" |
| "mediatek,mt6577-sysirq" |
| "mediatek,mt2701-sysirq" |
| - interrupt-controller : Identifies the node as an interrupt controller |
| - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. |
| - interrupt-parent: phandle of irq parent for sysirq. The parent must |
| use the same interrupt-cells format as GIC. |
| - reg: Physical base address of the intpol registers and length of memory |
| mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others |
| need 1. |
| |
| Example: |
| sysirq: intpol-controller@10200620 { |
| compatible = "mediatek,mt6797-sysirq", |
| "mediatek,mt6577-sysirq"; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| interrupt-parent = <&gic>; |
| reg = <0 0x10220620 0 0x20>, |
| <0 0x10220690 0 0x10>; |
| }; |
