| * Samsung Exynos3250 Clock Controller | |
| The Exynos3250 clock controller generates and supplies clock to various | |
| controllers within the Exynos3250 SoC. | |
| Required Properties: | |
| - compatible: should be one of the following. | |
| - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC. | |
| - "samsung,exynos3250-cmu-dmc" - controller compatible with | |
| Exynos3250 SoC for Dynamic Memory Controller domain. | |
| - "samsung,exynos3250-cmu-isp" - ISP block clock controller compatible | |
| with Exynos3250 SOC | |
| - reg: physical base address of the controller and length of memory mapped | |
| region. | |
| - #clock-cells: should be 1. | |
| Each clock is assigned an identifier and client nodes can use this identifier | |
| to specify the clock which they consume. | |
| All available clocks are defined as preprocessor macros in | |
| dt-bindings/clock/exynos3250.h header and can be used in device | |
| tree sources. | |
| Example 1: Examples of clock controller nodes are listed below. | |
| cmu: clock-controller@10030000 { | |
| compatible = "samsung,exynos3250-cmu"; | |
| reg = <0x10030000 0x20000>; | |
| #clock-cells = <1>; | |
| }; | |
| cmu_dmc: clock-controller@105C0000 { | |
| compatible = "samsung,exynos3250-cmu-dmc"; | |
| reg = <0x105C0000 0x2000>; | |
| #clock-cells = <1>; | |
| }; | |
| cmu_isp: clock-controller@10048000 { | |
| compatible = "samsung,exynos3250-cmu-isp"; | |
| reg = <0x10048000 0x1000>; | |
| #clock-cells = <1>; | |
| }; | |
| Example 2: UART controller node that consumes the clock generated by the clock | |
| controller. Refer to the standard clock bindings for information | |
| about 'clocks' and 'clock-names' property. | |
| serial@13800000 { | |
| compatible = "samsung,exynos4210-uart"; | |
| reg = <0x13800000 0x100>; | |
| interrupts = <0 109 0>; | |
| clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>; | |
| clock-names = "uart", "clk_uart_baud0"; | |
| }; |