| Alpine MSIX controller | |
| See arm,gic-v3.txt for SPI and MSI definitions. | |
| Required properties: | |
| - compatible: should be "al,alpine-msix" | |
| - reg: physical base address and size of the registers | |
| - interrupt-parent: specifies the parent interrupt controller. | |
| - interrupt-controller: identifies the node as an interrupt controller | |
| - msi-controller: identifies the node as an PCI Message Signaled Interrupt | |
| controller | |
| - al,msi-base-spi: SPI base of the MSI frame | |
| - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0 | |
| Example: | |
| msix: msix { | |
| compatible = "al,alpine-msix"; | |
| reg = <0x0 0xfbe00000 0x0 0x100000>; | |
| interrupt-parent = <&gic>; | |
| interrupt-controller; | |
| msi-controller; | |
| al,msi-base-spi = <160>; | |
| al,msi-num-spis = <160>; | |
| }; |