| ChromeOS Embedded Controller | |
| Google's ChromeOS EC is a Cortex-M device which talks to the AP and | |
| implements various function such as keyboard and battery charging. | |
| The EC can be connect through various means (I2C, SPI, LPC) and the | |
| compatible string used depends on the interface. Each connection method has | |
| its own driver which connects to the top level interface-agnostic EC driver. | |
| Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to | |
| the top-level driver. | |
| Required properties (I2C): | |
| - compatible: "google,cros-ec-i2c" | |
| - reg: I2C slave address | |
| Required properties (SPI): | |
| - compatible: "google,cros-ec-spi" | |
| - reg: SPI chip select | |
| Optional properties (SPI): | |
| - google,cros-ec-spi-pre-delay: Some implementations of the EC need a little | |
| time to wake up from sleep before they can receive SPI transfers at a high | |
| clock rate. This property specifies the delay, in usecs, between the | |
| assertion of the CS to the start of the first clock pulse. | |
| - google,cros-ec-spi-msg-delay: Some implementations of the EC require some | |
| additional processing time in order to accept new transactions. If the delay | |
| between transactions is not long enough the EC may not be able to respond | |
| properly to subsequent transactions and cause them to hang. This property | |
| specifies the delay, in usecs, introduced between transactions to account | |
| for the time required by the EC to get back into a state in which new data | |
| can be accepted. | |
| Required properties (LPC): | |
| - compatible: "google,cros-ec-lpc" | |
| - reg: List of (IO address, size) pairs defining the interface uses | |
| Optional properties (all): | |
| - google,has-vbc-nvram: Some implementations of the EC include a small | |
| nvram space used to store verified boot context data. This boolean flag | |
| is used to specify whether this nvram is present or not. | |
| Example for I2C: | |
| i2c@12CA0000 { | |
| cros-ec@1e { | |
| reg = <0x1e>; | |
| compatible = "google,cros-ec-i2c"; | |
| interrupts = <14 0>; | |
| interrupt-parent = <&wakeup_eint>; | |
| wakeup-source; | |
| }; | |
| Example for SPI: | |
| spi@131b0000 { | |
| ec@0 { | |
| compatible = "google,cros-ec-spi"; | |
| reg = <0x0>; | |
| interrupts = <14 0>; | |
| interrupt-parent = <&wakeup_eint>; | |
| wakeup-source; | |
| spi-max-frequency = <5000000>; | |
| controller-data { | |
| cs-gpio = <&gpf0 3 4 3 0>; | |
| samsung,spi-cs; | |
| samsung,spi-feedback-delay = <2>; | |
| }; | |
| }; | |
| }; | |
| Example for LPC is not supplied as it is not yet implemented. |