| TI Keystone Soc USB Controller | |
| DWC3 GLUE | |
| Required properties: | |
| - compatible: should be "ti,keystone-dwc3". | |
| - #address-cells, #size-cells : should be '1' if the device has sub-nodes | |
| with 'reg' property. | |
| - reg : Address and length of the register set for the USB subsystem on | |
| the SOC. | |
| - interrupts : The irq number of this device that is used to interrupt the | |
| MPU. | |
| - ranges: allows valid 1:1 translation between child's address space and | |
| parent's address space. | |
| SoC-specific Required Properties: | |
| The following are mandatory properties for Keystone 2 66AK2HK, 66AK2L and 66AK2E | |
| SoCs only: | |
| - clocks: Clock ID for USB functional clock. | |
| - clock-names: Must be "usb". | |
| The following are mandatory properties for Keystone 2 66AK2G SoCs only: | |
| - power-domains: Should contain a phandle to a PM domain provider node | |
| and an args specifier containing the USB device id | |
| value. This property is as per the binding, | |
| Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt | |
| Sub-nodes: | |
| The dwc3 core should be added as subnode to Keystone DWC3 glue. | |
| - dwc3 : | |
| The binding details of dwc3 can be found in: | |
| Documentation/devicetree/bindings/usb/dwc3.txt | |
| Example: | |
| usb: usb@2680000 { | |
| compatible = "ti,keystone-dwc3"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| reg = <0x2680000 0x10000>; | |
| clocks = <&clkusb>; | |
| clock-names = "usb"; | |
| interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; | |
| ranges; | |
| dwc3@2690000 { | |
| compatible = "synopsys,dwc3"; | |
| reg = <0x2690000 0x70000>; | |
| interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; | |
| usb-phy = <&usb_phy>, <&usb_phy>; | |
| }; | |
| }; |