| # SPDX-License-Identifier: GPL-2.0 |
| # Makefile for the fpga framework and fpga manager drivers. |
| # Core FPGA Manager Framework |
| obj-$(CONFIG_FPGA) += fpga-mgr.o |
| obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o |
| obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o |
| obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o |
| obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o |
| obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o |
| obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o |
| obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o |
| obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o |
| obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o |
| obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o |
| obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o |
| obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o |
| obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o |
| obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o |
| obj-$(CONFIG_FPGA_REGION) += fpga-region.o |