| * STMicroelectronics STM32 lcd-tft display controller |
| |
| - ltdc: lcd-tft display controller host |
| Required properties: |
| - compatible: "st,stm32-ltdc" |
| - reg: Physical base address of the IP registers and length of memory mapped region. |
| - clocks: A list of phandle + clock-specifier pairs, one for each |
| entry in 'clock-names'. |
| - clock-names: A list of clock names. For ltdc it should contain: |
| - "lcd" for the clock feeding the output pixel clock & IP clock. |
| - resets: reset to be used by the device (defined by use of RCC macro). |
| Required nodes: |
| - Video port for RGB output. |
| |
| * STMicroelectronics STM32 DSI controller specific extensions to Synopsys |
| DesignWare MIPI DSI host controller |
| |
| The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI |
| DSI host controller. For all mandatory properties & nodes, please refer |
| to the related documentation in [5]. |
| |
| Mandatory properties specific to STM32 DSI: |
| - #address-cells: Should be <1>. |
| - #size-cells: Should be <0>. |
| - compatible: "st,stm32-dsi". |
| - clock-names: |
| - phy pll reference clock string name, must be "ref". |
| - resets: see [5]. |
| - reset-names: see [5]. |
| |
| Mandatory nodes specific to STM32 DSI: |
| - ports: A node containing DSI input & output port nodes with endpoint |
| definitions as documented in [3] & [4]. |
| - port@0: DSI input port node, connected to the ltdc rgb output port. |
| - port@1: DSI output port node, connected to a panel or a bridge input port. |
| - panel or bridge node: A node containing the panel or bridge description as |
| documented in [6]. |
| - port: panel or bridge port node, connected to the DSI output port (port@1). |
| |
| Note: You can find more documentation in the following references |
| [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| [2] Documentation/devicetree/bindings/reset/reset.txt |
| [3] Documentation/devicetree/bindings/media/video-interfaces.txt |
| [4] Documentation/devicetree/bindings/graph.txt |
| [5] Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt |
| [6] Documentation/devicetree/bindings/display/mipi-dsi-bus.txt |
| |
| Example 1: RGB panel |
| / { |
| ... |
| soc { |
| ... |
| ltdc: display-controller@40016800 { |
| compatible = "st,stm32-ltdc"; |
| reg = <0x40016800 0x200>; |
| interrupts = <88>, <89>; |
| resets = <&rcc STM32F4_APB2_RESET(LTDC)>; |
| clocks = <&rcc 1 CLK_LCD>; |
| clock-names = "lcd"; |
| |
| port { |
| ltdc_out_rgb: endpoint { |
| }; |
| }; |
| }; |
| }; |
| }; |
| |
| Example 2: DSI panel |
| |
| / { |
| ... |
| soc { |
| ... |
| ltdc: display-controller@40016800 { |
| compatible = "st,stm32-ltdc"; |
| reg = <0x40016800 0x200>; |
| interrupts = <88>, <89>; |
| resets = <&rcc STM32F4_APB2_RESET(LTDC)>; |
| clocks = <&rcc 1 CLK_LCD>; |
| clock-names = "lcd"; |
| |
| port { |
| ltdc_out_dsi: endpoint { |
| remote-endpoint = <&dsi_in>; |
| }; |
| }; |
| }; |
| |
| |
| dsi: dsi@40016c00 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "st,stm32-dsi"; |
| reg = <0x40016c00 0x800>; |
| clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>; |
| clock-names = "ref", "pclk"; |
| resets = <&rcc STM32F4_APB2_RESET(DSI)>; |
| reset-names = "apb"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| dsi_in: endpoint { |
| remote-endpoint = <<dc_out_dsi>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| dsi_out: endpoint { |
| remote-endpoint = <&dsi_in_panel>; |
| }; |
| }; |
| |
| }; |
| |
| panel-dsi@0 { |
| reg = <0>; /* dsi virtual channel (0..3) */ |
| compatible = ...; |
| enable-gpios = ...; |
| |
| port { |
| dsi_in_panel: endpoint { |
| remote-endpoint = <&dsi_out>; |
| }; |
| }; |
| |
| }; |
| |
| }; |
| |
| }; |
| }; |