| * Allwinner A10 I2S controller |
| |
| The I2S bus (Inter-IC sound bus) is a serial link for digital |
| audio data transfer between devices in the system. |
| |
| Required properties: |
| |
| - compatible: should be one of the following: |
| - "allwinner,sun4i-a10-i2s" |
| - "allwinner,sun6i-a31-i2s" |
| - "allwinner,sun8i-h3-i2s" |
| - reg: physical base address of the controller and length of memory mapped |
| region. |
| - interrupts: should contain the I2S interrupt. |
| - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, |
| Documentation/devicetree/bindings/dma/dma.txt |
| - dma-names: should include "tx" and "rx". |
| - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. |
| - clock-names: should contain the following: |
| - "apb" : clock for the I2S bus interface |
| - "mod" : module clock for the I2S controller |
| - #sound-dai-cells : Must be equal to 0 |
| |
| Required properties for the following compatibles: |
| - "allwinner,sun6i-a31-i2s" |
| - "allwinner,sun8i-h3-i2s" |
| - resets: phandle to the reset line for this codec |
| |
| Example: |
| |
| i2s0: i2s@1c22400 { |
| #sound-dai-cells = <0>; |
| compatible = "allwinner,sun4i-a10-i2s"; |
| reg = <0x01c22400 0x400>; |
| interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| clocks = <&apb0_gates 3>, <&i2s0_clk>; |
| clock-names = "apb", "mod"; |
| dmas = <&dma SUN4I_DMA_NORMAL 3>, |
| <&dma SUN4I_DMA_NORMAL 3>; |
| dma-names = "rx", "tx"; |
| }; |
