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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * I/O SAPIC support.
3 *
4 * Copyright (C) 1999 Intel Corp.
5 * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
6 * Copyright (C) 2000-2002 J.I. Lee <jung-ik.lee@intel.com>
7 * Copyright (C) 1999-2000, 2002-2003 Hewlett-Packard Co.
8 * David Mosberger-Tang <davidm@hpl.hp.com>
9 * Copyright (C) 1999 VA Linux Systems
10 * Copyright (C) 1999,2000 Walt Drummond <drummond@valinux.com>
11 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090012 * 00/04/19 D. Mosberger Rewritten to mirror more closely the x86 I/O
13 * APIC code. In particular, we now have separate
14 * handlers for edge and level triggered
15 * interrupts.
16 * 00/10/27 Asit Mallick, Goutham Rao <goutham.rao@intel.com> IRQ vector
17 * allocation PCI to vector mapping, shared PCI
18 * interrupts.
19 * 00/10/27 D. Mosberger Document things a bit more to make them more
20 * understandable. Clean up much of the old
21 * IOSAPIC cruft.
22 * 01/07/27 J.I. Lee PCI irq routing, Platform/Legacy interrupts
23 * and fixes for ACPI S5(SoftOff) support.
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 * 02/01/23 J.I. Lee iosapic pgm fixes for PCI irq routing from _PRT
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090025 * 02/01/07 E. Focht <efocht@ess.nec.de> Redirectable interrupt
26 * vectors in iosapic_set_affinity(),
27 * initializations for /proc/irq/#/smp_affinity
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 * 02/04/02 P. Diefenbaugh Cleaned up ACPI PCI IRQ routing.
29 * 02/04/18 J.I. Lee bug fix in iosapic_init_pci_irq
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090030 * 02/04/30 J.I. Lee bug fix in find_iosapic to fix ACPI PCI IRQ to
31 * IOSAPIC mapping error
Linus Torvalds1da177e2005-04-16 15:20:36 -070032 * 02/07/29 T. Kochi Allocate interrupt vectors dynamically
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090033 * 02/08/04 T. Kochi Cleaned up terminology (irq, global system
34 * interrupt, vector, etc.)
35 * 02/09/20 D. Mosberger Simplified by taking advantage of ACPI's
36 * pci_irq code.
Linus Torvalds1da177e2005-04-16 15:20:36 -070037 * 03/02/19 B. Helgaas Make pcat_compat system-wide, not per-IOSAPIC.
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090038 * Remove iosapic_address & gsi_base from
39 * external interfaces. Rationalize
40 * __init/__devinit attributes.
Linus Torvalds1da177e2005-04-16 15:20:36 -070041 * 04/12/04 Ashok Raj <ashok.raj@intel.com> Intel Corporation 2004
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090042 * Updated to work with irq migration necessary
43 * for CPU Hotplug
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 */
45/*
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090046 * Here is what the interrupt logic between a PCI device and the kernel looks
47 * like:
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090049 * (1) A PCI device raises one of the four interrupt pins (INTA, INTB, INTC,
50 * INTD). The device is uniquely identified by its bus-, and slot-number
51 * (the function number does not matter here because all functions share
52 * the same interrupt lines).
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090054 * (2) The motherboard routes the interrupt line to a pin on a IOSAPIC
55 * controller. Multiple interrupt lines may have to share the same
56 * IOSAPIC pin (if they're level triggered and use the same polarity).
57 * Each interrupt line has a unique Global System Interrupt (GSI) number
58 * which can be calculated as the sum of the controller's base GSI number
59 * and the IOSAPIC pin number to which the line connects.
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090061 * (3) The IOSAPIC uses an internal routing table entries (RTEs) to map the
62 * IOSAPIC pin into the IA-64 interrupt vector. This interrupt vector is then
63 * sent to the CPU.
Linus Torvalds1da177e2005-04-16 15:20:36 -070064 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090065 * (4) The kernel recognizes an interrupt as an IRQ. The IRQ interface is
66 * used as architecture-independent interrupt handling mechanism in Linux.
67 * As an IRQ is a number, we have to have
68 * IA-64 interrupt vector number <-> IRQ number mapping. On smaller
69 * systems, we use one-to-one mapping between IA-64 vector and IRQ. A
70 * platform can implement platform_irq_to_vector(irq) and
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 * platform_local_vector_to_irq(vector) APIs to differentiate the mapping.
72 * Please see also include/asm-ia64/hw_irq.h for those APIs.
73 *
74 * To sum up, there are three levels of mappings involved:
75 *
76 * PCI pin -> global system interrupt (GSI) -> IA-64 vector <-> IRQ
77 *
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +090078 * Note: The term "IRQ" is loosely used everywhere in Linux kernel to
79 * describeinterrupts. Now we use "IRQ" only for Linux IRQ's. ISA IRQ
80 * (isa_irq) is the only exception in this source code.
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
83#include <linux/acpi.h>
84#include <linux/init.h>
85#include <linux/irq.h>
86#include <linux/kernel.h>
87#include <linux/list.h>
88#include <linux/pci.h>
89#include <linux/smp.h>
90#include <linux/smp_lock.h>
91#include <linux/string.h>
Kenji Kaneshige24eeb562005-04-25 13:26:23 -070092#include <linux/bootmem.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
94#include <asm/delay.h>
95#include <asm/hw_irq.h>
96#include <asm/io.h>
97#include <asm/iosapic.h>
98#include <asm/machvec.h>
99#include <asm/processor.h>
100#include <asm/ptrace.h>
101#include <asm/system.h>
102
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103#undef DEBUG_INTERRUPT_ROUTING
104
105#ifdef DEBUG_INTERRUPT_ROUTING
106#define DBG(fmt...) printk(fmt)
107#else
108#define DBG(fmt...)
109#endif
110
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900111#define NR_PREALLOCATE_RTE_ENTRIES \
112 (PAGE_SIZE / sizeof(struct iosapic_rte_info))
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700113#define RTE_PREALLOCATED (1)
114
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115static DEFINE_SPINLOCK(iosapic_lock);
116
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900117/*
118 * These tables map IA-64 vectors to the IOSAPIC pin that generates this
119 * vector.
120 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700122struct iosapic_rte_info {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900123 struct list_head rte_list; /* node in list of RTEs sharing the
124 * same vector */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 char __iomem *addr; /* base address of IOSAPIC */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900126 unsigned int gsi_base; /* first GSI assigned to this
127 * IOSAPIC */
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700128 char rte_index; /* IOSAPIC RTE index */
129 int refcnt; /* reference counter */
130 unsigned int flags; /* flags */
131} ____cacheline_aligned;
132
133static struct iosapic_intr_info {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900134 struct list_head rtes; /* RTEs using this vector (empty =>
135 * not an IOSAPIC interrupt) */
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700136 int count; /* # of RTEs that shares this vector */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900137 u32 low32; /* current value of low word of
138 * Redirection table entry */
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700139 unsigned int dest; /* destination CPU physical ID */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140 unsigned char dmode : 3; /* delivery mode (see iosapic.h) */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900141 unsigned char polarity: 1; /* interrupt polarity
142 * (see iosapic.h) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 unsigned char trigger : 1; /* trigger mode (see iosapic.h) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144} iosapic_intr_info[IA64_NUM_VECTORS];
145
146static struct iosapic {
147 char __iomem *addr; /* base address of IOSAPIC */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900148 unsigned int gsi_base; /* first GSI assigned to this
149 * IOSAPIC */
150 unsigned short num_rte; /* # of RTEs on this IOSAPIC */
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700151 int rtes_inuse; /* # of RTEs in use on this IOSAPIC */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152#ifdef CONFIG_NUMA
153 unsigned short node; /* numa node association via pxm */
154#endif
155} iosapic_lists[NR_IOSAPICS];
156
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700157static unsigned char pcat_compat __devinitdata; /* 8259 compatibility flag */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700159static int iosapic_kmalloc_ok;
160static LIST_HEAD(free_rte_list);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161
162/*
163 * Find an IOSAPIC associated with a GSI
164 */
165static inline int
166find_iosapic (unsigned int gsi)
167{
168 int i;
169
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700170 for (i = 0; i < NR_IOSAPICS; i++) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900171 if ((unsigned) (gsi - iosapic_lists[i].gsi_base) <
172 iosapic_lists[i].num_rte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173 return i;
174 }
175
176 return -1;
177}
178
179static inline int
180_gsi_to_vector (unsigned int gsi)
181{
182 struct iosapic_intr_info *info;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700183 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900185 for (info = iosapic_intr_info; info <
186 iosapic_intr_info + IA64_NUM_VECTORS; ++info)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700187 list_for_each_entry(rte, &info->rtes, rte_list)
188 if (rte->gsi_base + rte->rte_index == gsi)
189 return info - iosapic_intr_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190 return -1;
191}
192
193/*
194 * Translate GSI number to the corresponding IA-64 interrupt vector. If no
195 * entry exists, return -1.
196 */
197inline int
198gsi_to_vector (unsigned int gsi)
199{
200 return _gsi_to_vector(gsi);
201}
202
203int
204gsi_to_irq (unsigned int gsi)
205{
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700206 unsigned long flags;
207 int irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 /*
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900209 * XXX fix me: this assumes an identity mapping between IA-64 vector
210 * and Linux irq numbers...
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 */
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700212 spin_lock_irqsave(&iosapic_lock, flags);
213 {
214 irq = _gsi_to_vector(gsi);
215 }
216 spin_unlock_irqrestore(&iosapic_lock, flags);
217
218 return irq;
219}
220
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900221static struct iosapic_rte_info *gsi_vector_to_rte(unsigned int gsi,
222 unsigned int vec)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700223{
224 struct iosapic_rte_info *rte;
225
226 list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list)
227 if (rte->gsi_base + rte->rte_index == gsi)
228 return rte;
229 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230}
231
232static void
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700233set_rte (unsigned int gsi, unsigned int vector, unsigned int dest, int mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234{
235 unsigned long pol, trigger, dmode;
236 u32 low32, high32;
237 char __iomem *addr;
238 int rte_index;
239 char redir;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700240 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241
242 DBG(KERN_DEBUG"IOSAPIC: routing vector %d to 0x%x\n", vector, dest);
243
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700244 rte = gsi_vector_to_rte(gsi, vector);
245 if (!rte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246 return; /* not an IOSAPIC interrupt */
247
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700248 rte_index = rte->rte_index;
249 addr = rte->addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 pol = iosapic_intr_info[vector].polarity;
251 trigger = iosapic_intr_info[vector].trigger;
252 dmode = iosapic_intr_info[vector].dmode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253
254 redir = (dmode == IOSAPIC_LOWEST_PRIORITY) ? 1 : 0;
255
256#ifdef CONFIG_SMP
257 {
258 unsigned int irq;
259
260 for (irq = 0; irq < NR_IRQS; ++irq)
261 if (irq_to_vector(irq) == vector) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900262 set_irq_affinity_info(irq,
263 (int)(dest & 0xffff),
264 redir);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265 break;
266 }
267 }
268#endif
269
270 low32 = ((pol << IOSAPIC_POLARITY_SHIFT) |
271 (trigger << IOSAPIC_TRIGGER_SHIFT) |
272 (dmode << IOSAPIC_DELIVERY_SHIFT) |
273 ((mask ? 1 : 0) << IOSAPIC_MASK_SHIFT) |
274 vector);
275
276 /* dest contains both id and eid */
277 high32 = (dest << IOSAPIC_DEST_SHIFT);
278
279 iosapic_write(addr, IOSAPIC_RTE_HIGH(rte_index), high32);
280 iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);
281 iosapic_intr_info[vector].low32 = low32;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700282 iosapic_intr_info[vector].dest = dest;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283}
284
285static void
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900286nop (unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287{
288 /* do nothing... */
289}
290
Zou Nan haia79561132006-12-07 09:51:35 -0800291
292#ifdef CONFIG_KEXEC
293void
294kexec_disable_iosapic(void)
295{
296 struct iosapic_intr_info *info;
297 struct iosapic_rte_info *rte;
298 u8 vec = 0;
299 for (info = iosapic_intr_info; info <
300 iosapic_intr_info + IA64_NUM_VECTORS; ++info, ++vec) {
301 list_for_each_entry(rte, &info->rtes,
302 rte_list) {
303 iosapic_write(rte->addr,
304 IOSAPIC_RTE_LOW(rte->rte_index),
305 IOSAPIC_MASK|vec);
306 iosapic_eoi(rte->addr, vec);
307 }
308 }
309}
310#endif
311
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312static void
313mask_irq (unsigned int irq)
314{
315 unsigned long flags;
316 char __iomem *addr;
317 u32 low32;
318 int rte_index;
319 ia64_vector vec = irq_to_vector(irq);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700320 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700322 if (list_empty(&iosapic_intr_info[vec].rtes))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 return; /* not an IOSAPIC interrupt! */
324
325 spin_lock_irqsave(&iosapic_lock, flags);
326 {
327 /* set only the mask bit */
328 low32 = iosapic_intr_info[vec].low32 |= IOSAPIC_MASK;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900329 list_for_each_entry(rte, &iosapic_intr_info[vec].rtes,
330 rte_list) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700331 addr = rte->addr;
332 rte_index = rte->rte_index;
333 iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);
334 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 }
336 spin_unlock_irqrestore(&iosapic_lock, flags);
337}
338
339static void
340unmask_irq (unsigned int irq)
341{
342 unsigned long flags;
343 char __iomem *addr;
344 u32 low32;
345 int rte_index;
346 ia64_vector vec = irq_to_vector(irq);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700347 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700349 if (list_empty(&iosapic_intr_info[vec].rtes))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350 return; /* not an IOSAPIC interrupt! */
351
352 spin_lock_irqsave(&iosapic_lock, flags);
353 {
354 low32 = iosapic_intr_info[vec].low32 &= ~IOSAPIC_MASK;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900355 list_for_each_entry(rte, &iosapic_intr_info[vec].rtes,
356 rte_list) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700357 addr = rte->addr;
358 rte_index = rte->rte_index;
359 iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);
360 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361 }
362 spin_unlock_irqrestore(&iosapic_lock, flags);
363}
364
365
366static void
367iosapic_set_affinity (unsigned int irq, cpumask_t mask)
368{
369#ifdef CONFIG_SMP
370 unsigned long flags;
371 u32 high32, low32;
372 int dest, rte_index;
373 char __iomem *addr;
374 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
375 ia64_vector vec;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700376 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377
378 irq &= (~IA64_IRQ_REDIRECTED);
379 vec = irq_to_vector(irq);
380
381 if (cpus_empty(mask))
382 return;
383
384 dest = cpu_physical_id(first_cpu(mask));
385
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700386 if (list_empty(&iosapic_intr_info[vec].rtes))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387 return; /* not an IOSAPIC interrupt */
388
389 set_irq_affinity_info(irq, dest, redir);
390
391 /* dest contains both id and eid */
392 high32 = dest << IOSAPIC_DEST_SHIFT;
393
394 spin_lock_irqsave(&iosapic_lock, flags);
395 {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900396 low32 = iosapic_intr_info[vec].low32 &
397 ~(7 << IOSAPIC_DELIVERY_SHIFT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398
399 if (redir)
400 /* change delivery mode to lowest priority */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900401 low32 |= (IOSAPIC_LOWEST_PRIORITY <<
402 IOSAPIC_DELIVERY_SHIFT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 else
404 /* change delivery mode to fixed */
405 low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT);
406
407 iosapic_intr_info[vec].low32 = low32;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700408 iosapic_intr_info[vec].dest = dest;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900409 list_for_each_entry(rte, &iosapic_intr_info[vec].rtes,
410 rte_list) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700411 addr = rte->addr;
412 rte_index = rte->rte_index;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900413 iosapic_write(addr, IOSAPIC_RTE_HIGH(rte_index),
414 high32);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700415 iosapic_write(addr, IOSAPIC_RTE_LOW(rte_index), low32);
416 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417 }
418 spin_unlock_irqrestore(&iosapic_lock, flags);
419#endif
420}
421
422/*
423 * Handlers for level-triggered interrupts.
424 */
425
426static unsigned int
427iosapic_startup_level_irq (unsigned int irq)
428{
429 unmask_irq(irq);
430 return 0;
431}
432
433static void
434iosapic_end_level_irq (unsigned int irq)
435{
436 ia64_vector vec = irq_to_vector(irq);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700437 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438
Chen, Kenneth W41503de2006-05-16 16:29:00 -0700439 move_native_irq(irq);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700440 list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list)
441 iosapic_eoi(rte->addr, vec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442}
443
444#define iosapic_shutdown_level_irq mask_irq
445#define iosapic_enable_level_irq unmask_irq
446#define iosapic_disable_level_irq mask_irq
447#define iosapic_ack_level_irq nop
448
449struct hw_interrupt_type irq_type_iosapic_level = {
Ingo Molnar06344db2006-11-16 00:43:02 -0800450 .name = "IO-SAPIC-level",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451 .startup = iosapic_startup_level_irq,
452 .shutdown = iosapic_shutdown_level_irq,
453 .enable = iosapic_enable_level_irq,
454 .disable = iosapic_disable_level_irq,
455 .ack = iosapic_ack_level_irq,
456 .end = iosapic_end_level_irq,
457 .set_affinity = iosapic_set_affinity
458};
459
460/*
461 * Handlers for edge-triggered interrupts.
462 */
463
464static unsigned int
465iosapic_startup_edge_irq (unsigned int irq)
466{
467 unmask_irq(irq);
468 /*
469 * IOSAPIC simply drops interrupts pended while the
470 * corresponding pin was masked, so we can't know if an
471 * interrupt is pending already. Let's hope not...
472 */
473 return 0;
474}
475
476static void
477iosapic_ack_edge_irq (unsigned int irq)
478{
Ingo Molnara8553ac2006-06-29 02:24:38 -0700479 irq_desc_t *idesc = irq_desc + irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480
Chen, Kenneth W41503de2006-05-16 16:29:00 -0700481 move_native_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482 /*
483 * Once we have recorded IRQ_PENDING already, we can mask the
484 * interrupt for real. This prevents IRQ storms from unhandled
485 * devices.
486 */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900487 if ((idesc->status & (IRQ_PENDING|IRQ_DISABLED)) ==
488 (IRQ_PENDING|IRQ_DISABLED))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 mask_irq(irq);
490}
491
492#define iosapic_enable_edge_irq unmask_irq
493#define iosapic_disable_edge_irq nop
494#define iosapic_end_edge_irq nop
495
496struct hw_interrupt_type irq_type_iosapic_edge = {
Ingo Molnar06344db2006-11-16 00:43:02 -0800497 .name = "IO-SAPIC-edge",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 .startup = iosapic_startup_edge_irq,
499 .shutdown = iosapic_disable_edge_irq,
500 .enable = iosapic_enable_edge_irq,
501 .disable = iosapic_disable_edge_irq,
502 .ack = iosapic_ack_edge_irq,
503 .end = iosapic_end_edge_irq,
504 .set_affinity = iosapic_set_affinity
505};
506
507unsigned int
508iosapic_version (char __iomem *addr)
509{
510 /*
511 * IOSAPIC Version Register return 32 bit structure like:
512 * {
513 * unsigned int version : 8;
514 * unsigned int reserved1 : 8;
515 * unsigned int max_redir : 8;
516 * unsigned int reserved2 : 8;
517 * }
518 */
519 return iosapic_read(addr, IOSAPIC_VERSION);
520}
521
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900522static int iosapic_find_sharable_vector (unsigned long trigger,
523 unsigned long pol)
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700524{
525 int i, vector = -1, min_count = -1;
526 struct iosapic_intr_info *info;
527
528 /*
529 * shared vectors for edge-triggered interrupts are not
530 * supported yet
531 */
532 if (trigger == IOSAPIC_EDGE)
533 return -1;
534
535 for (i = IA64_FIRST_DEVICE_VECTOR; i <= IA64_LAST_DEVICE_VECTOR; i++) {
536 info = &iosapic_intr_info[i];
537 if (info->trigger == trigger && info->polarity == pol &&
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900538 (info->dmode == IOSAPIC_FIXED || info->dmode ==
539 IOSAPIC_LOWEST_PRIORITY)) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700540 if (min_count == -1 || info->count < min_count) {
541 vector = i;
542 min_count = info->count;
543 }
544 }
545 }
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700546
547 return vector;
548}
549
Linus Torvalds1da177e2005-04-16 15:20:36 -0700550/*
551 * if the given vector is already owned by other,
552 * assign a new vector for the other and make the vector available
553 */
554static void __init
555iosapic_reassign_vector (int vector)
556{
557 int new_vector;
558
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700559 if (!list_empty(&iosapic_intr_info[vector].rtes)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560 new_vector = assign_irq_vector(AUTO_ASSIGN);
Kenji Kaneshige3b5cc092005-07-10 21:49:00 -0700561 if (new_vector < 0)
562 panic("%s: out of interrupt vectors!\n", __FUNCTION__);
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900563 printk(KERN_INFO "Reassigning vector %d to %d\n",
564 vector, new_vector);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 memcpy(&iosapic_intr_info[new_vector], &iosapic_intr_info[vector],
566 sizeof(struct iosapic_intr_info));
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700567 INIT_LIST_HEAD(&iosapic_intr_info[new_vector].rtes);
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900568 list_move(iosapic_intr_info[vector].rtes.next,
569 &iosapic_intr_info[new_vector].rtes);
570 memset(&iosapic_intr_info[vector], 0,
571 sizeof(struct iosapic_intr_info));
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700572 iosapic_intr_info[vector].low32 = IOSAPIC_MASK;
573 INIT_LIST_HEAD(&iosapic_intr_info[vector].rtes);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574 }
575}
576
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700577static struct iosapic_rte_info *iosapic_alloc_rte (void)
578{
579 int i;
580 struct iosapic_rte_info *rte;
581 int preallocated = 0;
582
583 if (!iosapic_kmalloc_ok && list_empty(&free_rte_list)) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900584 rte = alloc_bootmem(sizeof(struct iosapic_rte_info) *
585 NR_PREALLOCATE_RTE_ENTRIES);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700586 if (!rte)
587 return NULL;
588 for (i = 0; i < NR_PREALLOCATE_RTE_ENTRIES; i++, rte++)
589 list_add(&rte->rte_list, &free_rte_list);
590 }
591
592 if (!list_empty(&free_rte_list)) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900593 rte = list_entry(free_rte_list.next, struct iosapic_rte_info,
594 rte_list);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700595 list_del(&rte->rte_list);
596 preallocated++;
597 } else {
598 rte = kmalloc(sizeof(struct iosapic_rte_info), GFP_ATOMIC);
599 if (!rte)
600 return NULL;
601 }
602
603 memset(rte, 0, sizeof(struct iosapic_rte_info));
604 if (preallocated)
605 rte->flags |= RTE_PREALLOCATED;
606
607 return rte;
608}
609
610static void iosapic_free_rte (struct iosapic_rte_info *rte)
611{
612 if (rte->flags & RTE_PREALLOCATED)
613 list_add_tail(&rte->rte_list, &free_rte_list);
614 else
615 kfree(rte);
616}
617
618static inline int vector_is_shared (int vector)
619{
620 return (iosapic_intr_info[vector].count > 1);
621}
622
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400623static int
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624register_intr (unsigned int gsi, int vector, unsigned char delivery,
625 unsigned long polarity, unsigned long trigger)
626{
627 irq_desc_t *idesc;
628 struct hw_interrupt_type *irq_type;
629 int rte_index;
630 int index;
631 unsigned long gsi_base;
632 void __iomem *iosapic_address;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700633 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700634
635 index = find_iosapic(gsi);
636 if (index < 0) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900637 printk(KERN_WARNING "%s: No IOSAPIC for GSI %u\n",
638 __FUNCTION__, gsi);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400639 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 }
641
642 iosapic_address = iosapic_lists[index].addr;
643 gsi_base = iosapic_lists[index].gsi_base;
644
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700645 rte = gsi_vector_to_rte(gsi, vector);
646 if (!rte) {
647 rte = iosapic_alloc_rte();
648 if (!rte) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900649 printk(KERN_WARNING "%s: cannot allocate memory\n",
650 __FUNCTION__);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400651 return -ENOMEM;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700652 }
653
654 rte_index = gsi - gsi_base;
655 rte->rte_index = rte_index;
656 rte->addr = iosapic_address;
657 rte->gsi_base = gsi_base;
658 rte->refcnt++;
659 list_add_tail(&rte->rte_list, &iosapic_intr_info[vector].rtes);
660 iosapic_intr_info[vector].count++;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700661 iosapic_lists[index].rtes_inuse++;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700662 }
663 else if (vector_is_shared(vector)) {
664 struct iosapic_intr_info *info = &iosapic_intr_info[vector];
665 if (info->trigger != trigger || info->polarity != polarity) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900666 printk (KERN_WARNING
667 "%s: cannot override the interrupt\n",
668 __FUNCTION__);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400669 return -EINVAL;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700670 }
671 }
672
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 iosapic_intr_info[vector].polarity = polarity;
674 iosapic_intr_info[vector].dmode = delivery;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700675 iosapic_intr_info[vector].trigger = trigger;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676
677 if (trigger == IOSAPIC_EDGE)
678 irq_type = &irq_type_iosapic_edge;
679 else
680 irq_type = &irq_type_iosapic_level;
681
Ingo Molnara8553ac2006-06-29 02:24:38 -0700682 idesc = irq_desc + vector;
Ingo Molnard1bef4e2006-06-29 02:24:36 -0700683 if (idesc->chip != irq_type) {
684 if (idesc->chip != &no_irq_type)
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900685 printk(KERN_WARNING
686 "%s: changing vector %d from %s to %s\n",
687 __FUNCTION__, vector,
Andrew Morton351a5832006-11-16 00:42:58 -0800688 idesc->chip->name, irq_type->name);
Ingo Molnard1bef4e2006-06-29 02:24:36 -0700689 idesc->chip = irq_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 }
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400691 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692}
693
694static unsigned int
695get_target_cpu (unsigned int gsi, int vector)
696{
697#ifdef CONFIG_SMP
698 static int cpu = -1;
Ashok Rajff741902005-11-11 14:32:40 -0800699 extern int cpe_vector;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700
701 /*
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700702 * In case of vector shared by multiple RTEs, all RTEs that
703 * share the vector need to use the same destination CPU.
704 */
705 if (!list_empty(&iosapic_intr_info[vector].rtes))
706 return iosapic_intr_info[vector].dest;
707
708 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709 * If the platform supports redirection via XTP, let it
710 * distribute interrupts.
711 */
712 if (smp_int_redirect & SMP_IRQ_REDIRECTION)
713 return cpu_physical_id(smp_processor_id());
714
715 /*
716 * Some interrupts (ACPI SCI, for instance) are registered
717 * before the BSP is marked as online.
718 */
719 if (!cpu_online(smp_processor_id()))
720 return cpu_physical_id(smp_processor_id());
721
Ashok Rajff741902005-11-11 14:32:40 -0800722#ifdef CONFIG_ACPI
Ashok Rajb88e9262006-01-19 16:18:47 -0800723 if (cpe_vector > 0 && vector == IA64_CPEP_VECTOR)
724 return get_cpei_target_cpu();
Ashok Rajff741902005-11-11 14:32:40 -0800725#endif
726
Linus Torvalds1da177e2005-04-16 15:20:36 -0700727#ifdef CONFIG_NUMA
728 {
729 int num_cpus, cpu_index, iosapic_index, numa_cpu, i = 0;
730 cpumask_t cpu_mask;
731
732 iosapic_index = find_iosapic(gsi);
733 if (iosapic_index < 0 ||
734 iosapic_lists[iosapic_index].node == MAX_NUMNODES)
735 goto skip_numa_setup;
736
737 cpu_mask = node_to_cpumask(iosapic_lists[iosapic_index].node);
738
739 for_each_cpu_mask(numa_cpu, cpu_mask) {
740 if (!cpu_online(numa_cpu))
741 cpu_clear(numa_cpu, cpu_mask);
742 }
743
744 num_cpus = cpus_weight(cpu_mask);
745
746 if (!num_cpus)
747 goto skip_numa_setup;
748
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900749 /* Use vector assignment to distribute across cpus in node */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 cpu_index = vector % num_cpus;
751
752 for (numa_cpu = first_cpu(cpu_mask) ; i < cpu_index ; i++)
753 numa_cpu = next_cpu(numa_cpu, cpu_mask);
754
755 if (numa_cpu != NR_CPUS)
756 return cpu_physical_id(numa_cpu);
757 }
758skip_numa_setup:
759#endif
760 /*
761 * Otherwise, round-robin interrupt vectors across all the
762 * processors. (It'd be nice if we could be smarter in the
763 * case of NUMA.)
764 */
765 do {
766 if (++cpu >= NR_CPUS)
767 cpu = 0;
768 } while (!cpu_online(cpu));
769
770 return cpu_physical_id(cpu);
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900771#else /* CONFIG_SMP */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700772 return cpu_physical_id(smp_processor_id());
773#endif
774}
775
776/*
777 * ACPI can describe IOSAPIC interrupts via static tables and namespace
778 * methods. This provides an interface to register those interrupts and
779 * program the IOSAPIC RTE.
780 */
781int
782iosapic_register_intr (unsigned int gsi,
783 unsigned long polarity, unsigned long trigger)
784{
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400785 int vector, mask = 1, err;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700786 unsigned int dest;
787 unsigned long flags;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700788 struct iosapic_rte_info *rte;
789 u32 low32;
790again:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791 /*
792 * If this GSI has already been registered (i.e., it's a
793 * shared interrupt, or we lost a race to register it),
794 * don't touch the RTE.
795 */
796 spin_lock_irqsave(&iosapic_lock, flags);
797 {
798 vector = gsi_to_vector(gsi);
799 if (vector > 0) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700800 rte = gsi_vector_to_rte(gsi, vector);
801 rte->refcnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700802 spin_unlock_irqrestore(&iosapic_lock, flags);
803 return vector;
804 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700805 }
806 spin_unlock_irqrestore(&iosapic_lock, flags);
807
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700808 /* If vector is running out, we try to find a sharable vector */
Kenji Kaneshige3b5cc092005-07-10 21:49:00 -0700809 vector = assign_irq_vector(AUTO_ASSIGN);
810 if (vector < 0) {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700811 vector = iosapic_find_sharable_vector(trigger, polarity);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400812 if (vector < 0)
MAEDA Naoaki702c7e72005-08-08 01:09:00 -0400813 return -ENOSPC;
Kenji Kaneshige3b5cc092005-07-10 21:49:00 -0700814 }
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700815
Ingo Molnara8553ac2006-06-29 02:24:38 -0700816 spin_lock_irqsave(&irq_desc[vector].lock, flags);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700817 spin_lock(&iosapic_lock);
818 {
819 if (gsi_to_vector(gsi) > 0) {
820 if (list_empty(&iosapic_intr_info[vector].rtes))
821 free_irq_vector(vector);
822 spin_unlock(&iosapic_lock);
Ingo Molnara8553ac2006-06-29 02:24:38 -0700823 spin_unlock_irqrestore(&irq_desc[vector].lock,
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900824 flags);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700825 goto again;
826 }
827
828 dest = get_target_cpu(gsi, vector);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400829 err = register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY,
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700830 polarity, trigger);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400831 if (err < 0) {
832 spin_unlock(&iosapic_lock);
Ingo Molnara8553ac2006-06-29 02:24:38 -0700833 spin_unlock_irqrestore(&irq_desc[vector].lock,
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900834 flags);
Kenji Kaneshige14454a12005-07-28 14:42:00 -0400835 return err;
836 }
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700837
838 /*
839 * If the vector is shared and already unmasked for
840 * other interrupt sources, don't mask it.
841 */
842 low32 = iosapic_intr_info[vector].low32;
843 if (vector_is_shared(vector) && !(low32 & IOSAPIC_MASK))
844 mask = 0;
845 set_rte(gsi, vector, dest, mask);
846 }
Kenji Kaneshigeb9e41d72005-04-25 13:27:48 -0700847 spin_unlock(&iosapic_lock);
Ingo Molnara8553ac2006-06-29 02:24:38 -0700848 spin_unlock_irqrestore(&irq_desc[vector].lock, flags);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700849
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850 printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n",
851 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
852 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
853 cpu_logical_id(dest), dest, vector);
854
855 return vector;
856}
857
Linus Torvalds1da177e2005-04-16 15:20:36 -0700858void
859iosapic_unregister_intr (unsigned int gsi)
860{
861 unsigned long flags;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700862 int irq, vector, index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863 irq_desc_t *idesc;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700864 u32 low32;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700865 unsigned long trigger, polarity;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700866 unsigned int dest;
867 struct iosapic_rte_info *rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868
869 /*
870 * If the irq associated with the gsi is not found,
871 * iosapic_unregister_intr() is unbalanced. We need to check
872 * this again after getting locks.
873 */
874 irq = gsi_to_irq(gsi);
875 if (irq < 0) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900876 printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n",
877 gsi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878 WARN_ON(1);
879 return;
880 }
881 vector = irq_to_vector(irq);
882
Ingo Molnara8553ac2006-06-29 02:24:38 -0700883 idesc = irq_desc + irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884 spin_lock_irqsave(&idesc->lock, flags);
885 spin_lock(&iosapic_lock);
886 {
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700887 if ((rte = gsi_vector_to_rte(gsi, vector)) == NULL) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900888 printk(KERN_ERR
889 "iosapic_unregister_intr(%u) unbalanced\n",
890 gsi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 WARN_ON(1);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700892 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893 }
894
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700895 if (--rte->refcnt > 0)
896 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700898 /* Mask the interrupt */
899 low32 = iosapic_intr_info[vector].low32 | IOSAPIC_MASK;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900900 iosapic_write(rte->addr, IOSAPIC_RTE_LOW(rte->rte_index),
901 low32);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700903 /* Remove the rte entry from the list */
904 list_del(&rte->rte_list);
905 iosapic_intr_info[vector].count--;
906 iosapic_free_rte(rte);
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -0700907 index = find_iosapic(gsi);
908 iosapic_lists[index].rtes_inuse--;
909 WARN_ON(iosapic_lists[index].rtes_inuse < 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700911 trigger = iosapic_intr_info[vector].trigger;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912 polarity = iosapic_intr_info[vector].polarity;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700913 dest = iosapic_intr_info[vector].dest;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900914 printk(KERN_INFO
915 "GSI %u (%s, %s) -> CPU %d (0x%04x)"
916 " vector %d unregistered\n",
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700917 gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
918 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
919 cpu_logical_id(dest), dest, vector);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700921 if (list_empty(&iosapic_intr_info[vector].rtes)) {
922 /* Sanity check */
923 BUG_ON(iosapic_intr_info[vector].count);
924
925 /* Clear the interrupt controller descriptor */
Ingo Molnard1bef4e2006-06-29 02:24:36 -0700926 idesc->chip = &no_irq_type;
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700927
Alex Williamson451fe002007-01-24 22:48:04 -0700928#ifdef CONFIG_SMP
929 /* Clear affinity */
930 cpus_setall(idesc->affinity);
931#endif
932
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700933 /* Clear the interrupt information */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900934 memset(&iosapic_intr_info[vector], 0,
935 sizeof(struct iosapic_intr_info));
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700936 iosapic_intr_info[vector].low32 |= IOSAPIC_MASK;
937 INIT_LIST_HEAD(&iosapic_intr_info[vector].rtes);
938
939 if (idesc->action) {
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900940 printk(KERN_ERR
941 "interrupt handlers still exist on"
942 "IRQ %u\n", irq);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700943 WARN_ON(1);
944 }
945
946 /* Free the interrupt vector */
947 free_irq_vector(vector);
948 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 }
Kenji Kaneshige24eeb562005-04-25 13:26:23 -0700950 out:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 spin_unlock(&iosapic_lock);
952 spin_unlock_irqrestore(&idesc->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700953}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700954
955/*
956 * ACPI calls this when it finds an entry for a platform interrupt.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700957 */
958int __init
959iosapic_register_platform_intr (u32 int_type, unsigned int gsi,
960 int iosapic_vector, u16 eid, u16 id,
961 unsigned long polarity, unsigned long trigger)
962{
963 static const char * const name[] = {"unknown", "PMI", "INIT", "CPEI"};
964 unsigned char delivery;
965 int vector, mask = 0;
966 unsigned int dest = ((id << 8) | eid) & 0xffff;
967
968 switch (int_type) {
969 case ACPI_INTERRUPT_PMI:
970 vector = iosapic_vector;
971 /*
972 * since PMI vector is alloc'd by FW(ACPI) not by kernel,
973 * we need to make sure the vector is available
974 */
975 iosapic_reassign_vector(vector);
976 delivery = IOSAPIC_PMI;
977 break;
978 case ACPI_INTERRUPT_INIT:
979 vector = assign_irq_vector(AUTO_ASSIGN);
Kenji Kaneshige3b5cc092005-07-10 21:49:00 -0700980 if (vector < 0)
981 panic("%s: out of interrupt vectors!\n", __FUNCTION__);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700982 delivery = IOSAPIC_INIT;
983 break;
984 case ACPI_INTERRUPT_CPEI:
985 vector = IA64_CPE_VECTOR;
986 delivery = IOSAPIC_LOWEST_PRIORITY;
987 mask = 1;
988 break;
989 default:
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900990 printk(KERN_ERR "%s: invalid int type 0x%x\n", __FUNCTION__,
991 int_type);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 return -1;
993 }
994
995 register_intr(gsi, vector, delivery, polarity, trigger);
996
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +0900997 printk(KERN_INFO
998 "PLATFORM int %s (0x%x): GSI %u (%s, %s) -> CPU %d (0x%04x)"
999 " vector %d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000 int_type < ARRAY_SIZE(name) ? name[int_type] : "unknown",
1001 int_type, gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
1002 (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
1003 cpu_logical_id(dest), dest, vector);
1004
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001005 set_rte(gsi, vector, dest, mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006 return vector;
1007}
1008
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009/*
1010 * ACPI calls this when it finds an entry for a legacy ISA IRQ override.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011 */
1012void __init
1013iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
1014 unsigned long polarity,
1015 unsigned long trigger)
1016{
1017 int vector;
1018 unsigned int dest = cpu_physical_id(smp_processor_id());
1019
1020 vector = isa_irq_to_vector(isa_irq);
1021
1022 register_intr(gsi, vector, IOSAPIC_LOWEST_PRIORITY, polarity, trigger);
1023
1024 DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
1025 isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",
1026 polarity == IOSAPIC_POL_HIGH ? "high" : "low",
1027 cpu_logical_id(dest), dest, vector);
1028
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001029 set_rte(gsi, vector, dest, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030}
1031
1032void __init
1033iosapic_system_init (int system_pcat_compat)
1034{
1035 int vector;
1036
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001037 for (vector = 0; vector < IA64_NUM_VECTORS; ++vector) {
1038 iosapic_intr_info[vector].low32 = IOSAPIC_MASK;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001039 /* mark as unused */
1040 INIT_LIST_HEAD(&iosapic_intr_info[vector].rtes);
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001041 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042
1043 pcat_compat = system_pcat_compat;
1044 if (pcat_compat) {
1045 /*
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001046 * Disable the compatibility mode interrupts (8259 style),
1047 * needs IN/OUT support enabled.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001048 */
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001049 printk(KERN_INFO
1050 "%s: Disabling PC-AT compatible 8259 interrupts\n",
1051 __FUNCTION__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 outb(0xff, 0xA1);
1053 outb(0xff, 0x21);
1054 }
1055}
1056
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001057static inline int
1058iosapic_alloc (void)
1059{
1060 int index;
1061
1062 for (index = 0; index < NR_IOSAPICS; index++)
1063 if (!iosapic_lists[index].addr)
1064 return index;
1065
1066 printk(KERN_WARNING "%s: failed to allocate iosapic\n", __FUNCTION__);
1067 return -1;
1068}
1069
1070static inline void
1071iosapic_free (int index)
1072{
1073 memset(&iosapic_lists[index], 0, sizeof(iosapic_lists[0]));
1074}
1075
1076static inline int
1077iosapic_check_gsi_range (unsigned int gsi_base, unsigned int ver)
1078{
1079 int index;
1080 unsigned int gsi_end, base, end;
1081
1082 /* check gsi range */
1083 gsi_end = gsi_base + ((ver >> 16) & 0xff);
1084 for (index = 0; index < NR_IOSAPICS; index++) {
1085 if (!iosapic_lists[index].addr)
1086 continue;
1087
1088 base = iosapic_lists[index].gsi_base;
1089 end = base + iosapic_lists[index].num_rte - 1;
1090
Satoru Takeuchie6d1ba52006-03-27 17:13:46 +09001091 if (gsi_end < base || end < gsi_base)
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001092 continue; /* OK */
1093
1094 return -EBUSY;
1095 }
1096 return 0;
1097}
1098
1099int __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -07001100iosapic_init (unsigned long phys_addr, unsigned int gsi_base)
1101{
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001102 int num_rte, err, index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001103 unsigned int isa_irq, ver;
1104 char __iomem *addr;
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001105 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001106
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001107 spin_lock_irqsave(&iosapic_lock, flags);
1108 {
1109 addr = ioremap(phys_addr, 0);
1110 ver = iosapic_version(addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001111
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001112 if ((err = iosapic_check_gsi_range(gsi_base, ver))) {
1113 iounmap(addr);
1114 spin_unlock_irqrestore(&iosapic_lock, flags);
1115 return err;
1116 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001118 /*
1119 * The MAX_REDIR register holds the highest input pin
1120 * number (starting from 0).
1121 * We add 1 so that we can use it for number of pins (= RTEs)
1122 */
1123 num_rte = ((ver >> 16) & 0xff) + 1;
1124
1125 index = iosapic_alloc();
1126 iosapic_lists[index].addr = addr;
1127 iosapic_lists[index].gsi_base = gsi_base;
1128 iosapic_lists[index].num_rte = num_rte;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129#ifdef CONFIG_NUMA
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001130 iosapic_lists[index].node = MAX_NUMNODES;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001131#endif
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001132 }
1133 spin_unlock_irqrestore(&iosapic_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134
1135 if ((gsi_base == 0) && pcat_compat) {
1136 /*
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001137 * Map the legacy ISA devices into the IOSAPIC data. Some of
1138 * these may get reprogrammed later on with data from the ACPI
1139 * Interrupt Source Override table.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001140 */
1141 for (isa_irq = 0; isa_irq < 16; ++isa_irq)
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001142 iosapic_override_isa_irq(isa_irq, isa_irq,
1143 IOSAPIC_POL_HIGH,
1144 IOSAPIC_EDGE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001145 }
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001146 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001147}
1148
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001149#ifdef CONFIG_HOTPLUG
1150int
1151iosapic_remove (unsigned int gsi_base)
1152{
1153 int index, err = 0;
1154 unsigned long flags;
1155
1156 spin_lock_irqsave(&iosapic_lock, flags);
1157 {
1158 index = find_iosapic(gsi_base);
1159 if (index < 0) {
1160 printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n",
1161 __FUNCTION__, gsi_base);
1162 goto out;
1163 }
1164
1165 if (iosapic_lists[index].rtes_inuse) {
1166 err = -EBUSY;
Satoru Takeuchi46cba3d2006-03-27 17:12:19 +09001167 printk(KERN_WARNING
1168 "%s: IOSAPIC for GSI base %u is busy\n",
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001169 __FUNCTION__, gsi_base);
1170 goto out;
1171 }
1172
1173 iounmap(iosapic_lists[index].addr);
1174 iosapic_free(index);
1175 }
1176 out:
1177 spin_unlock_irqrestore(&iosapic_lock, flags);
1178 return err;
1179}
1180#endif /* CONFIG_HOTPLUG */
1181
Linus Torvalds1da177e2005-04-16 15:20:36 -07001182#ifdef CONFIG_NUMA
Kenji Kaneshige0e888ad2005-04-28 00:25:58 -07001183void __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -07001184map_iosapic_to_node(unsigned int gsi_base, int node)
1185{
1186 int index;
1187
1188 index = find_iosapic(gsi_base);
1189 if (index < 0) {
1190 printk(KERN_WARNING "%s: No IOSAPIC for GSI %u\n",
1191 __FUNCTION__, gsi_base);
1192 return;
1193 }
1194 iosapic_lists[index].node = node;
1195 return;
1196}
1197#endif
Kenji Kaneshige24eeb562005-04-25 13:26:23 -07001198
1199static int __init iosapic_enable_kmalloc (void)
1200{
1201 iosapic_kmalloc_ok = 1;
1202 return 0;
1203}
1204core_initcall (iosapic_enable_kmalloc);