Torez Smith | b4e8c8d | 2010-03-05 10:45:54 +0000 | [diff] [blame] | 1 | /* |
| 2 | * PPC476 board specific routines |
| 3 | * |
| 4 | * Copyright 2010 Torez Smith, IBM Corporation. |
| 5 | * |
| 6 | * Based on earlier code: |
| 7 | * Matt Porter <mporter@kernel.crashing.org> |
| 8 | * Copyright 2002-2005 MontaVista Software Inc. |
| 9 | * |
| 10 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
| 11 | * Copyright (c) 2003-2005 Zultys Technologies |
| 12 | * |
| 13 | * Rewritten and ported to the merged powerpc tree: |
| 14 | * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation. |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify it |
| 17 | * under the terms of the GNU General Public License as published by the |
| 18 | * Free Software Foundation; either version 2 of the License, or (at your |
| 19 | * option) any later version. |
| 20 | */ |
| 21 | |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/of_platform.h> |
| 24 | #include <linux/rtc.h> |
| 25 | |
| 26 | #include <asm/machdep.h> |
| 27 | #include <asm/prom.h> |
| 28 | #include <asm/udbg.h> |
| 29 | #include <asm/time.h> |
| 30 | #include <asm/uic.h> |
| 31 | #include <asm/ppc4xx.h> |
| 32 | #include <asm/mpic.h> |
| 33 | #include <asm/mmu.h> |
| 34 | |
| 35 | static __initdata struct of_device_id iss4xx_of_bus[] = { |
| 36 | { .compatible = "ibm,plb4", }, |
| 37 | { .compatible = "ibm,plb6", }, |
| 38 | { .compatible = "ibm,opb", }, |
| 39 | { .compatible = "ibm,ebc", }, |
| 40 | {}, |
| 41 | }; |
| 42 | |
| 43 | static int __init iss4xx_device_probe(void) |
| 44 | { |
| 45 | of_platform_bus_probe(NULL, iss4xx_of_bus, NULL); |
| 46 | of_instantiate_rtc(); |
| 47 | |
| 48 | return 0; |
| 49 | } |
| 50 | machine_device_initcall(iss4xx, iss4xx_device_probe); |
| 51 | |
| 52 | /* We can have either UICs or MPICs */ |
| 53 | static void __init iss4xx_init_irq(void) |
| 54 | { |
| 55 | struct device_node *np; |
| 56 | |
| 57 | /* Find top level interrupt controller */ |
| 58 | for_each_node_with_property(np, "interrupt-controller") { |
| 59 | if (of_get_property(np, "interrupts", NULL) == NULL) |
| 60 | break; |
| 61 | } |
| 62 | if (np == NULL) |
| 63 | panic("Can't find top level interrupt controller"); |
| 64 | |
| 65 | /* Check type and do appropriate initialization */ |
| 66 | if (of_device_is_compatible(np, "ibm,uic")) { |
| 67 | uic_init_tree(); |
| 68 | ppc_md.get_irq = uic_get_irq; |
| 69 | #ifdef CONFIG_MPIC |
| 70 | } else if (of_device_is_compatible(np, "chrp,open-pic")) { |
| 71 | /* The MPIC driver will get everything it needs from the |
| 72 | * device-tree, just pass 0 to all arguments |
| 73 | */ |
| 74 | struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0, |
| 75 | " MPIC "); |
| 76 | BUG_ON(mpic == NULL); |
| 77 | mpic_init(mpic); |
| 78 | ppc_md.get_irq = mpic_get_irq; |
| 79 | #endif |
| 80 | } else |
| 81 | panic("Unrecognized top level interrupt controller"); |
| 82 | } |
| 83 | |
| 84 | #ifdef CONFIG_SMP |
| 85 | static void __cpuinit smp_iss4xx_setup_cpu(int cpu) |
| 86 | { |
| 87 | mpic_setup_this_cpu(); |
| 88 | } |
| 89 | |
| 90 | static void __cpuinit smp_iss4xx_kick_cpu(int cpu) |
| 91 | { |
| 92 | struct device_node *cpunode = of_get_cpu_node(cpu, NULL); |
| 93 | const u64 *spin_table_addr_prop; |
| 94 | u32 *spin_table; |
| 95 | extern void start_secondary_47x(void); |
| 96 | |
| 97 | BUG_ON(cpunode == NULL); |
| 98 | |
| 99 | /* Assume spin table. We could test for the enable-method in |
| 100 | * the device-tree but currently there's little point as it's |
| 101 | * our only supported method |
| 102 | */ |
| 103 | spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr", |
| 104 | NULL); |
| 105 | if (spin_table_addr_prop == NULL) { |
| 106 | pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu); |
| 107 | return; |
| 108 | } |
| 109 | |
| 110 | /* Assume it's mapped as part of the linear mapping. This is a bit |
| 111 | * fishy but will work fine for now |
| 112 | */ |
| 113 | spin_table = (u32 *)__va(*spin_table_addr_prop); |
| 114 | pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table); |
| 115 | |
| 116 | spin_table[3] = cpu; |
| 117 | smp_wmb(); |
| 118 | spin_table[1] = __pa(start_secondary_47x); |
| 119 | mb(); |
| 120 | } |
| 121 | |
| 122 | static struct smp_ops_t iss_smp_ops = { |
| 123 | .probe = smp_mpic_probe, |
| 124 | .message_pass = smp_mpic_message_pass, |
| 125 | .setup_cpu = smp_iss4xx_setup_cpu, |
| 126 | .kick_cpu = smp_iss4xx_kick_cpu, |
| 127 | .give_timebase = smp_generic_give_timebase, |
| 128 | .take_timebase = smp_generic_take_timebase, |
| 129 | }; |
| 130 | |
| 131 | static void __init iss4xx_smp_init(void) |
| 132 | { |
| 133 | if (mmu_has_feature(MMU_FTR_TYPE_47x)) |
| 134 | smp_ops = &iss_smp_ops; |
| 135 | } |
| 136 | |
| 137 | #else /* CONFIG_SMP */ |
| 138 | static void __init iss4xx_smp_init(void) { } |
| 139 | #endif /* CONFIG_SMP */ |
| 140 | |
| 141 | static void __init iss4xx_setup_arch(void) |
| 142 | { |
| 143 | iss4xx_smp_init(); |
| 144 | } |
| 145 | |
| 146 | /* |
| 147 | * Called very early, MMU is off, device-tree isn't unflattened |
| 148 | */ |
| 149 | static int __init iss4xx_probe(void) |
| 150 | { |
| 151 | unsigned long root = of_get_flat_dt_root(); |
| 152 | |
| 153 | if (!of_flat_dt_is_compatible(root, "ibm,iss-4xx")) |
| 154 | return 0; |
| 155 | |
| 156 | return 1; |
| 157 | } |
| 158 | |
| 159 | define_machine(iss4xx) { |
| 160 | .name = "ISS-4xx", |
| 161 | .probe = iss4xx_probe, |
| 162 | .progress = udbg_progress, |
| 163 | .init_IRQ = iss4xx_init_irq, |
| 164 | .setup_arch = iss4xx_setup_arch, |
| 165 | .restart = ppc4xx_reset_system, |
| 166 | .calibrate_decr = generic_calibrate_decr, |
| 167 | }; |