Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * Support for a cx23417 mpeg encoder via cx23885 host port. |
| 4 | * |
Jelle Foks | f8de18d | 2008-11-20 07:07:45 -0300 | [diff] [blame] | 5 | * (c) 2004 Jelle Foks <jelle@foks.us> |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 6 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> |
Steven Toth | 6d89761 | 2008-09-03 17:12:12 -0300 | [diff] [blame] | 7 | * (c) 2008 Steven Toth <stoth@linuxtv.org> |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 8 | * - CX23885/7/8 support |
| 9 | * |
Justin P. Mattock | 631dd1a | 2010-10-18 11:03:14 +0200 | [diff] [blame] | 10 | * Includes parts from the ivtv driver <http://sourceforge.net/projects/ivtv/> |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License as published by |
| 14 | * the Free Software Foundation; either version 2 of the License, or |
| 15 | * (at your option) any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 21 | */ |
| 22 | |
| 23 | #include <linux/module.h> |
| 24 | #include <linux/moduleparam.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/fs.h> |
| 27 | #include <linux/delay.h> |
| 28 | #include <linux/device.h> |
| 29 | #include <linux/firmware.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 31 | #include <media/v4l2-common.h> |
Hans Verkuil | 35ea11f | 2008-07-20 08:12:02 -0300 | [diff] [blame] | 32 | #include <media/v4l2-ioctl.h> |
Mauro Carvalho Chehab | d647f0b | 2015-11-13 19:40:07 -0200 | [diff] [blame] | 33 | #include <media/drv-intf/cx2341x.h> |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 34 | |
| 35 | #include "cx23885.h" |
Andy Walls | 7461824 | 2009-09-26 22:50:44 -0300 | [diff] [blame] | 36 | #include "cx23885-ioctl.h" |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 37 | |
| 38 | #define CX23885_FIRM_IMAGE_SIZE 376836 |
| 39 | #define CX23885_FIRM_IMAGE_NAME "v4l-cx23885-enc.fw" |
| 40 | |
| 41 | static unsigned int mpegbufs = 32; |
| 42 | module_param(mpegbufs, int, 0644); |
| 43 | MODULE_PARM_DESC(mpegbufs, "number of mpeg buffers, range 2-32"); |
| 44 | static unsigned int mpeglines = 32; |
| 45 | module_param(mpeglines, int, 0644); |
| 46 | MODULE_PARM_DESC(mpeglines, "number of lines in an MPEG buffer, range 2-32"); |
| 47 | static unsigned int mpeglinesize = 512; |
| 48 | module_param(mpeglinesize, int, 0644); |
| 49 | MODULE_PARM_DESC(mpeglinesize, |
| 50 | "number of bytes in each line of an MPEG buffer, range 512-1024"); |
| 51 | |
| 52 | static unsigned int v4l_debug; |
| 53 | module_param(v4l_debug, int, 0644); |
| 54 | MODULE_PARM_DESC(v4l_debug, "enable V4L debug messages"); |
| 55 | |
| 56 | #define dprintk(level, fmt, arg...)\ |
| 57 | do { if (v4l_debug >= level) \ |
Michael Krufky | ca4e771 | 2009-07-19 17:55:35 -0300 | [diff] [blame] | 58 | printk(KERN_DEBUG "%s: " fmt, \ |
| 59 | (dev) ? dev->name : "cx23885[?]", ## arg); \ |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 60 | } while (0) |
| 61 | |
| 62 | static struct cx23885_tvnorm cx23885_tvnorms[] = { |
| 63 | { |
| 64 | .name = "NTSC-M", |
| 65 | .id = V4L2_STD_NTSC_M, |
| 66 | }, { |
| 67 | .name = "NTSC-JP", |
| 68 | .id = V4L2_STD_NTSC_M_JP, |
| 69 | }, { |
| 70 | .name = "PAL-BG", |
| 71 | .id = V4L2_STD_PAL_BG, |
| 72 | }, { |
| 73 | .name = "PAL-DK", |
| 74 | .id = V4L2_STD_PAL_DK, |
| 75 | }, { |
| 76 | .name = "PAL-I", |
| 77 | .id = V4L2_STD_PAL_I, |
| 78 | }, { |
| 79 | .name = "PAL-M", |
| 80 | .id = V4L2_STD_PAL_M, |
| 81 | }, { |
| 82 | .name = "PAL-N", |
| 83 | .id = V4L2_STD_PAL_N, |
| 84 | }, { |
| 85 | .name = "PAL-Nc", |
| 86 | .id = V4L2_STD_PAL_Nc, |
| 87 | }, { |
| 88 | .name = "PAL-60", |
| 89 | .id = V4L2_STD_PAL_60, |
| 90 | }, { |
| 91 | .name = "SECAM-L", |
| 92 | .id = V4L2_STD_SECAM_L, |
| 93 | }, { |
| 94 | .name = "SECAM-DK", |
| 95 | .id = V4L2_STD_SECAM_DK, |
| 96 | } |
| 97 | }; |
| 98 | |
| 99 | /* ------------------------------------------------------------------ */ |
| 100 | enum cx23885_capture_type { |
| 101 | CX23885_MPEG_CAPTURE, |
| 102 | CX23885_RAW_CAPTURE, |
| 103 | CX23885_RAW_PASSTHRU_CAPTURE |
| 104 | }; |
| 105 | enum cx23885_capture_bits { |
| 106 | CX23885_RAW_BITS_NONE = 0x00, |
| 107 | CX23885_RAW_BITS_YUV_CAPTURE = 0x01, |
| 108 | CX23885_RAW_BITS_PCM_CAPTURE = 0x02, |
| 109 | CX23885_RAW_BITS_VBI_CAPTURE = 0x04, |
| 110 | CX23885_RAW_BITS_PASSTHRU_CAPTURE = 0x08, |
| 111 | CX23885_RAW_BITS_TO_HOST_CAPTURE = 0x10 |
| 112 | }; |
| 113 | enum cx23885_capture_end { |
| 114 | CX23885_END_AT_GOP, /* stop at the end of gop, generate irq */ |
| 115 | CX23885_END_NOW, /* stop immediately, no irq */ |
| 116 | }; |
| 117 | enum cx23885_framerate { |
| 118 | CX23885_FRAMERATE_NTSC_30, /* NTSC: 30fps */ |
| 119 | CX23885_FRAMERATE_PAL_25 /* PAL: 25fps */ |
| 120 | }; |
| 121 | enum cx23885_stream_port { |
| 122 | CX23885_OUTPUT_PORT_MEMORY, |
| 123 | CX23885_OUTPUT_PORT_STREAMING, |
| 124 | CX23885_OUTPUT_PORT_SERIAL |
| 125 | }; |
| 126 | enum cx23885_data_xfer_status { |
| 127 | CX23885_MORE_BUFFERS_FOLLOW, |
| 128 | CX23885_LAST_BUFFER, |
| 129 | }; |
| 130 | enum cx23885_picture_mask { |
| 131 | CX23885_PICTURE_MASK_NONE, |
| 132 | CX23885_PICTURE_MASK_I_FRAMES, |
| 133 | CX23885_PICTURE_MASK_I_P_FRAMES = 0x3, |
| 134 | CX23885_PICTURE_MASK_ALL_FRAMES = 0x7, |
| 135 | }; |
| 136 | enum cx23885_vbi_mode_bits { |
| 137 | CX23885_VBI_BITS_SLICED, |
| 138 | CX23885_VBI_BITS_RAW, |
| 139 | }; |
| 140 | enum cx23885_vbi_insertion_bits { |
| 141 | CX23885_VBI_BITS_INSERT_IN_XTENSION_USR_DATA, |
| 142 | CX23885_VBI_BITS_INSERT_IN_PRIVATE_PACKETS = 0x1 << 1, |
| 143 | CX23885_VBI_BITS_SEPARATE_STREAM = 0x2 << 1, |
| 144 | CX23885_VBI_BITS_SEPARATE_STREAM_USR_DATA = 0x4 << 1, |
| 145 | CX23885_VBI_BITS_SEPARATE_STREAM_PRV_DATA = 0x5 << 1, |
| 146 | }; |
| 147 | enum cx23885_dma_unit { |
| 148 | CX23885_DMA_BYTES, |
| 149 | CX23885_DMA_FRAMES, |
| 150 | }; |
| 151 | enum cx23885_dma_transfer_status_bits { |
| 152 | CX23885_DMA_TRANSFER_BITS_DONE = 0x01, |
| 153 | CX23885_DMA_TRANSFER_BITS_ERROR = 0x04, |
| 154 | CX23885_DMA_TRANSFER_BITS_LL_ERROR = 0x10, |
| 155 | }; |
| 156 | enum cx23885_pause { |
| 157 | CX23885_PAUSE_ENCODING, |
| 158 | CX23885_RESUME_ENCODING, |
| 159 | }; |
| 160 | enum cx23885_copyright { |
| 161 | CX23885_COPYRIGHT_OFF, |
| 162 | CX23885_COPYRIGHT_ON, |
| 163 | }; |
| 164 | enum cx23885_notification_type { |
| 165 | CX23885_NOTIFICATION_REFRESH, |
| 166 | }; |
| 167 | enum cx23885_notification_status { |
| 168 | CX23885_NOTIFICATION_OFF, |
| 169 | CX23885_NOTIFICATION_ON, |
| 170 | }; |
| 171 | enum cx23885_notification_mailbox { |
| 172 | CX23885_NOTIFICATION_NO_MAILBOX = -1, |
| 173 | }; |
| 174 | enum cx23885_field1_lines { |
| 175 | CX23885_FIELD1_SAA7114 = 0x00EF, /* 239 */ |
| 176 | CX23885_FIELD1_SAA7115 = 0x00F0, /* 240 */ |
| 177 | CX23885_FIELD1_MICRONAS = 0x0105, /* 261 */ |
| 178 | }; |
| 179 | enum cx23885_field2_lines { |
| 180 | CX23885_FIELD2_SAA7114 = 0x00EF, /* 239 */ |
| 181 | CX23885_FIELD2_SAA7115 = 0x00F0, /* 240 */ |
| 182 | CX23885_FIELD2_MICRONAS = 0x0106, /* 262 */ |
| 183 | }; |
| 184 | enum cx23885_custom_data_type { |
| 185 | CX23885_CUSTOM_EXTENSION_USR_DATA, |
| 186 | CX23885_CUSTOM_PRIVATE_PACKET, |
| 187 | }; |
| 188 | enum cx23885_mute { |
| 189 | CX23885_UNMUTE, |
| 190 | CX23885_MUTE, |
| 191 | }; |
| 192 | enum cx23885_mute_video_mask { |
| 193 | CX23885_MUTE_VIDEO_V_MASK = 0x0000FF00, |
| 194 | CX23885_MUTE_VIDEO_U_MASK = 0x00FF0000, |
| 195 | CX23885_MUTE_VIDEO_Y_MASK = 0xFF000000, |
| 196 | }; |
| 197 | enum cx23885_mute_video_shift { |
| 198 | CX23885_MUTE_VIDEO_V_SHIFT = 8, |
| 199 | CX23885_MUTE_VIDEO_U_SHIFT = 16, |
| 200 | CX23885_MUTE_VIDEO_Y_SHIFT = 24, |
| 201 | }; |
| 202 | |
| 203 | /* defines below are from ivtv-driver.h */ |
| 204 | #define IVTV_CMD_HW_BLOCKS_RST 0xFFFFFFFF |
| 205 | |
| 206 | /* Firmware API commands */ |
| 207 | #define IVTV_API_STD_TIMEOUT 500 |
| 208 | |
| 209 | /* Registers */ |
| 210 | /* IVTV_REG_OFFSET */ |
| 211 | #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8) |
| 212 | #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC) |
| 213 | #define IVTV_REG_SPU (0x9050) |
| 214 | #define IVTV_REG_HW_BLOCKS (0x9054) |
| 215 | #define IVTV_REG_VPU (0x9058) |
| 216 | #define IVTV_REG_APU (0xA064) |
| 217 | |
| 218 | /**** Bit definitions for MC417_RWD and MC417_OEN registers *** |
| 219 | bits 31-16 |
| 220 | +-----------+ |
| 221 | | Reserved | |
| 222 | +-----------+ |
| 223 | bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 |
| 224 | +-------+-------+-------+-------+-------+-------+-------+-------+ |
| 225 | | MIWR# | MIRD# | MICS# |MIRDY# |MIADDR3|MIADDR2|MIADDR1|MIADDR0| |
| 226 | +-------+-------+-------+-------+-------+-------+-------+-------+ |
| 227 | bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 |
| 228 | +-------+-------+-------+-------+-------+-------+-------+-------+ |
| 229 | |MIDATA7|MIDATA6|MIDATA5|MIDATA4|MIDATA3|MIDATA2|MIDATA1|MIDATA0| |
| 230 | +-------+-------+-------+-------+-------+-------+-------+-------+ |
| 231 | ***/ |
| 232 | #define MC417_MIWR 0x8000 |
| 233 | #define MC417_MIRD 0x4000 |
| 234 | #define MC417_MICS 0x2000 |
| 235 | #define MC417_MIRDY 0x1000 |
| 236 | #define MC417_MIADDR 0x0F00 |
| 237 | #define MC417_MIDATA 0x00FF |
| 238 | |
| 239 | /* MIADDR* nibble definitions */ |
| 240 | #define MCI_MEMORY_DATA_BYTE0 0x000 |
| 241 | #define MCI_MEMORY_DATA_BYTE1 0x100 |
| 242 | #define MCI_MEMORY_DATA_BYTE2 0x200 |
| 243 | #define MCI_MEMORY_DATA_BYTE3 0x300 |
| 244 | #define MCI_MEMORY_ADDRESS_BYTE2 0x400 |
| 245 | #define MCI_MEMORY_ADDRESS_BYTE1 0x500 |
| 246 | #define MCI_MEMORY_ADDRESS_BYTE0 0x600 |
| 247 | #define MCI_REGISTER_DATA_BYTE0 0x800 |
| 248 | #define MCI_REGISTER_DATA_BYTE1 0x900 |
| 249 | #define MCI_REGISTER_DATA_BYTE2 0xA00 |
| 250 | #define MCI_REGISTER_DATA_BYTE3 0xB00 |
| 251 | #define MCI_REGISTER_ADDRESS_BYTE0 0xC00 |
| 252 | #define MCI_REGISTER_ADDRESS_BYTE1 0xD00 |
| 253 | #define MCI_REGISTER_MODE 0xE00 |
| 254 | |
| 255 | /* Read and write modes */ |
| 256 | #define MCI_MODE_REGISTER_READ 0 |
| 257 | #define MCI_MODE_REGISTER_WRITE 1 |
| 258 | #define MCI_MODE_MEMORY_READ 0 |
| 259 | #define MCI_MODE_MEMORY_WRITE 0x40 |
| 260 | |
| 261 | /*** Bit definitions for MC417_CTL register **** |
| 262 | bits 31-6 bits 5-4 bit 3 bits 2-1 Bit 0 |
| 263 | +--------+-------------+--------+--------------+------------+ |
| 264 | |Reserved|MC417_SPD_CTL|Reserved|MC417_GPIO_SEL|UART_GPIO_EN| |
| 265 | +--------+-------------+--------+--------------+------------+ |
| 266 | ***/ |
| 267 | #define MC417_SPD_CTL(x) (((x) << 4) & 0x00000030) |
| 268 | #define MC417_GPIO_SEL(x) (((x) << 1) & 0x00000006) |
| 269 | #define MC417_UART_GPIO_EN 0x00000001 |
| 270 | |
| 271 | /* Values for speed control */ |
| 272 | #define MC417_SPD_CTL_SLOW 0x1 |
| 273 | #define MC417_SPD_CTL_MEDIUM 0x0 |
| 274 | #define MC417_SPD_CTL_FAST 0x3 /* b'1x, but we use b'11 */ |
| 275 | |
| 276 | /* Values for GPIO select */ |
| 277 | #define MC417_GPIO_SEL_GPIO3 0x3 |
| 278 | #define MC417_GPIO_SEL_GPIO2 0x2 |
| 279 | #define MC417_GPIO_SEL_GPIO1 0x1 |
| 280 | #define MC417_GPIO_SEL_GPIO0 0x0 |
| 281 | |
| 282 | void cx23885_mc417_init(struct cx23885_dev *dev) |
| 283 | { |
| 284 | u32 regval; |
| 285 | |
| 286 | dprintk(2, "%s()\n", __func__); |
| 287 | |
| 288 | /* Configure MC417_CTL register to defaults. */ |
| 289 | regval = MC417_SPD_CTL(MC417_SPD_CTL_FAST) | |
| 290 | MC417_GPIO_SEL(MC417_GPIO_SEL_GPIO3) | |
| 291 | MC417_UART_GPIO_EN; |
| 292 | cx_write(MC417_CTL, regval); |
| 293 | |
| 294 | /* Configure MC417_OEN to defaults. */ |
| 295 | regval = MC417_MIRDY; |
| 296 | cx_write(MC417_OEN, regval); |
| 297 | |
| 298 | /* Configure MC417_RWD to defaults. */ |
| 299 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS; |
| 300 | cx_write(MC417_RWD, regval); |
| 301 | } |
| 302 | |
| 303 | static int mc417_wait_ready(struct cx23885_dev *dev) |
| 304 | { |
| 305 | u32 mi_ready; |
| 306 | unsigned long timeout = jiffies + msecs_to_jiffies(1); |
| 307 | |
| 308 | for (;;) { |
| 309 | mi_ready = cx_read(MC417_RWD) & MC417_MIRDY; |
| 310 | if (mi_ready != 0) |
| 311 | return 0; |
| 312 | if (time_after(jiffies, timeout)) |
| 313 | return -1; |
| 314 | udelay(1); |
| 315 | } |
| 316 | } |
| 317 | |
Andy Walls | 7461824 | 2009-09-26 22:50:44 -0300 | [diff] [blame] | 318 | int mc417_register_write(struct cx23885_dev *dev, u16 address, u32 value) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 319 | { |
| 320 | u32 regval; |
| 321 | |
| 322 | /* Enable MC417 GPIO outputs except for MC417_MIRDY, |
| 323 | * which is an input. |
| 324 | */ |
| 325 | cx_write(MC417_OEN, MC417_MIRDY); |
| 326 | |
| 327 | /* Write data byte 0 */ |
| 328 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0 | |
| 329 | (value & 0x000000FF); |
| 330 | cx_write(MC417_RWD, regval); |
| 331 | |
| 332 | /* Transition CS/WR to effect write transaction across bus. */ |
| 333 | regval |= MC417_MICS | MC417_MIWR; |
| 334 | cx_write(MC417_RWD, regval); |
| 335 | |
| 336 | /* Write data byte 1 */ |
| 337 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE1 | |
| 338 | ((value >> 8) & 0x000000FF); |
| 339 | cx_write(MC417_RWD, regval); |
| 340 | regval |= MC417_MICS | MC417_MIWR; |
| 341 | cx_write(MC417_RWD, regval); |
| 342 | |
| 343 | /* Write data byte 2 */ |
| 344 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE2 | |
| 345 | ((value >> 16) & 0x000000FF); |
| 346 | cx_write(MC417_RWD, regval); |
| 347 | regval |= MC417_MICS | MC417_MIWR; |
| 348 | cx_write(MC417_RWD, regval); |
| 349 | |
| 350 | /* Write data byte 3 */ |
| 351 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE3 | |
| 352 | ((value >> 24) & 0x000000FF); |
| 353 | cx_write(MC417_RWD, regval); |
| 354 | regval |= MC417_MICS | MC417_MIWR; |
| 355 | cx_write(MC417_RWD, regval); |
| 356 | |
| 357 | /* Write address byte 0 */ |
| 358 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_ADDRESS_BYTE0 | |
| 359 | (address & 0xFF); |
| 360 | cx_write(MC417_RWD, regval); |
| 361 | regval |= MC417_MICS | MC417_MIWR; |
| 362 | cx_write(MC417_RWD, regval); |
| 363 | |
| 364 | /* Write address byte 1 */ |
| 365 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_ADDRESS_BYTE1 | |
| 366 | ((address >> 8) & 0xFF); |
| 367 | cx_write(MC417_RWD, regval); |
| 368 | regval |= MC417_MICS | MC417_MIWR; |
| 369 | cx_write(MC417_RWD, regval); |
| 370 | |
| 371 | /* Indicate that this is a write. */ |
| 372 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_MODE | |
| 373 | MCI_MODE_REGISTER_WRITE; |
| 374 | cx_write(MC417_RWD, regval); |
| 375 | regval |= MC417_MICS | MC417_MIWR; |
| 376 | cx_write(MC417_RWD, regval); |
| 377 | |
| 378 | /* Wait for the trans to complete (MC417_MIRDY asserted). */ |
| 379 | return mc417_wait_ready(dev); |
| 380 | } |
| 381 | |
Andy Walls | 7461824 | 2009-09-26 22:50:44 -0300 | [diff] [blame] | 382 | int mc417_register_read(struct cx23885_dev *dev, u16 address, u32 *value) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 383 | { |
| 384 | int retval; |
| 385 | u32 regval; |
| 386 | u32 tempval; |
| 387 | u32 dataval; |
| 388 | |
| 389 | /* Enable MC417 GPIO outputs except for MC417_MIRDY, |
| 390 | * which is an input. |
| 391 | */ |
| 392 | cx_write(MC417_OEN, MC417_MIRDY); |
| 393 | |
| 394 | /* Write address byte 0 */ |
| 395 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_ADDRESS_BYTE0 | |
| 396 | ((address & 0x00FF)); |
| 397 | cx_write(MC417_RWD, regval); |
| 398 | regval |= MC417_MICS | MC417_MIWR; |
| 399 | cx_write(MC417_RWD, regval); |
| 400 | |
| 401 | /* Write address byte 1 */ |
| 402 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_ADDRESS_BYTE1 | |
| 403 | ((address >> 8) & 0xFF); |
| 404 | cx_write(MC417_RWD, regval); |
| 405 | regval |= MC417_MICS | MC417_MIWR; |
| 406 | cx_write(MC417_RWD, regval); |
| 407 | |
| 408 | /* Indicate that this is a register read. */ |
| 409 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_MODE | |
| 410 | MCI_MODE_REGISTER_READ; |
| 411 | cx_write(MC417_RWD, regval); |
| 412 | regval |= MC417_MICS | MC417_MIWR; |
| 413 | cx_write(MC417_RWD, regval); |
| 414 | |
| 415 | /* Wait for the trans to complete (MC417_MIRDY asserted). */ |
| 416 | retval = mc417_wait_ready(dev); |
| 417 | |
| 418 | /* switch the DAT0-7 GPIO[10:3] to input mode */ |
| 419 | cx_write(MC417_OEN, MC417_MIRDY | MC417_MIDATA); |
| 420 | |
| 421 | /* Read data byte 0 */ |
| 422 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0; |
| 423 | cx_write(MC417_RWD, regval); |
| 424 | |
| 425 | /* Transition RD to effect read transaction across bus. |
Jonathan McCrohan | 39c1cb2 | 2013-10-20 21:34:01 -0300 | [diff] [blame] | 426 | * Transition 0x5000 -> 0x9000 correct (RD/RDY -> WR/RDY)? |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 427 | * Should it be 0x9000 -> 0xF000 (also why is RDY being set, its |
| 428 | * input only...) |
| 429 | */ |
| 430 | regval = MC417_MIWR | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0; |
| 431 | cx_write(MC417_RWD, regval); |
| 432 | |
| 433 | /* Collect byte */ |
| 434 | tempval = cx_read(MC417_RWD); |
| 435 | dataval = tempval & 0x000000FF; |
| 436 | |
| 437 | /* Bring CS and RD high. */ |
| 438 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 439 | cx_write(MC417_RWD, regval); |
| 440 | |
| 441 | /* Read data byte 1 */ |
| 442 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE1; |
| 443 | cx_write(MC417_RWD, regval); |
| 444 | regval = MC417_MIWR | MC417_MIRDY | MCI_REGISTER_DATA_BYTE1; |
| 445 | cx_write(MC417_RWD, regval); |
| 446 | tempval = cx_read(MC417_RWD); |
| 447 | dataval |= ((tempval & 0x000000FF) << 8); |
| 448 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 449 | cx_write(MC417_RWD, regval); |
| 450 | |
| 451 | /* Read data byte 2 */ |
| 452 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE2; |
| 453 | cx_write(MC417_RWD, regval); |
| 454 | regval = MC417_MIWR | MC417_MIRDY | MCI_REGISTER_DATA_BYTE2; |
| 455 | cx_write(MC417_RWD, regval); |
| 456 | tempval = cx_read(MC417_RWD); |
| 457 | dataval |= ((tempval & 0x000000FF) << 16); |
| 458 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 459 | cx_write(MC417_RWD, regval); |
| 460 | |
| 461 | /* Read data byte 3 */ |
| 462 | regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE3; |
| 463 | cx_write(MC417_RWD, regval); |
| 464 | regval = MC417_MIWR | MC417_MIRDY | MCI_REGISTER_DATA_BYTE3; |
| 465 | cx_write(MC417_RWD, regval); |
| 466 | tempval = cx_read(MC417_RWD); |
| 467 | dataval |= ((tempval & 0x000000FF) << 24); |
| 468 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 469 | cx_write(MC417_RWD, regval); |
| 470 | |
| 471 | *value = dataval; |
| 472 | |
| 473 | return retval; |
| 474 | } |
| 475 | |
| 476 | int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value) |
| 477 | { |
| 478 | u32 regval; |
| 479 | |
| 480 | /* Enable MC417 GPIO outputs except for MC417_MIRDY, |
| 481 | * which is an input. |
| 482 | */ |
| 483 | cx_write(MC417_OEN, MC417_MIRDY); |
| 484 | |
| 485 | /* Write data byte 0 */ |
| 486 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE0 | |
| 487 | (value & 0x000000FF); |
| 488 | cx_write(MC417_RWD, regval); |
| 489 | |
| 490 | /* Transition CS/WR to effect write transaction across bus. */ |
| 491 | regval |= MC417_MICS | MC417_MIWR; |
| 492 | cx_write(MC417_RWD, regval); |
| 493 | |
| 494 | /* Write data byte 1 */ |
| 495 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE1 | |
| 496 | ((value >> 8) & 0x000000FF); |
| 497 | cx_write(MC417_RWD, regval); |
| 498 | regval |= MC417_MICS | MC417_MIWR; |
| 499 | cx_write(MC417_RWD, regval); |
| 500 | |
| 501 | /* Write data byte 2 */ |
| 502 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE2 | |
| 503 | ((value >> 16) & 0x000000FF); |
| 504 | cx_write(MC417_RWD, regval); |
| 505 | regval |= MC417_MICS | MC417_MIWR; |
| 506 | cx_write(MC417_RWD, regval); |
| 507 | |
| 508 | /* Write data byte 3 */ |
| 509 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE3 | |
| 510 | ((value >> 24) & 0x000000FF); |
| 511 | cx_write(MC417_RWD, regval); |
| 512 | regval |= MC417_MICS | MC417_MIWR; |
| 513 | cx_write(MC417_RWD, regval); |
| 514 | |
| 515 | /* Write address byte 2 */ |
| 516 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_ADDRESS_BYTE2 | |
| 517 | MCI_MODE_MEMORY_WRITE | ((address >> 16) & 0x3F); |
| 518 | cx_write(MC417_RWD, regval); |
| 519 | regval |= MC417_MICS | MC417_MIWR; |
| 520 | cx_write(MC417_RWD, regval); |
| 521 | |
| 522 | /* Write address byte 1 */ |
| 523 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_ADDRESS_BYTE1 | |
| 524 | ((address >> 8) & 0xFF); |
| 525 | cx_write(MC417_RWD, regval); |
| 526 | regval |= MC417_MICS | MC417_MIWR; |
| 527 | cx_write(MC417_RWD, regval); |
| 528 | |
| 529 | /* Write address byte 0 */ |
| 530 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_ADDRESS_BYTE0 | |
| 531 | (address & 0xFF); |
| 532 | cx_write(MC417_RWD, regval); |
| 533 | regval |= MC417_MICS | MC417_MIWR; |
| 534 | cx_write(MC417_RWD, regval); |
| 535 | |
| 536 | /* Wait for the trans to complete (MC417_MIRDY asserted). */ |
| 537 | return mc417_wait_ready(dev); |
| 538 | } |
| 539 | |
| 540 | int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value) |
| 541 | { |
| 542 | int retval; |
| 543 | u32 regval; |
| 544 | u32 tempval; |
| 545 | u32 dataval; |
| 546 | |
| 547 | /* Enable MC417 GPIO outputs except for MC417_MIRDY, |
| 548 | * which is an input. |
| 549 | */ |
| 550 | cx_write(MC417_OEN, MC417_MIRDY); |
| 551 | |
| 552 | /* Write address byte 2 */ |
| 553 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_ADDRESS_BYTE2 | |
| 554 | MCI_MODE_MEMORY_READ | ((address >> 16) & 0x3F); |
| 555 | cx_write(MC417_RWD, regval); |
| 556 | regval |= MC417_MICS | MC417_MIWR; |
| 557 | cx_write(MC417_RWD, regval); |
| 558 | |
| 559 | /* Write address byte 1 */ |
| 560 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_ADDRESS_BYTE1 | |
| 561 | ((address >> 8) & 0xFF); |
| 562 | cx_write(MC417_RWD, regval); |
| 563 | regval |= MC417_MICS | MC417_MIWR; |
| 564 | cx_write(MC417_RWD, regval); |
| 565 | |
| 566 | /* Write address byte 0 */ |
| 567 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_ADDRESS_BYTE0 | |
| 568 | (address & 0xFF); |
| 569 | cx_write(MC417_RWD, regval); |
| 570 | regval |= MC417_MICS | MC417_MIWR; |
| 571 | cx_write(MC417_RWD, regval); |
| 572 | |
| 573 | /* Wait for the trans to complete (MC417_MIRDY asserted). */ |
| 574 | retval = mc417_wait_ready(dev); |
| 575 | |
| 576 | /* switch the DAT0-7 GPIO[10:3] to input mode */ |
| 577 | cx_write(MC417_OEN, MC417_MIRDY | MC417_MIDATA); |
| 578 | |
| 579 | /* Read data byte 3 */ |
| 580 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE3; |
| 581 | cx_write(MC417_RWD, regval); |
| 582 | |
| 583 | /* Transition RD to effect read transaction across bus. */ |
| 584 | regval = MC417_MIWR | MC417_MIRDY | MCI_MEMORY_DATA_BYTE3; |
| 585 | cx_write(MC417_RWD, regval); |
| 586 | |
| 587 | /* Collect byte */ |
| 588 | tempval = cx_read(MC417_RWD); |
| 589 | dataval = ((tempval & 0x000000FF) << 24); |
| 590 | |
| 591 | /* Bring CS and RD high. */ |
| 592 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 593 | cx_write(MC417_RWD, regval); |
| 594 | |
| 595 | /* Read data byte 2 */ |
| 596 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE2; |
| 597 | cx_write(MC417_RWD, regval); |
| 598 | regval = MC417_MIWR | MC417_MIRDY | MCI_MEMORY_DATA_BYTE2; |
| 599 | cx_write(MC417_RWD, regval); |
| 600 | tempval = cx_read(MC417_RWD); |
| 601 | dataval |= ((tempval & 0x000000FF) << 16); |
| 602 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 603 | cx_write(MC417_RWD, regval); |
| 604 | |
| 605 | /* Read data byte 1 */ |
| 606 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE1; |
| 607 | cx_write(MC417_RWD, regval); |
| 608 | regval = MC417_MIWR | MC417_MIRDY | MCI_MEMORY_DATA_BYTE1; |
| 609 | cx_write(MC417_RWD, regval); |
| 610 | tempval = cx_read(MC417_RWD); |
| 611 | dataval |= ((tempval & 0x000000FF) << 8); |
| 612 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 613 | cx_write(MC417_RWD, regval); |
| 614 | |
| 615 | /* Read data byte 0 */ |
| 616 | regval = MC417_MIRD | MC417_MIRDY | MCI_MEMORY_DATA_BYTE0; |
| 617 | cx_write(MC417_RWD, regval); |
| 618 | regval = MC417_MIWR | MC417_MIRDY | MCI_MEMORY_DATA_BYTE0; |
| 619 | cx_write(MC417_RWD, regval); |
| 620 | tempval = cx_read(MC417_RWD); |
| 621 | dataval |= (tempval & 0x000000FF); |
| 622 | regval = MC417_MIWR | MC417_MIRD | MC417_MICS | MC417_MIRDY; |
| 623 | cx_write(MC417_RWD, regval); |
| 624 | |
| 625 | *value = dataval; |
| 626 | |
| 627 | return retval; |
| 628 | } |
| 629 | |
Steven Toth | f659c51 | 2009-06-25 23:43:31 -0300 | [diff] [blame] | 630 | void mc417_gpio_set(struct cx23885_dev *dev, u32 mask) |
| 631 | { |
| 632 | u32 val; |
| 633 | |
| 634 | /* Set the gpio value */ |
| 635 | mc417_register_read(dev, 0x900C, &val); |
| 636 | val |= (mask & 0x000ffff); |
| 637 | mc417_register_write(dev, 0x900C, val); |
| 638 | } |
| 639 | |
| 640 | void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask) |
| 641 | { |
| 642 | u32 val; |
| 643 | |
| 644 | /* Clear the gpio value */ |
| 645 | mc417_register_read(dev, 0x900C, &val); |
| 646 | val &= ~(mask & 0x0000ffff); |
| 647 | mc417_register_write(dev, 0x900C, val); |
| 648 | } |
| 649 | |
| 650 | void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput) |
| 651 | { |
| 652 | u32 val; |
| 653 | |
| 654 | /* Enable GPIO direction bits */ |
| 655 | mc417_register_read(dev, 0x9020, &val); |
| 656 | if (asoutput) |
| 657 | val |= (mask & 0x0000ffff); |
| 658 | else |
| 659 | val &= ~(mask & 0x0000ffff); |
| 660 | |
| 661 | mc417_register_write(dev, 0x9020, val); |
| 662 | } |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 663 | /* ------------------------------------------------------------------ */ |
| 664 | |
| 665 | /* MPEG encoder API */ |
Hans Verkuil | d45b9b8 | 2008-09-04 03:33:43 -0300 | [diff] [blame] | 666 | static char *cmd_to_str(int cmd) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 667 | { |
| 668 | switch (cmd) { |
| 669 | case CX2341X_ENC_PING_FW: |
| 670 | return "PING_FW"; |
| 671 | case CX2341X_ENC_START_CAPTURE: |
| 672 | return "START_CAPTURE"; |
| 673 | case CX2341X_ENC_STOP_CAPTURE: |
| 674 | return "STOP_CAPTURE"; |
| 675 | case CX2341X_ENC_SET_AUDIO_ID: |
| 676 | return "SET_AUDIO_ID"; |
| 677 | case CX2341X_ENC_SET_VIDEO_ID: |
| 678 | return "SET_VIDEO_ID"; |
| 679 | case CX2341X_ENC_SET_PCR_ID: |
Roel Kluin | 26ee91e | 2010-01-19 21:47:30 -0300 | [diff] [blame] | 680 | return "SET_PCR_ID"; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 681 | case CX2341X_ENC_SET_FRAME_RATE: |
| 682 | return "SET_FRAME_RATE"; |
| 683 | case CX2341X_ENC_SET_FRAME_SIZE: |
| 684 | return "SET_FRAME_SIZE"; |
| 685 | case CX2341X_ENC_SET_BIT_RATE: |
| 686 | return "SET_BIT_RATE"; |
| 687 | case CX2341X_ENC_SET_GOP_PROPERTIES: |
| 688 | return "SET_GOP_PROPERTIES"; |
| 689 | case CX2341X_ENC_SET_ASPECT_RATIO: |
| 690 | return "SET_ASPECT_RATIO"; |
| 691 | case CX2341X_ENC_SET_DNR_FILTER_MODE: |
Roel Kluin | 26ee91e | 2010-01-19 21:47:30 -0300 | [diff] [blame] | 692 | return "SET_DNR_FILTER_MODE"; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 693 | case CX2341X_ENC_SET_DNR_FILTER_PROPS: |
| 694 | return "SET_DNR_FILTER_PROPS"; |
| 695 | case CX2341X_ENC_SET_CORING_LEVELS: |
| 696 | return "SET_CORING_LEVELS"; |
| 697 | case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE: |
| 698 | return "SET_SPATIAL_FILTER_TYPE"; |
| 699 | case CX2341X_ENC_SET_VBI_LINE: |
| 700 | return "SET_VBI_LINE"; |
| 701 | case CX2341X_ENC_SET_STREAM_TYPE: |
| 702 | return "SET_STREAM_TYPE"; |
| 703 | case CX2341X_ENC_SET_OUTPUT_PORT: |
| 704 | return "SET_OUTPUT_PORT"; |
| 705 | case CX2341X_ENC_SET_AUDIO_PROPERTIES: |
| 706 | return "SET_AUDIO_PROPERTIES"; |
| 707 | case CX2341X_ENC_HALT_FW: |
| 708 | return "HALT_FW"; |
| 709 | case CX2341X_ENC_GET_VERSION: |
| 710 | return "GET_VERSION"; |
| 711 | case CX2341X_ENC_SET_GOP_CLOSURE: |
| 712 | return "SET_GOP_CLOSURE"; |
| 713 | case CX2341X_ENC_GET_SEQ_END: |
| 714 | return "GET_SEQ_END"; |
| 715 | case CX2341X_ENC_SET_PGM_INDEX_INFO: |
| 716 | return "SET_PGM_INDEX_INFO"; |
| 717 | case CX2341X_ENC_SET_VBI_CONFIG: |
| 718 | return "SET_VBI_CONFIG"; |
| 719 | case CX2341X_ENC_SET_DMA_BLOCK_SIZE: |
| 720 | return "SET_DMA_BLOCK_SIZE"; |
| 721 | case CX2341X_ENC_GET_PREV_DMA_INFO_MB_10: |
| 722 | return "GET_PREV_DMA_INFO_MB_10"; |
| 723 | case CX2341X_ENC_GET_PREV_DMA_INFO_MB_9: |
| 724 | return "GET_PREV_DMA_INFO_MB_9"; |
| 725 | case CX2341X_ENC_SCHED_DMA_TO_HOST: |
| 726 | return "SCHED_DMA_TO_HOST"; |
| 727 | case CX2341X_ENC_INITIALIZE_INPUT: |
| 728 | return "INITIALIZE_INPUT"; |
| 729 | case CX2341X_ENC_SET_FRAME_DROP_RATE: |
| 730 | return "SET_FRAME_DROP_RATE"; |
| 731 | case CX2341X_ENC_PAUSE_ENCODER: |
| 732 | return "PAUSE_ENCODER"; |
| 733 | case CX2341X_ENC_REFRESH_INPUT: |
| 734 | return "REFRESH_INPUT"; |
| 735 | case CX2341X_ENC_SET_COPYRIGHT: |
| 736 | return "SET_COPYRIGHT"; |
| 737 | case CX2341X_ENC_SET_EVENT_NOTIFICATION: |
| 738 | return "SET_EVENT_NOTIFICATION"; |
| 739 | case CX2341X_ENC_SET_NUM_VSYNC_LINES: |
| 740 | return "SET_NUM_VSYNC_LINES"; |
| 741 | case CX2341X_ENC_SET_PLACEHOLDER: |
| 742 | return "SET_PLACEHOLDER"; |
| 743 | case CX2341X_ENC_MUTE_VIDEO: |
| 744 | return "MUTE_VIDEO"; |
| 745 | case CX2341X_ENC_MUTE_AUDIO: |
| 746 | return "MUTE_AUDIO"; |
| 747 | case CX2341X_ENC_MISC: |
| 748 | return "MISC"; |
| 749 | default: |
| 750 | return "UNKNOWN"; |
| 751 | } |
| 752 | } |
| 753 | |
| 754 | static int cx23885_mbox_func(void *priv, |
| 755 | u32 command, |
| 756 | int in, |
| 757 | int out, |
| 758 | u32 data[CX2341X_MBOX_MAX_DATA]) |
| 759 | { |
| 760 | struct cx23885_dev *dev = priv; |
| 761 | unsigned long timeout; |
| 762 | u32 value, flag, retval = 0; |
| 763 | int i; |
| 764 | |
| 765 | dprintk(3, "%s: command(0x%X) = %s\n", __func__, command, |
| 766 | cmd_to_str(command)); |
| 767 | |
| 768 | /* this may not be 100% safe if we can't read any memory location |
| 769 | without side effects */ |
| 770 | mc417_memory_read(dev, dev->cx23417_mailbox - 4, &value); |
| 771 | if (value != 0x12345678) { |
| 772 | printk(KERN_ERR |
| 773 | "Firmware and/or mailbox pointer not initialized " |
| 774 | "or corrupted, signature = 0x%x, cmd = %s\n", value, |
| 775 | cmd_to_str(command)); |
| 776 | return -1; |
| 777 | } |
| 778 | |
| 779 | /* This read looks at 32 bits, but flag is only 8 bits. |
| 780 | * Seems we also bail if CMD or TIMEOUT bytes are set??? |
| 781 | */ |
| 782 | mc417_memory_read(dev, dev->cx23417_mailbox, &flag); |
| 783 | if (flag) { |
| 784 | printk(KERN_ERR "ERROR: Mailbox appears to be in use " |
| 785 | "(%x), cmd = %s\n", flag, cmd_to_str(command)); |
| 786 | return -1; |
| 787 | } |
| 788 | |
| 789 | flag |= 1; /* tell 'em we're working on it */ |
| 790 | mc417_memory_write(dev, dev->cx23417_mailbox, flag); |
| 791 | |
| 792 | /* write command + args + fill remaining with zeros */ |
| 793 | /* command code */ |
| 794 | mc417_memory_write(dev, dev->cx23417_mailbox + 1, command); |
| 795 | mc417_memory_write(dev, dev->cx23417_mailbox + 3, |
| 796 | IVTV_API_STD_TIMEOUT); /* timeout */ |
| 797 | for (i = 0; i < in; i++) { |
| 798 | mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, data[i]); |
| 799 | dprintk(3, "API Input %d = %d\n", i, data[i]); |
| 800 | } |
| 801 | for (; i < CX2341X_MBOX_MAX_DATA; i++) |
| 802 | mc417_memory_write(dev, dev->cx23417_mailbox + 4 + i, 0); |
| 803 | |
| 804 | flag |= 3; /* tell 'em we're done writing */ |
| 805 | mc417_memory_write(dev, dev->cx23417_mailbox, flag); |
| 806 | |
| 807 | /* wait for firmware to handle the API command */ |
| 808 | timeout = jiffies + msecs_to_jiffies(10); |
| 809 | for (;;) { |
| 810 | mc417_memory_read(dev, dev->cx23417_mailbox, &flag); |
| 811 | if (0 != (flag & 4)) |
| 812 | break; |
| 813 | if (time_after(jiffies, timeout)) { |
| 814 | printk(KERN_ERR "ERROR: API Mailbox timeout\n"); |
| 815 | return -1; |
| 816 | } |
| 817 | udelay(10); |
| 818 | } |
| 819 | |
| 820 | /* read output values */ |
| 821 | for (i = 0; i < out; i++) { |
| 822 | mc417_memory_read(dev, dev->cx23417_mailbox + 4 + i, data + i); |
| 823 | dprintk(3, "API Output %d = %d\n", i, data[i]); |
| 824 | } |
| 825 | |
| 826 | mc417_memory_read(dev, dev->cx23417_mailbox + 2, &retval); |
| 827 | dprintk(3, "API result = %d\n", retval); |
| 828 | |
| 829 | flag = 0; |
| 830 | mc417_memory_write(dev, dev->cx23417_mailbox, flag); |
| 831 | |
| 832 | return retval; |
| 833 | } |
| 834 | |
| 835 | /* We don't need to call the API often, so using just one |
| 836 | * mailbox will probably suffice |
| 837 | */ |
| 838 | static int cx23885_api_cmd(struct cx23885_dev *dev, |
| 839 | u32 command, |
| 840 | u32 inputcnt, |
| 841 | u32 outputcnt, |
| 842 | ...) |
| 843 | { |
| 844 | u32 data[CX2341X_MBOX_MAX_DATA]; |
| 845 | va_list vargs; |
| 846 | int i, err; |
| 847 | |
| 848 | dprintk(3, "%s() cmds = 0x%08x\n", __func__, command); |
| 849 | |
| 850 | va_start(vargs, outputcnt); |
| 851 | for (i = 0; i < inputcnt; i++) |
| 852 | data[i] = va_arg(vargs, int); |
| 853 | |
| 854 | err = cx23885_mbox_func(dev, command, inputcnt, outputcnt, data); |
| 855 | for (i = 0; i < outputcnt; i++) { |
| 856 | int *vptr = va_arg(vargs, int *); |
| 857 | *vptr = data[i]; |
| 858 | } |
| 859 | va_end(vargs); |
| 860 | |
| 861 | return err; |
| 862 | } |
| 863 | |
Hans Verkuil | 5150392 | 2014-04-23 07:02:15 -0300 | [diff] [blame] | 864 | static int cx23885_api_func(void *priv, u32 cmd, int in, int out, u32 data[CX2341X_MBOX_MAX_DATA]) |
| 865 | { |
| 866 | return cx23885_mbox_func(priv, cmd, in, out, data); |
| 867 | } |
| 868 | |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 869 | static int cx23885_find_mailbox(struct cx23885_dev *dev) |
| 870 | { |
| 871 | u32 signature[4] = { |
| 872 | 0x12345678, 0x34567812, 0x56781234, 0x78123456 |
| 873 | }; |
| 874 | int signaturecnt = 0; |
| 875 | u32 value; |
| 876 | int i; |
| 877 | |
| 878 | dprintk(2, "%s()\n", __func__); |
| 879 | |
| 880 | for (i = 0; i < CX23885_FIRM_IMAGE_SIZE; i++) { |
| 881 | mc417_memory_read(dev, i, &value); |
| 882 | if (value == signature[signaturecnt]) |
| 883 | signaturecnt++; |
| 884 | else |
| 885 | signaturecnt = 0; |
| 886 | if (4 == signaturecnt) { |
| 887 | dprintk(1, "Mailbox signature found at 0x%x\n", i+1); |
| 888 | return i+1; |
| 889 | } |
| 890 | } |
| 891 | printk(KERN_ERR "Mailbox signature values not found!\n"); |
| 892 | return -1; |
| 893 | } |
| 894 | |
| 895 | static int cx23885_load_firmware(struct cx23885_dev *dev) |
| 896 | { |
| 897 | static const unsigned char magic[8] = { |
| 898 | 0xa7, 0x0d, 0x00, 0x00, 0x66, 0xbb, 0x55, 0xaa |
| 899 | }; |
| 900 | const struct firmware *firmware; |
| 901 | int i, retval = 0; |
| 902 | u32 value = 0; |
| 903 | u32 gpio_output = 0; |
Steven Toth | 182d29f | 2012-01-04 10:52:26 -0300 | [diff] [blame] | 904 | u32 gpio_value; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 905 | u32 checksum = 0; |
| 906 | u32 *dataptr; |
| 907 | |
| 908 | dprintk(2, "%s()\n", __func__); |
| 909 | |
| 910 | /* Save GPIO settings before reset of APU */ |
| 911 | retval |= mc417_memory_read(dev, 0x9020, &gpio_output); |
Steven Toth | 182d29f | 2012-01-04 10:52:26 -0300 | [diff] [blame] | 912 | retval |= mc417_memory_read(dev, 0x900C, &gpio_value); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 913 | |
| 914 | retval = mc417_register_write(dev, |
| 915 | IVTV_REG_VPU, 0xFFFFFFED); |
| 916 | retval |= mc417_register_write(dev, |
| 917 | IVTV_REG_HW_BLOCKS, IVTV_CMD_HW_BLOCKS_RST); |
| 918 | retval |= mc417_register_write(dev, |
| 919 | IVTV_REG_ENC_SDRAM_REFRESH, 0x80000800); |
| 920 | retval |= mc417_register_write(dev, |
| 921 | IVTV_REG_ENC_SDRAM_PRECHARGE, 0x1A); |
| 922 | retval |= mc417_register_write(dev, |
| 923 | IVTV_REG_APU, 0); |
| 924 | |
| 925 | if (retval != 0) { |
| 926 | printk(KERN_ERR "%s: Error with mc417_register_write\n", |
| 927 | __func__); |
| 928 | return -1; |
| 929 | } |
| 930 | |
| 931 | retval = request_firmware(&firmware, CX23885_FIRM_IMAGE_NAME, |
| 932 | &dev->pci->dev); |
| 933 | |
| 934 | if (retval != 0) { |
| 935 | printk(KERN_ERR |
| 936 | "ERROR: Hotplug firmware request failed (%s).\n", |
Steven Toth | d35ed62 | 2009-03-28 13:58:28 -0300 | [diff] [blame] | 937 | CX23885_FIRM_IMAGE_NAME); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 938 | printk(KERN_ERR "Please fix your hotplug setup, the board will " |
| 939 | "not work without firmware loaded!\n"); |
| 940 | return -1; |
| 941 | } |
| 942 | |
| 943 | if (firmware->size != CX23885_FIRM_IMAGE_SIZE) { |
| 944 | printk(KERN_ERR "ERROR: Firmware size mismatch " |
Mauro Carvalho Chehab | 339f06c | 2014-09-24 20:35:48 -0300 | [diff] [blame] | 945 | "(have %zu, expected %d)\n", |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 946 | firmware->size, CX23885_FIRM_IMAGE_SIZE); |
| 947 | release_firmware(firmware); |
| 948 | return -1; |
| 949 | } |
| 950 | |
| 951 | if (0 != memcmp(firmware->data, magic, 8)) { |
| 952 | printk(KERN_ERR |
| 953 | "ERROR: Firmware magic mismatch, wrong file?\n"); |
| 954 | release_firmware(firmware); |
| 955 | return -1; |
| 956 | } |
| 957 | |
| 958 | /* transfer to the chip */ |
| 959 | dprintk(2, "Loading firmware ...\n"); |
| 960 | dataptr = (u32 *)firmware->data; |
| 961 | for (i = 0; i < (firmware->size >> 2); i++) { |
| 962 | value = *dataptr; |
| 963 | checksum += ~value; |
| 964 | if (mc417_memory_write(dev, i, value) != 0) { |
| 965 | printk(KERN_ERR "ERROR: Loading firmware failed!\n"); |
| 966 | release_firmware(firmware); |
| 967 | return -1; |
| 968 | } |
| 969 | dataptr++; |
| 970 | } |
| 971 | |
| 972 | /* read back to verify with the checksum */ |
| 973 | dprintk(1, "Verifying firmware ...\n"); |
| 974 | for (i--; i >= 0; i--) { |
| 975 | if (mc417_memory_read(dev, i, &value) != 0) { |
| 976 | printk(KERN_ERR "ERROR: Reading firmware failed!\n"); |
| 977 | release_firmware(firmware); |
| 978 | return -1; |
| 979 | } |
| 980 | checksum -= ~value; |
| 981 | } |
| 982 | if (checksum) { |
| 983 | printk(KERN_ERR |
| 984 | "ERROR: Firmware load failed (checksum mismatch).\n"); |
| 985 | release_firmware(firmware); |
| 986 | return -1; |
| 987 | } |
| 988 | release_firmware(firmware); |
| 989 | dprintk(1, "Firmware upload successful.\n"); |
| 990 | |
| 991 | retval |= mc417_register_write(dev, IVTV_REG_HW_BLOCKS, |
| 992 | IVTV_CMD_HW_BLOCKS_RST); |
| 993 | |
Steven Toth | f659c51 | 2009-06-25 23:43:31 -0300 | [diff] [blame] | 994 | /* F/W power up disturbs the GPIOs, restore state */ |
| 995 | retval |= mc417_register_write(dev, 0x9020, gpio_output); |
Steven Toth | 182d29f | 2012-01-04 10:52:26 -0300 | [diff] [blame] | 996 | retval |= mc417_register_write(dev, 0x900C, gpio_value); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 997 | |
| 998 | retval |= mc417_register_read(dev, IVTV_REG_VPU, &value); |
| 999 | retval |= mc417_register_write(dev, IVTV_REG_VPU, value & 0xFFFFFFE8); |
| 1000 | |
Steven Toth | 182d29f | 2012-01-04 10:52:26 -0300 | [diff] [blame] | 1001 | /* Hardcoded GPIO's here */ |
| 1002 | retval |= mc417_register_write(dev, 0x9020, 0x4000); |
| 1003 | retval |= mc417_register_write(dev, 0x900C, 0x4000); |
| 1004 | |
| 1005 | mc417_register_read(dev, 0x9020, &gpio_output); |
| 1006 | mc417_register_read(dev, 0x900C, &gpio_value); |
| 1007 | |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1008 | if (retval < 0) |
| 1009 | printk(KERN_ERR "%s: Error with mc417_register_write\n", |
| 1010 | __func__); |
| 1011 | return 0; |
| 1012 | } |
| 1013 | |
| 1014 | void cx23885_417_check_encoder(struct cx23885_dev *dev) |
| 1015 | { |
| 1016 | u32 status, seq; |
| 1017 | |
| 1018 | status = seq = 0; |
| 1019 | cx23885_api_cmd(dev, CX2341X_ENC_GET_SEQ_END, 0, 2, &status, &seq); |
| 1020 | dprintk(1, "%s() status = %d, seq = %d\n", __func__, status, seq); |
| 1021 | } |
| 1022 | |
| 1023 | static void cx23885_codec_settings(struct cx23885_dev *dev) |
| 1024 | { |
| 1025 | dprintk(1, "%s()\n", __func__); |
| 1026 | |
Steven Toth | 38e3d7c | 2012-01-04 10:54:32 -0300 | [diff] [blame] | 1027 | /* Dynamically change the height based on video standard */ |
| 1028 | if (dev->encodernorm.id & V4L2_STD_525_60) |
| 1029 | dev->ts1.height = 480; |
| 1030 | else |
| 1031 | dev->ts1.height = 576; |
| 1032 | |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1033 | /* assign frame size */ |
| 1034 | cx23885_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0, |
| 1035 | dev->ts1.height, dev->ts1.width); |
| 1036 | |
Hans Verkuil | 5150392 | 2014-04-23 07:02:15 -0300 | [diff] [blame] | 1037 | dev->cxhdl.width = dev->ts1.width; |
| 1038 | dev->cxhdl.height = dev->ts1.height; |
| 1039 | dev->cxhdl.is_50hz = |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1040 | (dev->encodernorm.id & V4L2_STD_625_50) != 0; |
| 1041 | |
Hans Verkuil | 5150392 | 2014-04-23 07:02:15 -0300 | [diff] [blame] | 1042 | cx2341x_handler_setup(&dev->cxhdl); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1043 | |
| 1044 | cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 3, 1); |
| 1045 | cx23885_api_cmd(dev, CX2341X_ENC_MISC, 2, 0, 4, 1); |
| 1046 | } |
| 1047 | |
Steven Toth | 9c9c3d0 | 2012-01-04 10:56:14 -0300 | [diff] [blame] | 1048 | static int cx23885_initialize_codec(struct cx23885_dev *dev, int startencoder) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1049 | { |
| 1050 | int version; |
| 1051 | int retval; |
| 1052 | u32 i, data[7]; |
| 1053 | |
| 1054 | dprintk(1, "%s()\n", __func__); |
| 1055 | |
| 1056 | retval = cx23885_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0); /* ping */ |
| 1057 | if (retval < 0) { |
| 1058 | dprintk(2, "%s() PING OK\n", __func__); |
| 1059 | retval = cx23885_load_firmware(dev); |
| 1060 | if (retval < 0) { |
| 1061 | printk(KERN_ERR "%s() f/w load failed\n", __func__); |
| 1062 | return retval; |
| 1063 | } |
roel kluin | f347535 | 2008-11-26 22:03:18 -0300 | [diff] [blame] | 1064 | retval = cx23885_find_mailbox(dev); |
| 1065 | if (retval < 0) { |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1066 | printk(KERN_ERR "%s() mailbox < 0, error\n", |
| 1067 | __func__); |
| 1068 | return -1; |
| 1069 | } |
roel kluin | f347535 | 2008-11-26 22:03:18 -0300 | [diff] [blame] | 1070 | dev->cx23417_mailbox = retval; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1071 | retval = cx23885_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0); |
| 1072 | if (retval < 0) { |
| 1073 | printk(KERN_ERR |
| 1074 | "ERROR: cx23417 firmware ping failed!\n"); |
| 1075 | return -1; |
| 1076 | } |
| 1077 | retval = cx23885_api_cmd(dev, CX2341X_ENC_GET_VERSION, 0, 1, |
| 1078 | &version); |
| 1079 | if (retval < 0) { |
| 1080 | printk(KERN_ERR "ERROR: cx23417 firmware get encoder :" |
| 1081 | "version failed!\n"); |
| 1082 | return -1; |
| 1083 | } |
| 1084 | dprintk(1, "cx23417 firmware version is 0x%08x\n", version); |
| 1085 | msleep(200); |
| 1086 | } |
| 1087 | |
| 1088 | cx23885_codec_settings(dev); |
| 1089 | msleep(60); |
| 1090 | |
| 1091 | cx23885_api_cmd(dev, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, 0, |
| 1092 | CX23885_FIELD1_SAA7115, CX23885_FIELD2_SAA7115); |
| 1093 | cx23885_api_cmd(dev, CX2341X_ENC_SET_PLACEHOLDER, 12, 0, |
| 1094 | CX23885_CUSTOM_EXTENSION_USR_DATA, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 1095 | 0, 0); |
| 1096 | |
| 1097 | /* Setup to capture VBI */ |
| 1098 | data[0] = 0x0001BD00; |
| 1099 | data[1] = 1; /* frames per interrupt */ |
| 1100 | data[2] = 4; /* total bufs */ |
| 1101 | data[3] = 0x91559155; /* start codes */ |
| 1102 | data[4] = 0x206080C0; /* stop codes */ |
| 1103 | data[5] = 6; /* lines */ |
| 1104 | data[6] = 64; /* BPL */ |
| 1105 | |
| 1106 | cx23885_api_cmd(dev, CX2341X_ENC_SET_VBI_CONFIG, 7, 0, data[0], data[1], |
| 1107 | data[2], data[3], data[4], data[5], data[6]); |
| 1108 | |
| 1109 | for (i = 2; i <= 24; i++) { |
| 1110 | int valid; |
| 1111 | |
| 1112 | valid = ((i >= 19) && (i <= 21)); |
| 1113 | cx23885_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0, i, |
| 1114 | valid, 0 , 0, 0); |
| 1115 | cx23885_api_cmd(dev, CX2341X_ENC_SET_VBI_LINE, 5, 0, |
| 1116 | i | 0x80000000, valid, 0, 0, 0); |
| 1117 | } |
| 1118 | |
| 1119 | cx23885_api_cmd(dev, CX2341X_ENC_MUTE_AUDIO, 1, 0, CX23885_UNMUTE); |
| 1120 | msleep(60); |
| 1121 | |
| 1122 | /* initialize the video input */ |
| 1123 | cx23885_api_cmd(dev, CX2341X_ENC_INITIALIZE_INPUT, 0, 0); |
| 1124 | msleep(60); |
| 1125 | |
| 1126 | /* Enable VIP style pixel invalidation so we work with scaled mode */ |
| 1127 | mc417_memory_write(dev, 2120, 0x00000080); |
| 1128 | |
| 1129 | /* start capturing to the host interface */ |
Steven Toth | 9c9c3d0 | 2012-01-04 10:56:14 -0300 | [diff] [blame] | 1130 | if (startencoder) { |
| 1131 | cx23885_api_cmd(dev, CX2341X_ENC_START_CAPTURE, 2, 0, |
| 1132 | CX23885_MPEG_CAPTURE, CX23885_RAW_BITS_NONE); |
| 1133 | msleep(10); |
| 1134 | } |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1135 | |
| 1136 | return 0; |
| 1137 | } |
| 1138 | |
| 1139 | /* ------------------------------------------------------------------ */ |
| 1140 | |
Hans Verkuil | df9ecb0 | 2015-10-28 00:50:37 -0200 | [diff] [blame] | 1141 | static int queue_setup(struct vb2_queue *q, |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1142 | unsigned int *num_buffers, unsigned int *num_planes, |
| 1143 | unsigned int sizes[], void *alloc_ctxs[]) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1144 | { |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1145 | struct cx23885_dev *dev = q->drv_priv; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1146 | |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1147 | dev->ts1.ts_packet_size = mpeglinesize; |
| 1148 | dev->ts1.ts_packet_count = mpeglines; |
| 1149 | *num_planes = 1; |
| 1150 | sizes[0] = mpeglinesize * mpeglines; |
Hans Verkuil | 0c3a14c | 2014-11-18 09:51:01 -0300 | [diff] [blame] | 1151 | alloc_ctxs[0] = dev->alloc_ctx; |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1152 | *num_buffers = mpegbufs; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1153 | return 0; |
| 1154 | } |
| 1155 | |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1156 | static int buffer_prepare(struct vb2_buffer *vb) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1157 | { |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1158 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1159 | struct cx23885_dev *dev = vb->vb2_queue->drv_priv; |
| 1160 | struct cx23885_buffer *buf = |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1161 | container_of(vbuf, struct cx23885_buffer, vb); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1162 | |
| 1163 | return cx23885_buf_prepare(buf, &dev->ts1); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1164 | } |
| 1165 | |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1166 | static void buffer_finish(struct vb2_buffer *vb) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1167 | { |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1168 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1169 | struct cx23885_dev *dev = vb->vb2_queue->drv_priv; |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1170 | struct cx23885_buffer *buf = container_of(vbuf, |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1171 | struct cx23885_buffer, vb); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1172 | |
| 1173 | cx23885_free_buffer(dev, buf); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1174 | } |
| 1175 | |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1176 | static void buffer_queue(struct vb2_buffer *vb) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1177 | { |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1178 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1179 | struct cx23885_dev *dev = vb->vb2_queue->drv_priv; |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1180 | struct cx23885_buffer *buf = container_of(vbuf, |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1181 | struct cx23885_buffer, vb); |
| 1182 | |
| 1183 | cx23885_buf_queue(&dev->ts1, buf); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1184 | } |
| 1185 | |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1186 | static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count) |
| 1187 | { |
| 1188 | struct cx23885_dev *dev = q->drv_priv; |
| 1189 | struct cx23885_dmaqueue *dmaq = &dev->ts1.mpegq; |
| 1190 | unsigned long flags; |
| 1191 | int ret; |
| 1192 | |
| 1193 | ret = cx23885_initialize_codec(dev, 1); |
| 1194 | if (ret == 0) { |
| 1195 | struct cx23885_buffer *buf = list_entry(dmaq->active.next, |
| 1196 | struct cx23885_buffer, queue); |
| 1197 | |
| 1198 | cx23885_start_dma(&dev->ts1, dmaq, buf); |
| 1199 | return 0; |
| 1200 | } |
| 1201 | spin_lock_irqsave(&dev->slock, flags); |
| 1202 | while (!list_empty(&dmaq->active)) { |
| 1203 | struct cx23885_buffer *buf = list_entry(dmaq->active.next, |
| 1204 | struct cx23885_buffer, queue); |
| 1205 | |
| 1206 | list_del(&buf->queue); |
Junghak Sung | 2d70071 | 2015-09-22 10:30:30 -0300 | [diff] [blame] | 1207 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1208 | } |
| 1209 | spin_unlock_irqrestore(&dev->slock, flags); |
| 1210 | return ret; |
| 1211 | } |
| 1212 | |
| 1213 | static void cx23885_stop_streaming(struct vb2_queue *q) |
| 1214 | { |
| 1215 | struct cx23885_dev *dev = q->drv_priv; |
| 1216 | |
| 1217 | /* stop mpeg capture */ |
| 1218 | cx23885_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0, |
| 1219 | CX23885_END_NOW, CX23885_MPEG_CAPTURE, |
| 1220 | CX23885_RAW_BITS_NONE); |
| 1221 | |
| 1222 | msleep(500); |
| 1223 | cx23885_417_check_encoder(dev); |
| 1224 | cx23885_cancel_buffers(&dev->ts1); |
| 1225 | } |
| 1226 | |
| 1227 | static struct vb2_ops cx23885_qops = { |
| 1228 | .queue_setup = queue_setup, |
| 1229 | .buf_prepare = buffer_prepare, |
| 1230 | .buf_finish = buffer_finish, |
| 1231 | .buf_queue = buffer_queue, |
| 1232 | .wait_prepare = vb2_ops_wait_prepare, |
| 1233 | .wait_finish = vb2_ops_wait_finish, |
| 1234 | .start_streaming = cx23885_start_streaming, |
| 1235 | .stop_streaming = cx23885_stop_streaming, |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1236 | }; |
| 1237 | |
| 1238 | /* ------------------------------------------------------------------ */ |
| 1239 | |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1240 | static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id) |
| 1241 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1242 | struct cx23885_dev *dev = video_drvdata(file); |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1243 | |
Hans Verkuil | 9c1f5df | 2013-06-03 05:36:46 -0300 | [diff] [blame] | 1244 | *id = dev->tvnorm; |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1245 | return 0; |
| 1246 | } |
| 1247 | |
Hans Verkuil | 314527a | 2013-03-15 06:10:40 -0300 | [diff] [blame] | 1248 | static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1249 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1250 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1251 | unsigned int i; |
Hans Verkuil | f1b6a73 | 2014-08-14 06:43:36 -0300 | [diff] [blame] | 1252 | int ret; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1253 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1254 | for (i = 0; i < ARRAY_SIZE(cx23885_tvnorms); i++) |
Hans Verkuil | 314527a | 2013-03-15 06:10:40 -0300 | [diff] [blame] | 1255 | if (id & cx23885_tvnorms[i].id) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1256 | break; |
| 1257 | if (i == ARRAY_SIZE(cx23885_tvnorms)) |
| 1258 | return -EINVAL; |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1259 | |
Hans Verkuil | f1b6a73 | 2014-08-14 06:43:36 -0300 | [diff] [blame] | 1260 | ret = cx23885_set_tvnorm(dev, id); |
| 1261 | if (!ret) |
| 1262 | dev->encodernorm = cx23885_tvnorms[i]; |
| 1263 | return ret; |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1264 | } |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1265 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1266 | static int vidioc_enum_input(struct file *file, void *priv, |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1267 | struct v4l2_input *i) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1268 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1269 | struct cx23885_dev *dev = video_drvdata(file); |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1270 | dprintk(1, "%s()\n", __func__); |
| 1271 | return cx23885_enum_input(dev, i); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1272 | } |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1273 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1274 | static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) |
| 1275 | { |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1276 | return cx23885_get_input(file, priv, i); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1277 | } |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1278 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1279 | static int vidioc_s_input(struct file *file, void *priv, unsigned int i) |
| 1280 | { |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1281 | return cx23885_set_input(file, priv, i); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1282 | } |
| 1283 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1284 | static int vidioc_g_tuner(struct file *file, void *priv, |
| 1285 | struct v4l2_tuner *t) |
| 1286 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1287 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1288 | |
Hans Verkuil | 0f3bf3d | 2014-06-27 11:15:41 -0300 | [diff] [blame] | 1289 | if (dev->tuner_type == TUNER_ABSENT) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1290 | return -EINVAL; |
| 1291 | if (0 != t->index) |
| 1292 | return -EINVAL; |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1293 | strcpy(t->name, "Television"); |
Hans Verkuil | 0d5a19f | 2009-03-29 06:53:29 -0300 | [diff] [blame] | 1294 | call_all(dev, tuner, g_tuner, t); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1295 | |
| 1296 | dprintk(1, "VIDIOC_G_TUNER: tuner type %d\n", t->type); |
| 1297 | |
| 1298 | return 0; |
| 1299 | } |
| 1300 | |
| 1301 | static int vidioc_s_tuner(struct file *file, void *priv, |
Hans Verkuil | 2f73c7c | 2013-03-15 06:10:06 -0300 | [diff] [blame] | 1302 | const struct v4l2_tuner *t) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1303 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1304 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1305 | |
Hans Verkuil | 0f3bf3d | 2014-06-27 11:15:41 -0300 | [diff] [blame] | 1306 | if (dev->tuner_type == TUNER_ABSENT) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1307 | return -EINVAL; |
| 1308 | |
| 1309 | /* Update the A/V core */ |
Hans Verkuil | 0d5a19f | 2009-03-29 06:53:29 -0300 | [diff] [blame] | 1310 | call_all(dev, tuner, s_tuner, t); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1311 | |
| 1312 | return 0; |
| 1313 | } |
| 1314 | |
| 1315 | static int vidioc_g_frequency(struct file *file, void *priv, |
| 1316 | struct v4l2_frequency *f) |
| 1317 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1318 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1319 | |
Hans Verkuil | 0f3bf3d | 2014-06-27 11:15:41 -0300 | [diff] [blame] | 1320 | if (dev->tuner_type == TUNER_ABSENT) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1321 | return -EINVAL; |
| 1322 | f->type = V4L2_TUNER_ANALOG_TV; |
| 1323 | f->frequency = dev->freq; |
| 1324 | |
Hans Verkuil | 0d5a19f | 2009-03-29 06:53:29 -0300 | [diff] [blame] | 1325 | call_all(dev, tuner, g_frequency, f); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1326 | |
| 1327 | return 0; |
| 1328 | } |
| 1329 | |
| 1330 | static int vidioc_s_frequency(struct file *file, void *priv, |
Hans Verkuil | b530a44 | 2013-03-19 04:09:26 -0300 | [diff] [blame] | 1331 | const struct v4l2_frequency *f) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1332 | { |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1333 | return cx23885_set_frequency(file, priv, f); |
| 1334 | } |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1335 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1336 | static int vidioc_querycap(struct file *file, void *priv, |
| 1337 | struct v4l2_capability *cap) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1338 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1339 | struct cx23885_dev *dev = video_drvdata(file); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1340 | struct cx23885_tsport *tsport = &dev->ts1; |
| 1341 | |
Dan Carpenter | b084307 | 2010-04-06 02:26:48 -0300 | [diff] [blame] | 1342 | strlcpy(cap->driver, dev->name, sizeof(cap->driver)); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1343 | strlcpy(cap->card, cx23885_boards[tsport->dev->board].name, |
| 1344 | sizeof(cap->card)); |
Hans Verkuil | 6b46211 | 2015-03-08 23:20:03 -0800 | [diff] [blame] | 1345 | sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); |
| 1346 | cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | |
| 1347 | V4L2_CAP_STREAMING; |
Hans Verkuil | 0f3bf3d | 2014-06-27 11:15:41 -0300 | [diff] [blame] | 1348 | if (dev->tuner_type != TUNER_ABSENT) |
Hans Verkuil | 6b46211 | 2015-03-08 23:20:03 -0800 | [diff] [blame] | 1349 | cap->device_caps |= V4L2_CAP_TUNER; |
| 1350 | cap->capabilities = cap->device_caps | V4L2_CAP_VBI_CAPTURE | |
| 1351 | V4L2_CAP_AUDIO | V4L2_CAP_DEVICE_CAPS; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1352 | |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1353 | return 0; |
| 1354 | } |
| 1355 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1356 | static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, |
| 1357 | struct v4l2_fmtdesc *f) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1358 | { |
Trent Piepho | f29816bc | 2009-03-28 22:25:36 -0300 | [diff] [blame] | 1359 | if (f->index != 0) |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1360 | return -EINVAL; |
| 1361 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1362 | strlcpy(f->description, "MPEG", sizeof(f->description)); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1363 | f->pixelformat = V4L2_PIX_FMT_MPEG; |
| 1364 | |
| 1365 | return 0; |
| 1366 | } |
| 1367 | |
| 1368 | static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, |
| 1369 | struct v4l2_format *f) |
| 1370 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1371 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1372 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1373 | f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; |
| 1374 | f->fmt.pix.bytesperline = 0; |
| 1375 | f->fmt.pix.sizeimage = |
| 1376 | dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; |
| 1377 | f->fmt.pix.colorspace = 0; |
| 1378 | f->fmt.pix.width = dev->ts1.width; |
| 1379 | f->fmt.pix.height = dev->ts1.height; |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1380 | f->fmt.pix.field = V4L2_FIELD_INTERLACED; |
| 1381 | dprintk(1, "VIDIOC_G_FMT: w: %d, h: %d\n", |
| 1382 | dev->ts1.width, dev->ts1.height); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1383 | return 0; |
| 1384 | } |
| 1385 | |
| 1386 | static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, |
| 1387 | struct v4l2_format *f) |
| 1388 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1389 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1390 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1391 | f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; |
| 1392 | f->fmt.pix.bytesperline = 0; |
| 1393 | f->fmt.pix.sizeimage = |
| 1394 | dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1395 | f->fmt.pix.colorspace = 0; |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1396 | f->fmt.pix.field = V4L2_FIELD_INTERLACED; |
| 1397 | dprintk(1, "VIDIOC_TRY_FMT: w: %d, h: %d\n", |
| 1398 | dev->ts1.width, dev->ts1.height); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1399 | return 0; |
| 1400 | } |
| 1401 | |
| 1402 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, |
| 1403 | struct v4l2_format *f) |
| 1404 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1405 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1406 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1407 | f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG; |
| 1408 | f->fmt.pix.bytesperline = 0; |
| 1409 | f->fmt.pix.sizeimage = |
| 1410 | dev->ts1.ts_packet_size * dev->ts1.ts_packet_count; |
| 1411 | f->fmt.pix.colorspace = 0; |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1412 | f->fmt.pix.field = V4L2_FIELD_INTERLACED; |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1413 | dprintk(1, "VIDIOC_S_FMT: w: %d, h: %d, f: %d\n", |
| 1414 | f->fmt.pix.width, f->fmt.pix.height, f->fmt.pix.field); |
| 1415 | return 0; |
| 1416 | } |
| 1417 | |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1418 | static int vidioc_log_status(struct file *file, void *priv) |
| 1419 | { |
Hans Verkuil | 568f44a | 2014-04-23 08:43:51 -0300 | [diff] [blame] | 1420 | struct cx23885_dev *dev = video_drvdata(file); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1421 | char name[32 + 2]; |
| 1422 | |
| 1423 | snprintf(name, sizeof(name), "%s/2", dev->name); |
Hans Verkuil | 0d5a19f | 2009-03-29 06:53:29 -0300 | [diff] [blame] | 1424 | call_all(dev, core, log_status); |
Hans Verkuil | 5150392 | 2014-04-23 07:02:15 -0300 | [diff] [blame] | 1425 | v4l2_ctrl_handler_log_status(&dev->cxhdl.hdl, name); |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1426 | return 0; |
| 1427 | } |
| 1428 | |
Hans Verkuil | bec4366 | 2008-12-30 06:58:20 -0300 | [diff] [blame] | 1429 | static struct v4l2_file_operations mpeg_fops = { |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1430 | .owner = THIS_MODULE, |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1431 | .open = v4l2_fh_open, |
| 1432 | .release = vb2_fop_release, |
| 1433 | .read = vb2_fop_read, |
| 1434 | .poll = vb2_fop_poll, |
Hans Verkuil | 24a8f7b | 2014-08-09 11:29:55 -0300 | [diff] [blame] | 1435 | .unlocked_ioctl = video_ioctl2, |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1436 | .mmap = vb2_fop_mmap, |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1437 | }; |
| 1438 | |
Hans Verkuil | a399810 | 2008-07-21 02:57:38 -0300 | [diff] [blame] | 1439 | static const struct v4l2_ioctl_ops mpeg_ioctl_ops = { |
Steven Toth | 09b3bc2 | 2012-01-04 21:11:55 -0300 | [diff] [blame] | 1440 | .vidioc_g_std = vidioc_g_std, |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1441 | .vidioc_s_std = vidioc_s_std, |
| 1442 | .vidioc_enum_input = vidioc_enum_input, |
| 1443 | .vidioc_g_input = vidioc_g_input, |
| 1444 | .vidioc_s_input = vidioc_s_input, |
| 1445 | .vidioc_g_tuner = vidioc_g_tuner, |
| 1446 | .vidioc_s_tuner = vidioc_s_tuner, |
| 1447 | .vidioc_g_frequency = vidioc_g_frequency, |
| 1448 | .vidioc_s_frequency = vidioc_s_frequency, |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1449 | .vidioc_querycap = vidioc_querycap, |
| 1450 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, |
| 1451 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, |
| 1452 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, |
| 1453 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1454 | .vidioc_reqbufs = vb2_ioctl_reqbufs, |
| 1455 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, |
| 1456 | .vidioc_querybuf = vb2_ioctl_querybuf, |
| 1457 | .vidioc_qbuf = vb2_ioctl_qbuf, |
| 1458 | .vidioc_dqbuf = vb2_ioctl_dqbuf, |
| 1459 | .vidioc_streamon = vb2_ioctl_streamon, |
| 1460 | .vidioc_streamoff = vb2_ioctl_streamoff, |
Douglas Schilling Landgraf | 305519c | 2008-06-27 04:15:38 -0300 | [diff] [blame] | 1461 | .vidioc_log_status = vidioc_log_status, |
Andy Walls | 7461824 | 2009-09-26 22:50:44 -0300 | [diff] [blame] | 1462 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
Hans Verkuil | 80f8568 | 2013-05-29 06:59:39 -0300 | [diff] [blame] | 1463 | .vidioc_g_chip_info = cx23885_g_chip_info, |
Andy Walls | 7461824 | 2009-09-26 22:50:44 -0300 | [diff] [blame] | 1464 | .vidioc_g_register = cx23885_g_register, |
| 1465 | .vidioc_s_register = cx23885_s_register, |
| 1466 | #endif |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1467 | }; |
| 1468 | |
Hans Verkuil | a399810 | 2008-07-21 02:57:38 -0300 | [diff] [blame] | 1469 | static struct video_device cx23885_mpeg_template = { |
| 1470 | .name = "cx23885", |
Hans Verkuil | a399810 | 2008-07-21 02:57:38 -0300 | [diff] [blame] | 1471 | .fops = &mpeg_fops, |
| 1472 | .ioctl_ops = &mpeg_ioctl_ops, |
Michael Krufky | 6655be0 | 2009-07-20 12:20:58 -0300 | [diff] [blame] | 1473 | .tvnorms = CX23885_NORMS, |
Hans Verkuil | a399810 | 2008-07-21 02:57:38 -0300 | [diff] [blame] | 1474 | }; |
| 1475 | |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1476 | void cx23885_417_unregister(struct cx23885_dev *dev) |
| 1477 | { |
| 1478 | dprintk(1, "%s()\n", __func__); |
| 1479 | |
| 1480 | if (dev->v4l_device) { |
Laurent Pinchart | f0813b4 | 2009-11-27 13:57:30 -0300 | [diff] [blame] | 1481 | if (video_is_registered(dev->v4l_device)) |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1482 | video_unregister_device(dev->v4l_device); |
| 1483 | else |
| 1484 | video_device_release(dev->v4l_device); |
Hans Verkuil | 5150392 | 2014-04-23 07:02:15 -0300 | [diff] [blame] | 1485 | v4l2_ctrl_handler_free(&dev->cxhdl.hdl); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1486 | dev->v4l_device = NULL; |
| 1487 | } |
| 1488 | } |
| 1489 | |
| 1490 | static struct video_device *cx23885_video_dev_alloc( |
| 1491 | struct cx23885_tsport *tsport, |
| 1492 | struct pci_dev *pci, |
| 1493 | struct video_device *template, |
| 1494 | char *type) |
| 1495 | { |
| 1496 | struct video_device *vfd; |
| 1497 | struct cx23885_dev *dev = tsport->dev; |
| 1498 | |
| 1499 | dprintk(1, "%s()\n", __func__); |
| 1500 | |
| 1501 | vfd = video_device_alloc(); |
| 1502 | if (NULL == vfd) |
| 1503 | return NULL; |
| 1504 | *vfd = *template; |
Steven Toth | 9def5ed | 2012-01-04 21:13:26 -0300 | [diff] [blame] | 1505 | snprintf(vfd->name, sizeof(vfd->name), "%s (%s)", |
| 1506 | cx23885_boards[tsport->dev->board].name, type); |
Hans Verkuil | 874d91d | 2013-06-10 07:27:37 -0300 | [diff] [blame] | 1507 | vfd->v4l2_dev = &dev->v4l2_dev; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1508 | vfd->release = video_device_release; |
| 1509 | return vfd; |
| 1510 | } |
| 1511 | |
| 1512 | int cx23885_417_register(struct cx23885_dev *dev) |
| 1513 | { |
| 1514 | /* FIXME: Port1 hardcoded here */ |
| 1515 | int err = -ENODEV; |
| 1516 | struct cx23885_tsport *tsport = &dev->ts1; |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1517 | struct vb2_queue *q; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1518 | |
| 1519 | dprintk(1, "%s()\n", __func__); |
| 1520 | |
| 1521 | if (cx23885_boards[dev->board].portb != CX23885_MPEG_ENCODER) |
| 1522 | return err; |
| 1523 | |
| 1524 | /* Set default TV standard */ |
| 1525 | dev->encodernorm = cx23885_tvnorms[0]; |
| 1526 | |
| 1527 | if (dev->encodernorm.id & V4L2_STD_525_60) |
| 1528 | tsport->height = 480; |
| 1529 | else |
| 1530 | tsport->height = 576; |
| 1531 | |
| 1532 | tsport->width = 720; |
Hans Verkuil | 5150392 | 2014-04-23 07:02:15 -0300 | [diff] [blame] | 1533 | dev->cxhdl.port = CX2341X_PORT_SERIAL; |
| 1534 | err = cx2341x_handler_init(&dev->cxhdl, 50); |
| 1535 | if (err) |
| 1536 | return err; |
| 1537 | dev->cxhdl.priv = dev; |
| 1538 | dev->cxhdl.func = cx23885_api_func; |
| 1539 | cx2341x_handler_set_50hz(&dev->cxhdl, tsport->height == 576); |
| 1540 | v4l2_ctrl_add_handler(&dev->ctrl_handler, &dev->cxhdl.hdl, NULL); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1541 | |
| 1542 | /* Allocate and initialize V4L video device */ |
| 1543 | dev->v4l_device = cx23885_video_dev_alloc(tsport, |
| 1544 | dev->pci, &cx23885_mpeg_template, "mpeg"); |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1545 | q = &dev->vb2_mpegq; |
| 1546 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 1547 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; |
| 1548 | q->gfp_flags = GFP_DMA32; |
| 1549 | q->min_buffers_needed = 2; |
| 1550 | q->drv_priv = dev; |
| 1551 | q->buf_struct_size = sizeof(struct cx23885_buffer); |
| 1552 | q->ops = &cx23885_qops; |
| 1553 | q->mem_ops = &vb2_dma_sg_memops; |
| 1554 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 1555 | q->lock = &dev->lock; |
| 1556 | |
| 1557 | err = vb2_queue_init(q); |
| 1558 | if (err < 0) |
| 1559 | return err; |
Laurent Pinchart | 63b0d5a | 2009-12-10 11:44:04 -0200 | [diff] [blame] | 1560 | video_set_drvdata(dev->v4l_device, dev); |
Hans Verkuil | 24a8f7b | 2014-08-09 11:29:55 -0300 | [diff] [blame] | 1561 | dev->v4l_device->lock = &dev->lock; |
Hans Verkuil | 453afdd | 2014-08-14 06:43:01 -0300 | [diff] [blame] | 1562 | dev->v4l_device->queue = q; |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1563 | err = video_register_device(dev->v4l_device, |
| 1564 | VFL_TYPE_GRABBER, -1); |
| 1565 | if (err < 0) { |
| 1566 | printk(KERN_INFO "%s: can't register mpeg device\n", dev->name); |
| 1567 | return err; |
| 1568 | } |
| 1569 | |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 1570 | printk(KERN_INFO "%s: registered device %s [mpeg]\n", |
| 1571 | dev->name, video_device_node_name(dev->v4l_device)); |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1572 | |
Steven Toth | 9c9c3d0 | 2012-01-04 10:56:14 -0300 | [diff] [blame] | 1573 | /* ST: Configure the encoder paramaters, but don't begin |
| 1574 | * encoding, this resolves an issue where the first time the |
| 1575 | * encoder is started video can be choppy. |
| 1576 | */ |
| 1577 | cx23885_initialize_codec(dev, 0); |
| 1578 | |
Steven Toth | b1b81f1 | 2008-01-13 23:42:44 -0300 | [diff] [blame] | 1579 | return 0; |
| 1580 | } |
Tim Gardner | 583087f | 2012-07-26 14:39:24 -0300 | [diff] [blame] | 1581 | |
| 1582 | MODULE_FIRMWARE(CX23885_FIRM_IMAGE_NAME); |