Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2006-2007 Intel Corporation |
| 3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Dave Airlie <airlied@linux.ie> |
| 27 | * Jesse Barnes <jesse.barnes@intel.com> |
| 28 | */ |
| 29 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 30 | #include <acpi/button.h> |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 31 | #include <linux/dmi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 32 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/slab.h> |
Lukas Wunner | 4eddaee | 2016-01-11 20:09:20 +0100 | [diff] [blame] | 34 | #include <linux/vga_switcheroo.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 35 | #include <drm/drmP.h> |
Matt Roper | c6f95f2 | 2015-01-22 16:50:32 -0800 | [diff] [blame] | 36 | #include <drm/drm_atomic_helper.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 37 | #include <drm/drm_crtc.h> |
| 38 | #include <drm/drm_edid.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 39 | #include "intel_drv.h" |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 40 | #include <drm/i915_drm.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | #include "i915_drv.h" |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 42 | #include <linux/acpi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 43 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 44 | /* Private structure for the integrated LVDS support */ |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 45 | struct intel_lvds_connector { |
| 46 | struct intel_connector base; |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 47 | |
| 48 | struct notifier_block lid_notifier; |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 49 | }; |
| 50 | |
Imre Deak | ed6143b8 | 2016-08-10 14:07:31 +0300 | [diff] [blame] | 51 | struct intel_lvds_pps { |
| 52 | /* 100us units */ |
| 53 | int t1_t2; |
| 54 | int t3; |
| 55 | int t4; |
| 56 | int t5; |
| 57 | int tx; |
| 58 | |
| 59 | int divider; |
| 60 | |
| 61 | int port; |
| 62 | bool powerdown_on_reset; |
| 63 | }; |
| 64 | |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 65 | struct intel_lvds_encoder { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 66 | struct intel_encoder base; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 67 | |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 68 | bool is_dual_link; |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 69 | i915_reg_t reg; |
Paulo Zanoni | 1f835a7 | 2014-07-04 13:38:36 -0300 | [diff] [blame] | 70 | u32 a3_power; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 71 | |
Imre Deak | ed6143b8 | 2016-08-10 14:07:31 +0300 | [diff] [blame] | 72 | struct intel_lvds_pps init_pps; |
| 73 | u32 init_lvds_val; |
| 74 | |
Jani Nikula | 62165e0 | 2012-10-19 14:51:47 +0300 | [diff] [blame] | 75 | struct intel_lvds_connector *attached_connector; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 76 | }; |
| 77 | |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 78 | static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder) |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 79 | { |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 80 | return container_of(encoder, struct intel_lvds_encoder, base.base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 81 | } |
| 82 | |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 83 | static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector) |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 84 | { |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 85 | return container_of(connector, struct intel_lvds_connector, base.base); |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 86 | } |
| 87 | |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 88 | static bool intel_lvds_get_hw_state(struct intel_encoder *encoder, |
| 89 | enum pipe *pipe) |
| 90 | { |
| 91 | struct drm_device *dev = encoder->base.dev; |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 92 | struct drm_i915_private *dev_priv = to_i915(dev); |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 93 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
| 94 | u32 tmp; |
Imre Deak | ecb2448 | 2016-02-12 18:55:21 +0200 | [diff] [blame] | 95 | bool ret; |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 96 | |
Ander Conselvan de Oliveira | 79f255a | 2017-02-22 08:34:27 +0200 | [diff] [blame] | 97 | if (!intel_display_power_get_if_enabled(dev_priv, |
| 98 | encoder->power_domain)) |
Paulo Zanoni | 34a6c70 | 2014-07-04 13:38:35 -0300 | [diff] [blame] | 99 | return false; |
| 100 | |
Imre Deak | ecb2448 | 2016-02-12 18:55:21 +0200 | [diff] [blame] | 101 | ret = false; |
| 102 | |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 103 | tmp = I915_READ(lvds_encoder->reg); |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 104 | |
| 105 | if (!(tmp & LVDS_PORT_EN)) |
Imre Deak | ecb2448 | 2016-02-12 18:55:21 +0200 | [diff] [blame] | 106 | goto out; |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 107 | |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 108 | if (HAS_PCH_CPT(dev_priv)) |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 109 | *pipe = PORT_TO_PIPE_CPT(tmp); |
| 110 | else |
| 111 | *pipe = PORT_TO_PIPE(tmp); |
| 112 | |
Imre Deak | ecb2448 | 2016-02-12 18:55:21 +0200 | [diff] [blame] | 113 | ret = true; |
| 114 | |
| 115 | out: |
Ander Conselvan de Oliveira | 79f255a | 2017-02-22 08:34:27 +0200 | [diff] [blame] | 116 | intel_display_power_put(dev_priv, encoder->power_domain); |
Imre Deak | ecb2448 | 2016-02-12 18:55:21 +0200 | [diff] [blame] | 117 | |
| 118 | return ret; |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 119 | } |
| 120 | |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 121 | static void intel_lvds_get_config(struct intel_encoder *encoder, |
Ander Conselvan de Oliveira | 5cec258 | 2015-01-15 14:55:21 +0200 | [diff] [blame] | 122 | struct intel_crtc_state *pipe_config) |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 123 | { |
Tvrtko Ursulin | 6647847 | 2016-11-16 08:55:40 +0000 | [diff] [blame] | 124 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
Ville Syrjälä | d0669d0 | 2015-09-18 20:03:45 +0300 | [diff] [blame] | 125 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
| 126 | u32 tmp, flags = 0; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 127 | |
Ville Syrjälä | d0669d0 | 2015-09-18 20:03:45 +0300 | [diff] [blame] | 128 | tmp = I915_READ(lvds_encoder->reg); |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 129 | if (tmp & LVDS_HSYNC_POLARITY) |
| 130 | flags |= DRM_MODE_FLAG_NHSYNC; |
| 131 | else |
| 132 | flags |= DRM_MODE_FLAG_PHSYNC; |
| 133 | if (tmp & LVDS_VSYNC_POLARITY) |
| 134 | flags |= DRM_MODE_FLAG_NVSYNC; |
| 135 | else |
| 136 | flags |= DRM_MODE_FLAG_PVSYNC; |
| 137 | |
Ander Conselvan de Oliveira | 2d112de | 2015-01-15 14:55:22 +0200 | [diff] [blame] | 138 | pipe_config->base.adjusted_mode.flags |= flags; |
Daniel Vetter | 0692282 | 2013-07-11 13:35:40 +0200 | [diff] [blame] | 139 | |
Tvrtko Ursulin | 6647847 | 2016-11-16 08:55:40 +0000 | [diff] [blame] | 140 | if (INTEL_GEN(dev_priv) < 5) |
Jani Nikula | a0cbe6a | 2016-04-29 15:34:02 +0300 | [diff] [blame] | 141 | pipe_config->gmch_pfit.lvds_border_bits = |
| 142 | tmp & LVDS_BORDER_ENABLE; |
| 143 | |
Daniel Vetter | 6b89cdd | 2014-07-09 22:35:53 +0200 | [diff] [blame] | 144 | /* gen2/3 store dither state in pfit control, needs to match */ |
Tvrtko Ursulin | 6647847 | 2016-11-16 08:55:40 +0000 | [diff] [blame] | 145 | if (INTEL_GEN(dev_priv) < 4) { |
Daniel Vetter | 6b89cdd | 2014-07-09 22:35:53 +0200 | [diff] [blame] | 146 | tmp = I915_READ(PFIT_CONTROL); |
| 147 | |
| 148 | pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; |
| 149 | } |
| 150 | |
Ville Syrjälä | e3b247d | 2016-02-17 21:41:09 +0200 | [diff] [blame] | 151 | pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 152 | } |
| 153 | |
Imre Deak | ed6143b8 | 2016-08-10 14:07:31 +0300 | [diff] [blame] | 154 | static void intel_lvds_pps_get_hw_state(struct drm_i915_private *dev_priv, |
| 155 | struct intel_lvds_pps *pps) |
| 156 | { |
| 157 | u32 val; |
| 158 | |
| 159 | pps->powerdown_on_reset = I915_READ(PP_CONTROL(0)) & PANEL_POWER_RESET; |
| 160 | |
| 161 | val = I915_READ(PP_ON_DELAYS(0)); |
| 162 | pps->port = (val & PANEL_PORT_SELECT_MASK) >> |
| 163 | PANEL_PORT_SELECT_SHIFT; |
| 164 | pps->t1_t2 = (val & PANEL_POWER_UP_DELAY_MASK) >> |
| 165 | PANEL_POWER_UP_DELAY_SHIFT; |
| 166 | pps->t5 = (val & PANEL_LIGHT_ON_DELAY_MASK) >> |
| 167 | PANEL_LIGHT_ON_DELAY_SHIFT; |
| 168 | |
| 169 | val = I915_READ(PP_OFF_DELAYS(0)); |
| 170 | pps->t3 = (val & PANEL_POWER_DOWN_DELAY_MASK) >> |
| 171 | PANEL_POWER_DOWN_DELAY_SHIFT; |
| 172 | pps->tx = (val & PANEL_LIGHT_OFF_DELAY_MASK) >> |
| 173 | PANEL_LIGHT_OFF_DELAY_SHIFT; |
| 174 | |
| 175 | val = I915_READ(PP_DIVISOR(0)); |
| 176 | pps->divider = (val & PP_REFERENCE_DIVIDER_MASK) >> |
| 177 | PP_REFERENCE_DIVIDER_SHIFT; |
| 178 | val = (val & PANEL_POWER_CYCLE_DELAY_MASK) >> |
| 179 | PANEL_POWER_CYCLE_DELAY_SHIFT; |
| 180 | /* |
| 181 | * Remove the BSpec specified +1 (100ms) offset that accounts for a |
| 182 | * too short power-cycle delay due to the asynchronous programming of |
| 183 | * the register. |
| 184 | */ |
| 185 | if (val) |
| 186 | val--; |
| 187 | /* Convert from 100ms to 100us units */ |
| 188 | pps->t4 = val * 1000; |
| 189 | |
| 190 | if (INTEL_INFO(dev_priv)->gen <= 4 && |
| 191 | pps->t1_t2 == 0 && pps->t5 == 0 && pps->t3 == 0 && pps->tx == 0) { |
| 192 | DRM_DEBUG_KMS("Panel power timings uninitialized, " |
| 193 | "setting defaults\n"); |
| 194 | /* Set T2 to 40ms and T5 to 200ms in 100 usec units */ |
| 195 | pps->t1_t2 = 40 * 10; |
| 196 | pps->t5 = 200 * 10; |
| 197 | /* Set T3 to 35ms and Tx to 200ms in 100 usec units */ |
| 198 | pps->t3 = 35 * 10; |
| 199 | pps->tx = 200 * 10; |
| 200 | } |
| 201 | |
| 202 | DRM_DEBUG_DRIVER("LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d " |
| 203 | "divider %d port %d powerdown_on_reset %d\n", |
| 204 | pps->t1_t2, pps->t3, pps->t4, pps->t5, pps->tx, |
| 205 | pps->divider, pps->port, pps->powerdown_on_reset); |
| 206 | } |
| 207 | |
| 208 | static void intel_lvds_pps_init_hw(struct drm_i915_private *dev_priv, |
| 209 | struct intel_lvds_pps *pps) |
| 210 | { |
| 211 | u32 val; |
| 212 | |
| 213 | val = I915_READ(PP_CONTROL(0)); |
| 214 | WARN_ON((val & PANEL_UNLOCK_MASK) != PANEL_UNLOCK_REGS); |
| 215 | if (pps->powerdown_on_reset) |
| 216 | val |= PANEL_POWER_RESET; |
| 217 | I915_WRITE(PP_CONTROL(0), val); |
| 218 | |
| 219 | I915_WRITE(PP_ON_DELAYS(0), (pps->port << PANEL_PORT_SELECT_SHIFT) | |
| 220 | (pps->t1_t2 << PANEL_POWER_UP_DELAY_SHIFT) | |
| 221 | (pps->t5 << PANEL_LIGHT_ON_DELAY_SHIFT)); |
| 222 | I915_WRITE(PP_OFF_DELAYS(0), (pps->t3 << PANEL_POWER_DOWN_DELAY_SHIFT) | |
| 223 | (pps->tx << PANEL_LIGHT_OFF_DELAY_SHIFT)); |
| 224 | |
| 225 | val = pps->divider << PP_REFERENCE_DIVIDER_SHIFT; |
| 226 | val |= (DIV_ROUND_UP(pps->t4, 1000) + 1) << |
| 227 | PANEL_POWER_CYCLE_DELAY_SHIFT; |
| 228 | I915_WRITE(PP_DIVISOR(0), val); |
| 229 | } |
| 230 | |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 231 | static void intel_pre_enable_lvds(struct intel_encoder *encoder, |
| 232 | struct intel_crtc_state *pipe_config, |
| 233 | struct drm_connector_state *conn_state) |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 234 | { |
| 235 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 236 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
| 237 | struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); |
| 238 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
Daniel Vetter | 55607e8 | 2013-06-16 21:42:39 +0200 | [diff] [blame] | 239 | int pipe = crtc->pipe; |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 240 | u32 temp; |
| 241 | |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 242 | if (HAS_PCH_SPLIT(dev_priv)) { |
Daniel Vetter | 55607e8 | 2013-06-16 21:42:39 +0200 | [diff] [blame] | 243 | assert_fdi_rx_pll_disabled(dev_priv, pipe); |
| 244 | assert_shared_dpll_disabled(dev_priv, |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 245 | pipe_config->shared_dpll); |
Daniel Vetter | 55607e8 | 2013-06-16 21:42:39 +0200 | [diff] [blame] | 246 | } else { |
| 247 | assert_pll_disabled(dev_priv, pipe); |
| 248 | } |
| 249 | |
Imre Deak | ed6143b8 | 2016-08-10 14:07:31 +0300 | [diff] [blame] | 250 | intel_lvds_pps_init_hw(dev_priv, &lvds_encoder->init_pps); |
| 251 | |
| 252 | temp = lvds_encoder->init_lvds_val; |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 253 | temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; |
Daniel Vetter | 62810e5 | 2012-11-26 17:22:13 +0100 | [diff] [blame] | 254 | |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 255 | if (HAS_PCH_CPT(dev_priv)) { |
Daniel Vetter | 62810e5 | 2012-11-26 17:22:13 +0100 | [diff] [blame] | 256 | temp &= ~PORT_TRANS_SEL_MASK; |
| 257 | temp |= PORT_TRANS_SEL_CPT(pipe); |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 258 | } else { |
Daniel Vetter | 62810e5 | 2012-11-26 17:22:13 +0100 | [diff] [blame] | 259 | if (pipe == 1) { |
| 260 | temp |= LVDS_PIPEB_SELECT; |
| 261 | } else { |
| 262 | temp &= ~LVDS_PIPEB_SELECT; |
| 263 | } |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 264 | } |
Daniel Vetter | 62810e5 | 2012-11-26 17:22:13 +0100 | [diff] [blame] | 265 | |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 266 | /* set the corresponsding LVDS_BORDER bit */ |
Daniel Vetter | 2fa2fe9 | 2013-05-07 23:34:16 +0200 | [diff] [blame] | 267 | temp &= ~LVDS_BORDER_ENABLE; |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 268 | temp |= pipe_config->gmch_pfit.lvds_border_bits; |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 269 | /* Set the B0-B3 data pairs corresponding to whether we're going to |
| 270 | * set the DPLLs for dual-channel mode or not. |
| 271 | */ |
| 272 | if (lvds_encoder->is_dual_link) |
| 273 | temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP; |
| 274 | else |
| 275 | temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP); |
| 276 | |
| 277 | /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP) |
| 278 | * appropriately here, but we need to look more thoroughly into how |
Paulo Zanoni | 1f835a7 | 2014-07-04 13:38:36 -0300 | [diff] [blame] | 279 | * panels behave in the two modes. For now, let's just maintain the |
| 280 | * value we got from the BIOS. |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 281 | */ |
Chris Wilson | f1fda74 | 2016-07-02 15:36:05 +0100 | [diff] [blame] | 282 | temp &= ~LVDS_A3_POWER_MASK; |
| 283 | temp |= lvds_encoder->a3_power; |
Daniel Vetter | 62810e5 | 2012-11-26 17:22:13 +0100 | [diff] [blame] | 284 | |
| 285 | /* Set the dithering flag on LVDS as needed, note that there is no |
| 286 | * special lvds dither control bit on pch-split platforms, dithering is |
| 287 | * only controlled through the PIPECONF reg. */ |
Tvrtko Ursulin | 7e22dbb | 2016-05-10 10:57:06 +0100 | [diff] [blame] | 288 | if (IS_GEN4(dev_priv)) { |
Daniel Vetter | d8b3224 | 2013-04-25 17:54:44 +0200 | [diff] [blame] | 289 | /* Bspec wording suggests that LVDS port dithering only exists |
| 290 | * for 18bpp panels. */ |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 291 | if (pipe_config->dither && pipe_config->pipe_bpp == 18) |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 292 | temp |= LVDS_ENABLE_DITHER; |
| 293 | else |
| 294 | temp &= ~LVDS_ENABLE_DITHER; |
| 295 | } |
| 296 | temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY); |
Ville Syrjälä | 4c6df4b | 2013-09-02 21:13:39 +0300 | [diff] [blame] | 297 | if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 298 | temp |= LVDS_HSYNC_POLARITY; |
Ville Syrjälä | 4c6df4b | 2013-09-02 21:13:39 +0300 | [diff] [blame] | 299 | if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) |
Daniel Vetter | fc68309 | 2012-11-26 17:22:12 +0100 | [diff] [blame] | 300 | temp |= LVDS_VSYNC_POLARITY; |
| 301 | |
| 302 | I915_WRITE(lvds_encoder->reg, temp); |
| 303 | } |
| 304 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 305 | /** |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 306 | * Sets the power state for the panel. |
| 307 | */ |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 308 | static void intel_enable_lvds(struct intel_encoder *encoder, |
| 309 | struct intel_crtc_state *pipe_config, |
| 310 | struct drm_connector_state *conn_state) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 311 | { |
Daniel Vetter | c22834e | 2012-06-30 15:31:28 +0200 | [diff] [blame] | 312 | struct drm_device *dev = encoder->base.dev; |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 313 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 314 | struct drm_i915_private *dev_priv = to_i915(dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 315 | |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 316 | I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN); |
Chris Wilson | e9e331a | 2010-09-13 01:16:10 +0100 | [diff] [blame] | 317 | |
Imre Deak | 5a162e2 | 2016-08-10 14:07:30 +0300 | [diff] [blame] | 318 | I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) | PANEL_POWER_ON); |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 319 | POSTING_READ(lvds_encoder->reg); |
Imre Deak | 44cb734 | 2016-08-10 14:07:29 +0300 | [diff] [blame] | 320 | if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, PP_ON, 1000)) |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 321 | DRM_ERROR("timed out waiting for panel to power on\n"); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 322 | |
Maarten Lankhorst | b037d58 | 2017-06-12 12:21:13 +0200 | [diff] [blame] | 323 | intel_panel_enable_backlight(pipe_config, conn_state); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 324 | } |
| 325 | |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 326 | static void intel_disable_lvds(struct intel_encoder *encoder, |
| 327 | struct intel_crtc_state *old_crtc_state, |
| 328 | struct drm_connector_state *old_conn_state) |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 329 | { |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 330 | struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); |
Maarten Lankhorst | d468e21 | 2016-08-09 17:04:11 +0200 | [diff] [blame] | 331 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 332 | |
Imre Deak | 5a162e2 | 2016-08-10 14:07:30 +0300 | [diff] [blame] | 333 | I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) & ~PANEL_POWER_ON); |
Imre Deak | 44cb734 | 2016-08-10 14:07:29 +0300 | [diff] [blame] | 334 | if (intel_wait_for_register(dev_priv, PP_STATUS(0), PP_ON, 0, 1000)) |
Keith Packard | de842ef | 2011-08-06 10:30:45 -0700 | [diff] [blame] | 335 | DRM_ERROR("timed out waiting for panel to power off\n"); |
Chris Wilson | 2a1292f | 2010-12-05 19:21:18 +0000 | [diff] [blame] | 336 | |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 337 | I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN); |
| 338 | POSTING_READ(lvds_encoder->reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 339 | } |
| 340 | |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 341 | static void gmch_disable_lvds(struct intel_encoder *encoder, |
| 342 | struct intel_crtc_state *old_crtc_state, |
| 343 | struct drm_connector_state *old_conn_state) |
| 344 | |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 345 | { |
Maarten Lankhorst | b037d58 | 2017-06-12 12:21:13 +0200 | [diff] [blame] | 346 | intel_panel_disable_backlight(old_conn_state); |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 347 | |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 348 | intel_disable_lvds(encoder, old_crtc_state, old_conn_state); |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 349 | } |
| 350 | |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 351 | static void pch_disable_lvds(struct intel_encoder *encoder, |
| 352 | struct intel_crtc_state *old_crtc_state, |
| 353 | struct drm_connector_state *old_conn_state) |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 354 | { |
Maarten Lankhorst | b037d58 | 2017-06-12 12:21:13 +0200 | [diff] [blame] | 355 | intel_panel_disable_backlight(old_conn_state); |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 356 | } |
| 357 | |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 358 | static void pch_post_disable_lvds(struct intel_encoder *encoder, |
| 359 | struct intel_crtc_state *old_crtc_state, |
| 360 | struct drm_connector_state *old_conn_state) |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 361 | { |
Maarten Lankhorst | fd6bbda | 2016-08-09 17:04:04 +0200 | [diff] [blame] | 362 | intel_disable_lvds(encoder, old_crtc_state, old_conn_state); |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 363 | } |
| 364 | |
Damien Lespiau | c19de8e | 2013-11-28 15:29:18 +0000 | [diff] [blame] | 365 | static enum drm_mode_status |
| 366 | intel_lvds_mode_valid(struct drm_connector *connector, |
| 367 | struct drm_display_mode *mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 368 | { |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 369 | struct intel_connector *intel_connector = to_intel_connector(connector); |
| 370 | struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; |
Mika Kahola | 7f7b58c | 2015-08-18 14:37:00 +0300 | [diff] [blame] | 371 | int max_pixclk = to_i915(connector->dev)->max_dotclk_freq; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 372 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 373 | if (mode->hdisplay > fixed_mode->hdisplay) |
| 374 | return MODE_PANEL; |
| 375 | if (mode->vdisplay > fixed_mode->vdisplay) |
| 376 | return MODE_PANEL; |
Mika Kahola | 7f7b58c | 2015-08-18 14:37:00 +0300 | [diff] [blame] | 377 | if (fixed_mode->clock > max_pixclk) |
| 378 | return MODE_CLOCK_HIGH; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 379 | |
| 380 | return MODE_OK; |
| 381 | } |
| 382 | |
Daniel Vetter | 7ae8923 | 2013-03-27 00:44:52 +0100 | [diff] [blame] | 383 | static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder, |
Maarten Lankhorst | 0a478c2 | 2016-08-09 17:04:05 +0200 | [diff] [blame] | 384 | struct intel_crtc_state *pipe_config, |
| 385 | struct drm_connector_state *conn_state) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 386 | { |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 387 | struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev); |
Daniel Vetter | 7ae8923 | 2013-03-27 00:44:52 +0100 | [diff] [blame] | 388 | struct intel_lvds_encoder *lvds_encoder = |
| 389 | to_lvds_encoder(&intel_encoder->base); |
Jani Nikula | 4d89152 | 2012-10-26 12:03:59 +0300 | [diff] [blame] | 390 | struct intel_connector *intel_connector = |
| 391 | &lvds_encoder->attached_connector->base; |
Ander Conselvan de Oliveira | 2d112de | 2015-01-15 14:55:22 +0200 | [diff] [blame] | 392 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
Ander Conselvan de Oliveira | d21bd67 | 2015-03-20 16:18:14 +0200 | [diff] [blame] | 393 | struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); |
Daniel Vetter | 4e53c2e | 2013-03-27 00:44:58 +0100 | [diff] [blame] | 394 | unsigned int lvds_bpp; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 395 | |
| 396 | /* Should never happen!! */ |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 397 | if (INTEL_GEN(dev_priv) < 4 && intel_crtc->pipe == 0) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 398 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 399 | return false; |
| 400 | } |
| 401 | |
Paulo Zanoni | 1f835a7 | 2014-07-04 13:38:36 -0300 | [diff] [blame] | 402 | if (lvds_encoder->a3_power == LVDS_A3_POWER_UP) |
Daniel Vetter | 4e53c2e | 2013-03-27 00:44:58 +0100 | [diff] [blame] | 403 | lvds_bpp = 8*3; |
| 404 | else |
| 405 | lvds_bpp = 6*3; |
| 406 | |
Daniel Vetter | e29c22c | 2013-02-21 00:00:16 +0100 | [diff] [blame] | 407 | if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) { |
Daniel Vetter | 4e53c2e | 2013-03-27 00:44:58 +0100 | [diff] [blame] | 408 | DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n", |
| 409 | pipe_config->pipe_bpp, lvds_bpp); |
| 410 | pipe_config->pipe_bpp = lvds_bpp; |
| 411 | } |
Daniel Vetter | d8b3224 | 2013-04-25 17:54:44 +0200 | [diff] [blame] | 412 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 413 | /* |
Chris Wilson | 7167704 | 2010-07-17 13:38:43 +0100 | [diff] [blame] | 414 | * We have timings from the BIOS for the panel, put them in |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 415 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 416 | * with the panel scaling set up to source from the H/VDisplay |
| 417 | * of the original mode. |
| 418 | */ |
Jani Nikula | 4d89152 | 2012-10-26 12:03:59 +0300 | [diff] [blame] | 419 | intel_fixed_panel_mode(intel_connector->panel.fixed_mode, |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 420 | adjusted_mode); |
Chris Wilson | 1d8e1c7 | 2010-08-07 11:01:28 +0100 | [diff] [blame] | 421 | |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 422 | if (HAS_PCH_SPLIT(dev_priv)) { |
Daniel Vetter | 5bfe2ac | 2013-03-27 00:44:55 +0100 | [diff] [blame] | 423 | pipe_config->has_pch_encoder = true; |
| 424 | |
Jesse Barnes | b074cec | 2013-04-25 12:55:02 -0700 | [diff] [blame] | 425 | intel_pch_panel_fitting(intel_crtc, pipe_config, |
Maarten Lankhorst | eead06d | 2017-05-01 15:37:55 +0200 | [diff] [blame] | 426 | conn_state->scaling_mode); |
Jesse Barnes | 2dd2455 | 2013-04-25 12:55:01 -0700 | [diff] [blame] | 427 | } else { |
| 428 | intel_gmch_panel_fitting(intel_crtc, pipe_config, |
Maarten Lankhorst | eead06d | 2017-05-01 15:37:55 +0200 | [diff] [blame] | 429 | conn_state->scaling_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 430 | |
Daniel Vetter | 21d8a47 | 2013-07-12 08:07:30 +0200 | [diff] [blame] | 431 | } |
Daniel Vetter | f9bef08 | 2012-04-15 19:53:19 +0200 | [diff] [blame] | 432 | |
Zhao Yakui | a3e17eb | 2009-10-10 10:42:37 +0800 | [diff] [blame] | 433 | /* |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 434 | * XXX: It would be nice to support lower refresh rates on the |
| 435 | * panels to reduce power consumption, and perhaps match the |
| 436 | * user's requested refresh rate. |
| 437 | */ |
| 438 | |
| 439 | return true; |
| 440 | } |
| 441 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 442 | /** |
| 443 | * Detect the LVDS connection. |
| 444 | * |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 445 | * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means |
| 446 | * connected and closed means disconnected. We also send hotplug events as |
| 447 | * needed, using lid status notification from the input layer. |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 448 | */ |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 449 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 450 | intel_lvds_detect(struct drm_connector *connector, bool force) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 451 | { |
Mika Kahola | 1650be7 | 2016-12-13 10:02:47 +0200 | [diff] [blame] | 452 | struct drm_i915_private *dev_priv = to_i915(connector->dev); |
Chris Wilson | 6ee3b5a | 2011-03-24 13:26:43 +0000 | [diff] [blame] | 453 | enum drm_connector_status status; |
Jesse Barnes | b42d4c5 | 2009-09-10 15:28:04 -0700 | [diff] [blame] | 454 | |
Chris Wilson | 164c859 | 2013-07-20 20:27:08 +0100 | [diff] [blame] | 455 | DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", |
Jani Nikula | c23cc41 | 2014-06-03 14:56:17 +0300 | [diff] [blame] | 456 | connector->base.id, connector->name); |
Chris Wilson | 164c859 | 2013-07-20 20:27:08 +0100 | [diff] [blame] | 457 | |
Mika Kahola | 1650be7 | 2016-12-13 10:02:47 +0200 | [diff] [blame] | 458 | status = intel_panel_detect(dev_priv); |
Chris Wilson | fe16d94 | 2011-02-12 10:29:38 +0000 | [diff] [blame] | 459 | if (status != connector_status_unknown) |
| 460 | return status; |
Chris Wilson | 01fe9db | 2011-01-16 19:37:30 +0000 | [diff] [blame] | 461 | |
Chris Wilson | 6ee3b5a | 2011-03-24 13:26:43 +0000 | [diff] [blame] | 462 | return connector_status_connected; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 463 | } |
| 464 | |
| 465 | /** |
| 466 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
| 467 | */ |
| 468 | static int intel_lvds_get_modes(struct drm_connector *connector) |
| 469 | { |
Jani Nikula | 62165e0 | 2012-10-19 14:51:47 +0300 | [diff] [blame] | 470 | struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 471 | struct drm_device *dev = connector->dev; |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 472 | struct drm_display_mode *mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 473 | |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 474 | /* use cached edid if we have one */ |
Chris Wilson | 2aa4f09 | 2012-11-21 16:14:04 +0000 | [diff] [blame] | 475 | if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 476 | return drm_add_edid_modes(connector, lvds_connector->base.edid); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 477 | |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 478 | mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode); |
Chris Wilson | 311bd68 | 2011-01-13 19:06:50 +0000 | [diff] [blame] | 479 | if (mode == NULL) |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 480 | return 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 481 | |
Chris Wilson | 788319d | 2010-09-12 17:34:41 +0100 | [diff] [blame] | 482 | drm_mode_probed_add(connector, mode); |
| 483 | return 1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 484 | } |
| 485 | |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 486 | static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id) |
| 487 | { |
Daniel Vetter | bc0daf4 | 2012-04-01 13:16:49 +0200 | [diff] [blame] | 488 | DRM_INFO("Skipping forced modeset for %s\n", id->ident); |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 489 | return 1; |
| 490 | } |
| 491 | |
| 492 | /* The GPU hangs up on these systems if modeset is performed on LID open */ |
| 493 | static const struct dmi_system_id intel_no_modeset_on_lid[] = { |
| 494 | { |
| 495 | .callback = intel_no_modeset_on_lid_dmi_callback, |
| 496 | .ident = "Toshiba Tecra A11", |
| 497 | .matches = { |
| 498 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), |
| 499 | DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"), |
| 500 | }, |
| 501 | }, |
| 502 | |
| 503 | { } /* terminating entry */ |
| 504 | }; |
| 505 | |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 506 | /* |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 507 | * Lid events. Note the use of 'modeset': |
| 508 | * - we set it to MODESET_ON_LID_OPEN on lid close, |
| 509 | * and set it to MODESET_DONE on open |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 510 | * - we use it as a "only once" bit (ie we ignore |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 511 | * duplicate events where it was already properly set) |
| 512 | * - the suspend/resume paths will set it to |
| 513 | * MODESET_SUSPENDED and ignore the lid open event, |
| 514 | * because they restore the mode ("lid open"). |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 515 | */ |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 516 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
| 517 | void *unused) |
| 518 | { |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 519 | struct intel_lvds_connector *lvds_connector = |
| 520 | container_of(nb, struct intel_lvds_connector, lid_notifier); |
| 521 | struct drm_connector *connector = &lvds_connector->base.base; |
| 522 | struct drm_device *dev = connector->dev; |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 523 | struct drm_i915_private *dev_priv = to_i915(dev); |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 524 | |
Alex Williamson | 2fb4e61 | 2011-04-21 16:08:14 -0600 | [diff] [blame] | 525 | if (dev->switch_power_state != DRM_SWITCH_POWER_ON) |
| 526 | return NOTIFY_OK; |
| 527 | |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 528 | mutex_lock(&dev_priv->modeset_restore_lock); |
| 529 | if (dev_priv->modeset_restore == MODESET_SUSPENDED) |
| 530 | goto exit; |
Zhao Yakui | a256537 | 2009-12-11 09:26:11 +0800 | [diff] [blame] | 531 | /* |
| 532 | * check and update the status of LVDS connector after receiving |
| 533 | * the LID nofication event. |
| 534 | */ |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 535 | connector->status = connector->funcs->detect(connector, false); |
Chris Wilson | 7b334fc | 2010-09-09 23:51:02 +0100 | [diff] [blame] | 536 | |
Thomas Bächler | 0544edf | 2010-07-02 10:44:23 +0200 | [diff] [blame] | 537 | /* Don't force modeset on machines where it causes a GPU lockup */ |
| 538 | if (dmi_check_system(intel_no_modeset_on_lid)) |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 539 | goto exit; |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 540 | if (!acpi_lid_open()) { |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 541 | /* do modeset on next lid open event */ |
| 542 | dev_priv->modeset_restore = MODESET_ON_LID_OPEN; |
| 543 | goto exit; |
Jesse Barnes | 06891e2 | 2009-09-14 10:58:48 -0700 | [diff] [blame] | 544 | } |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 545 | |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 546 | if (dev_priv->modeset_restore == MODESET_DONE) |
| 547 | goto exit; |
Linus Torvalds | c9354c8 | 2009-11-02 09:29:55 -0800 | [diff] [blame] | 548 | |
Daniel Vetter | 5be19d9 | 2013-10-09 10:47:12 +0200 | [diff] [blame] | 549 | /* |
| 550 | * Some old platform's BIOS love to wreak havoc while the lid is closed. |
| 551 | * We try to detect this here and undo any damage. The split for PCH |
| 552 | * platforms is rather conservative and a bit arbitrary expect that on |
| 553 | * those platforms VGA disabling requires actual legacy VGA I/O access, |
| 554 | * and as part of the cleanup in the hw state restore we also redisable |
| 555 | * the vga plane. |
| 556 | */ |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 557 | if (!HAS_PCH_SPLIT(dev_priv)) |
Maarten Lankhorst | 043e9bd | 2015-07-13 16:30:25 +0200 | [diff] [blame] | 558 | intel_display_resume(dev); |
Jesse Barnes | 0632419 | 2009-09-10 15:28:05 -0700 | [diff] [blame] | 559 | |
Zhang Rui | b8efb17 | 2013-02-05 15:41:53 +0800 | [diff] [blame] | 560 | dev_priv->modeset_restore = MODESET_DONE; |
| 561 | |
| 562 | exit: |
| 563 | mutex_unlock(&dev_priv->modeset_restore_lock); |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 564 | return NOTIFY_OK; |
| 565 | } |
| 566 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 567 | /** |
| 568 | * intel_lvds_destroy - unregister and free LVDS structures |
| 569 | * @connector: connector to free |
| 570 | * |
| 571 | * Unregister the DDC bus for this connector then free the driver private |
| 572 | * structure. |
| 573 | */ |
| 574 | static void intel_lvds_destroy(struct drm_connector *connector) |
| 575 | { |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 576 | struct intel_lvds_connector *lvds_connector = |
| 577 | to_lvds_connector(connector); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 578 | |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 579 | if (lvds_connector->lid_notifier.notifier_call) |
| 580 | acpi_lid_notifier_unregister(&lvds_connector->lid_notifier); |
Matthew Garrett | aaa6fd2 | 2011-08-12 12:11:33 +0200 | [diff] [blame] | 581 | |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 582 | if (!IS_ERR_OR_NULL(lvds_connector->base.edid)) |
| 583 | kfree(lvds_connector->base.edid); |
| 584 | |
Jani Nikula | 1d50870 | 2012-10-19 14:51:49 +0300 | [diff] [blame] | 585 | intel_panel_fini(&lvds_connector->base.panel); |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 586 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 587 | drm_connector_cleanup(connector); |
| 588 | kfree(connector); |
| 589 | } |
| 590 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 591 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
| 592 | .get_modes = intel_lvds_get_modes, |
| 593 | .mode_valid = intel_lvds_mode_valid, |
Maarten Lankhorst | ca93758 | 2017-05-01 15:37:59 +0200 | [diff] [blame] | 594 | .atomic_check = intel_digital_connector_atomic_check, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 595 | }; |
| 596 | |
| 597 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 598 | .detect = intel_lvds_detect, |
| 599 | .fill_modes = drm_helper_probe_single_connector_modes, |
Maarten Lankhorst | ca93758 | 2017-05-01 15:37:59 +0200 | [diff] [blame] | 600 | .atomic_get_property = intel_digital_connector_atomic_get_property, |
| 601 | .atomic_set_property = intel_digital_connector_atomic_set_property, |
Chris Wilson | 1ebaa0b | 2016-06-24 14:00:15 +0100 | [diff] [blame] | 602 | .late_register = intel_connector_register, |
Chris Wilson | c191eca | 2016-06-17 11:40:33 +0100 | [diff] [blame] | 603 | .early_unregister = intel_connector_unregister, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 604 | .destroy = intel_lvds_destroy, |
Matt Roper | c6f95f2 | 2015-01-22 16:50:32 -0800 | [diff] [blame] | 605 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
Maarten Lankhorst | ca93758 | 2017-05-01 15:37:59 +0200 | [diff] [blame] | 606 | .atomic_duplicate_state = intel_digital_connector_duplicate_state, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 607 | }; |
| 608 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 609 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 610 | .destroy = intel_encoder_destroy, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 611 | }; |
| 612 | |
Mathias Krause | bbe1c27 | 2014-08-27 18:41:19 +0200 | [diff] [blame] | 613 | static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 614 | { |
Daniel Vetter | bc0daf4 | 2012-04-01 13:16:49 +0200 | [diff] [blame] | 615 | DRM_INFO("Skipping LVDS initialization for %s\n", id->ident); |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 616 | return 1; |
| 617 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 618 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 619 | /* These systems claim to have LVDS, but really don't */ |
Jaswinder Singh Rajput | 93c05f2 | 2009-06-04 09:41:19 +1000 | [diff] [blame] | 620 | static const struct dmi_system_id intel_no_lvds[] = { |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 621 | { |
| 622 | .callback = intel_no_lvds_dmi_callback, |
| 623 | .ident = "Apple Mac Mini (Core series)", |
| 624 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 625 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 626 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
| 627 | }, |
| 628 | }, |
| 629 | { |
| 630 | .callback = intel_no_lvds_dmi_callback, |
| 631 | .ident = "Apple Mac Mini (Core 2 series)", |
| 632 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 633 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 634 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
| 635 | }, |
| 636 | }, |
| 637 | { |
| 638 | .callback = intel_no_lvds_dmi_callback, |
| 639 | .ident = "MSI IM-945GSE-A", |
| 640 | .matches = { |
| 641 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
| 642 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
| 643 | }, |
| 644 | }, |
| 645 | { |
| 646 | .callback = intel_no_lvds_dmi_callback, |
| 647 | .ident = "Dell Studio Hybrid", |
| 648 | .matches = { |
| 649 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 650 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
| 651 | }, |
| 652 | }, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 653 | { |
| 654 | .callback = intel_no_lvds_dmi_callback, |
Pieterjan Camerlynck | b066254 | 2011-07-26 16:23:54 +0200 | [diff] [blame] | 655 | .ident = "Dell OptiPlex FX170", |
| 656 | .matches = { |
| 657 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 658 | DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"), |
| 659 | }, |
| 660 | }, |
| 661 | { |
| 662 | .callback = intel_no_lvds_dmi_callback, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 663 | .ident = "AOpen Mini PC", |
| 664 | .matches = { |
| 665 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
| 666 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
| 667 | }, |
| 668 | }, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 669 | { |
| 670 | .callback = intel_no_lvds_dmi_callback, |
Tormod Volden | ed8c754 | 2009-07-13 22:26:48 +0200 | [diff] [blame] | 671 | .ident = "AOpen Mini PC MP915", |
| 672 | .matches = { |
| 673 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 674 | DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), |
| 675 | }, |
| 676 | }, |
| 677 | { |
| 678 | .callback = intel_no_lvds_dmi_callback, |
Knut Petersen | 22ab70d | 2011-01-14 15:38:10 +0000 | [diff] [blame] | 679 | .ident = "AOpen i915GMm-HFS", |
| 680 | .matches = { |
| 681 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 682 | DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"), |
| 683 | }, |
| 684 | }, |
| 685 | { |
| 686 | .callback = intel_no_lvds_dmi_callback, |
Daniel Vetter | e57b688 | 2012-02-08 16:42:52 +0100 | [diff] [blame] | 687 | .ident = "AOpen i45GMx-I", |
| 688 | .matches = { |
| 689 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 690 | DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"), |
| 691 | }, |
| 692 | }, |
| 693 | { |
| 694 | .callback = intel_no_lvds_dmi_callback, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 695 | .ident = "Aopen i945GTt-VFA", |
| 696 | .matches = { |
| 697 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
| 698 | }, |
| 699 | }, |
Stefan Bader | 9875557ee8 | 2010-03-29 17:53:12 +0200 | [diff] [blame] | 700 | { |
| 701 | .callback = intel_no_lvds_dmi_callback, |
| 702 | .ident = "Clientron U800", |
| 703 | .matches = { |
| 704 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
| 705 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
| 706 | }, |
| 707 | }, |
Hans de Goede | 6a574b5 | 2011-06-04 15:39:21 +0200 | [diff] [blame] | 708 | { |
Joel Sass | 44306ab | 2012-01-10 13:03:55 -0500 | [diff] [blame] | 709 | .callback = intel_no_lvds_dmi_callback, |
| 710 | .ident = "Clientron E830", |
| 711 | .matches = { |
| 712 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), |
| 713 | DMI_MATCH(DMI_PRODUCT_NAME, "E830"), |
| 714 | }, |
| 715 | }, |
| 716 | { |
Hans de Goede | 6a574b5 | 2011-06-04 15:39:21 +0200 | [diff] [blame] | 717 | .callback = intel_no_lvds_dmi_callback, |
| 718 | .ident = "Asus EeeBox PC EB1007", |
| 719 | .matches = { |
| 720 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), |
| 721 | DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), |
| 722 | }, |
| 723 | }, |
Adam Jackson | 0999bbe | 2011-11-28 12:22:56 -0500 | [diff] [blame] | 724 | { |
| 725 | .callback = intel_no_lvds_dmi_callback, |
| 726 | .ident = "Asus AT5NM10T-I", |
| 727 | .matches = { |
| 728 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), |
| 729 | DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"), |
| 730 | }, |
| 731 | }, |
Marc Gariepy | f5b8a7e | 2012-02-09 09:35:21 -0500 | [diff] [blame] | 732 | { |
| 733 | .callback = intel_no_lvds_dmi_callback, |
Ben Mesman | 45a211d | 2013-04-16 20:00:28 +0200 | [diff] [blame] | 734 | .ident = "Hewlett-Packard HP t5740", |
Jan-Benedict Glaw | 3347111 | 2012-05-22 15:21:53 +0200 | [diff] [blame] | 735 | .matches = { |
| 736 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
Ben Mesman | 45a211d | 2013-04-16 20:00:28 +0200 | [diff] [blame] | 737 | DMI_MATCH(DMI_PRODUCT_NAME, " t5740"), |
Jan-Benedict Glaw | 3347111 | 2012-05-22 15:21:53 +0200 | [diff] [blame] | 738 | }, |
| 739 | }, |
| 740 | { |
| 741 | .callback = intel_no_lvds_dmi_callback, |
Marc Gariepy | f5b8a7e | 2012-02-09 09:35:21 -0500 | [diff] [blame] | 742 | .ident = "Hewlett-Packard t5745", |
| 743 | .matches = { |
| 744 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
Marc Gariepy | 6200497 | 2012-05-01 13:37:57 -0400 | [diff] [blame] | 745 | DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"), |
Marc Gariepy | f5b8a7e | 2012-02-09 09:35:21 -0500 | [diff] [blame] | 746 | }, |
| 747 | }, |
| 748 | { |
| 749 | .callback = intel_no_lvds_dmi_callback, |
| 750 | .ident = "Hewlett-Packard st5747", |
| 751 | .matches = { |
| 752 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), |
Marc Gariepy | 6200497 | 2012-05-01 13:37:57 -0400 | [diff] [blame] | 753 | DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"), |
Marc Gariepy | f5b8a7e | 2012-02-09 09:35:21 -0500 | [diff] [blame] | 754 | }, |
| 755 | }, |
Anisse Astier | 97effad | 2012-03-07 18:36:35 +0100 | [diff] [blame] | 756 | { |
| 757 | .callback = intel_no_lvds_dmi_callback, |
| 758 | .ident = "MSI Wind Box DC500", |
| 759 | .matches = { |
| 760 | DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), |
| 761 | DMI_MATCH(DMI_BOARD_NAME, "MS-7469"), |
| 762 | }, |
| 763 | }, |
Sjoerd Simons | 9756fe3 | 2012-06-22 09:43:07 +0200 | [diff] [blame] | 764 | { |
| 765 | .callback = intel_no_lvds_dmi_callback, |
Calvin Walton | a51d4ed | 2012-08-24 07:56:31 -0400 | [diff] [blame] | 766 | .ident = "Gigabyte GA-D525TUD", |
| 767 | .matches = { |
| 768 | DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."), |
| 769 | DMI_MATCH(DMI_BOARD_NAME, "D525TUD"), |
| 770 | }, |
| 771 | }, |
Chris Wilson | c31407a | 2012-10-18 21:07:01 +0100 | [diff] [blame] | 772 | { |
| 773 | .callback = intel_no_lvds_dmi_callback, |
| 774 | .ident = "Supermicro X7SPA-H", |
| 775 | .matches = { |
| 776 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), |
| 777 | DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"), |
| 778 | }, |
| 779 | }, |
Christian Lamparter | 9e9dd0e | 2013-04-03 14:34:11 +0200 | [diff] [blame] | 780 | { |
| 781 | .callback = intel_no_lvds_dmi_callback, |
| 782 | .ident = "Fujitsu Esprimo Q900", |
| 783 | .matches = { |
| 784 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"), |
| 785 | DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"), |
| 786 | }, |
| 787 | }, |
Chris Wilson | e5614f0 | 2013-07-03 15:05:03 -0700 | [diff] [blame] | 788 | { |
| 789 | .callback = intel_no_lvds_dmi_callback, |
Rob Pearce | 645378d | 2013-10-27 16:13:42 +0000 | [diff] [blame] | 790 | .ident = "Intel D410PT", |
| 791 | .matches = { |
| 792 | DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), |
| 793 | DMI_MATCH(DMI_BOARD_NAME, "D410PT"), |
| 794 | }, |
| 795 | }, |
| 796 | { |
| 797 | .callback = intel_no_lvds_dmi_callback, |
| 798 | .ident = "Intel D425KT", |
| 799 | .matches = { |
| 800 | DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), |
| 801 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"), |
| 802 | }, |
| 803 | }, |
| 804 | { |
| 805 | .callback = intel_no_lvds_dmi_callback, |
Chris Wilson | e5614f0 | 2013-07-03 15:05:03 -0700 | [diff] [blame] | 806 | .ident = "Intel D510MO", |
| 807 | .matches = { |
| 808 | DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), |
| 809 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"), |
| 810 | }, |
| 811 | }, |
Jani Nikula | dcf6d29 | 2013-07-03 15:05:05 -0700 | [diff] [blame] | 812 | { |
| 813 | .callback = intel_no_lvds_dmi_callback, |
| 814 | .ident = "Intel D525MW", |
| 815 | .matches = { |
| 816 | DMI_MATCH(DMI_BOARD_VENDOR, "Intel"), |
| 817 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"), |
| 818 | }, |
| 819 | }, |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 820 | |
| 821 | { } /* terminating entry */ |
| 822 | }; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 823 | |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 824 | static int intel_dual_link_lvds_callback(const struct dmi_system_id *id) |
| 825 | { |
| 826 | DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident); |
| 827 | return 1; |
| 828 | } |
| 829 | |
| 830 | static const struct dmi_system_id intel_dual_link_lvds[] = { |
| 831 | { |
| 832 | .callback = intel_dual_link_lvds_callback, |
Lukas Wunner | 3916e3f | 2015-05-04 15:06:49 +0200 | [diff] [blame] | 833 | .ident = "Apple MacBook Pro 15\" (2010)", |
| 834 | .matches = { |
| 835 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), |
| 836 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"), |
| 837 | }, |
| 838 | }, |
| 839 | { |
| 840 | .callback = intel_dual_link_lvds_callback, |
| 841 | .ident = "Apple MacBook Pro 15\" (2011)", |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 842 | .matches = { |
| 843 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), |
| 844 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"), |
| 845 | }, |
| 846 | }, |
Lukas Wunner | 3916e3f | 2015-05-04 15:06:49 +0200 | [diff] [blame] | 847 | { |
| 848 | .callback = intel_dual_link_lvds_callback, |
| 849 | .ident = "Apple MacBook Pro 15\" (2012)", |
| 850 | .matches = { |
| 851 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), |
| 852 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"), |
| 853 | }, |
| 854 | }, |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 855 | { } /* terminating entry */ |
| 856 | }; |
| 857 | |
Imre Deak | 97a824e1 | 2016-06-21 11:51:47 +0300 | [diff] [blame] | 858 | struct intel_encoder *intel_get_lvds_encoder(struct drm_device *dev) |
| 859 | { |
| 860 | struct intel_encoder *intel_encoder; |
| 861 | |
| 862 | for_each_intel_encoder(dev, intel_encoder) |
| 863 | if (intel_encoder->type == INTEL_OUTPUT_LVDS) |
| 864 | return intel_encoder; |
| 865 | |
| 866 | return NULL; |
| 867 | } |
| 868 | |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 869 | bool intel_is_dual_link_lvds(struct drm_device *dev) |
| 870 | { |
Imre Deak | 97a824e1 | 2016-06-21 11:51:47 +0300 | [diff] [blame] | 871 | struct intel_encoder *encoder = intel_get_lvds_encoder(dev); |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 872 | |
Imre Deak | 97a824e1 | 2016-06-21 11:51:47 +0300 | [diff] [blame] | 873 | return encoder && to_lvds_encoder(&encoder->base)->is_dual_link; |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 874 | } |
| 875 | |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 876 | static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder) |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 877 | { |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 878 | struct drm_device *dev = lvds_encoder->base.base.dev; |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 879 | unsigned int val; |
Chris Wilson | fac5e23 | 2016-07-04 11:34:36 +0100 | [diff] [blame] | 880 | struct drm_i915_private *dev_priv = to_i915(dev); |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 881 | |
| 882 | /* use the module option value if specified */ |
Jani Nikula | d330a95 | 2014-01-21 11:24:25 +0200 | [diff] [blame] | 883 | if (i915.lvds_channel_mode > 0) |
| 884 | return i915.lvds_channel_mode == 2; |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 885 | |
Lukas Wunner | 6f317cf | 2015-04-12 21:10:35 +0200 | [diff] [blame] | 886 | /* single channel LVDS is limited to 112 MHz */ |
| 887 | if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock |
| 888 | > 112999) |
| 889 | return true; |
| 890 | |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 891 | if (dmi_check_system(intel_dual_link_lvds)) |
| 892 | return true; |
| 893 | |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 894 | /* BIOS should set the proper LVDS register value at boot, but |
| 895 | * in reality, it doesn't set the value when the lid is closed; |
| 896 | * we need to check "the value to be set" in VBT when LVDS |
| 897 | * register is uninitialized. |
| 898 | */ |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 899 | val = I915_READ(lvds_encoder->reg); |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 900 | if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED))) |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 901 | val = dev_priv->vbt.bios_lvds_val; |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 902 | |
Daniel Vetter | 1974cad | 2012-11-26 17:22:09 +0100 | [diff] [blame] | 903 | return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP; |
| 904 | } |
| 905 | |
Tvrtko Ursulin | 50a0bc9 | 2016-10-13 11:02:58 +0100 | [diff] [blame] | 906 | static bool intel_lvds_supported(struct drm_i915_private *dev_priv) |
Chris Wilson | f3cfcba | 2012-02-09 09:35:53 +0000 | [diff] [blame] | 907 | { |
| 908 | /* With the introduction of the PCH we gained a dedicated |
| 909 | * LVDS presence pin, use it. */ |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 910 | if (HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)) |
Chris Wilson | f3cfcba | 2012-02-09 09:35:53 +0000 | [diff] [blame] | 911 | return true; |
| 912 | |
| 913 | /* Otherwise LVDS was only attached to mobile products, |
| 914 | * except for the inglorious 830gm */ |
Tvrtko Ursulin | 50a0bc9 | 2016-10-13 11:02:58 +0100 | [diff] [blame] | 915 | if (INTEL_GEN(dev_priv) <= 4 && |
| 916 | IS_MOBILE(dev_priv) && !IS_I830(dev_priv)) |
Paulo Zanoni | 311e359 | 2013-03-06 20:03:19 -0300 | [diff] [blame] | 917 | return true; |
| 918 | |
| 919 | return false; |
Chris Wilson | f3cfcba | 2012-02-09 09:35:53 +0000 | [diff] [blame] | 920 | } |
| 921 | |
Zhao Yakui | 18f9ed1 | 2009-11-20 03:24:16 +0000 | [diff] [blame] | 922 | /** |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 923 | * intel_lvds_init - setup LVDS connectors on this device |
| 924 | * @dev: drm device |
| 925 | * |
| 926 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
| 927 | * modes we can display on the LVDS panel (if present). |
| 928 | */ |
Ander Conselvan de Oliveira | c39055b | 2016-11-23 16:21:44 +0200 | [diff] [blame] | 929 | void intel_lvds_init(struct drm_i915_private *dev_priv) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 930 | { |
Ander Conselvan de Oliveira | c39055b | 2016-11-23 16:21:44 +0200 | [diff] [blame] | 931 | struct drm_device *dev = &dev_priv->drm; |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 932 | struct intel_lvds_encoder *lvds_encoder; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 933 | struct intel_encoder *intel_encoder; |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 934 | struct intel_lvds_connector *lvds_connector; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 935 | struct intel_connector *intel_connector; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 936 | struct drm_connector *connector; |
| 937 | struct drm_encoder *encoder; |
| 938 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 939 | struct drm_display_mode *fixed_mode = NULL; |
Vandana Kannan | 4b6ed68 | 2014-02-11 14:26:36 +0530 | [diff] [blame] | 940 | struct drm_display_mode *downclock_mode = NULL; |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 941 | struct edid *edid; |
Ville Syrjälä | e2af48c | 2016-10-31 22:37:05 +0200 | [diff] [blame] | 942 | struct intel_crtc *crtc; |
Ville Syrjälä | f0f59a0 | 2015-11-18 15:33:26 +0200 | [diff] [blame] | 943 | i915_reg_t lvds_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 944 | u32 lvds; |
Chris Wilson | 270eea0 | 2010-09-24 01:15:02 +0100 | [diff] [blame] | 945 | int pipe; |
| 946 | u8 pin; |
Maarten Lankhorst | 8b45330 | 2017-05-01 15:37:56 +0200 | [diff] [blame] | 947 | u32 allowed_scalers; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 948 | |
Tvrtko Ursulin | 50a0bc9 | 2016-10-13 11:02:58 +0100 | [diff] [blame] | 949 | if (!intel_lvds_supported(dev_priv)) |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 950 | return; |
Chris Wilson | f3cfcba | 2012-02-09 09:35:53 +0000 | [diff] [blame] | 951 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 952 | /* Skip init on machines we know falsely report LVDS */ |
| 953 | if (dmi_check_system(intel_no_lvds)) |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 954 | return; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 955 | |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 956 | if (HAS_PCH_SPLIT(dev_priv)) |
Ville Syrjälä | d0669d0 | 2015-09-18 20:03:45 +0300 | [diff] [blame] | 957 | lvds_reg = PCH_LVDS; |
| 958 | else |
| 959 | lvds_reg = LVDS; |
| 960 | |
| 961 | lvds = I915_READ(lvds_reg); |
| 962 | |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 963 | if (HAS_PCH_SPLIT(dev_priv)) { |
Ville Syrjälä | d0669d0 | 2015-09-18 20:03:45 +0300 | [diff] [blame] | 964 | if ((lvds & LVDS_DETECTED) == 0) |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 965 | return; |
Jani Nikula | 6aa23e6 | 2016-03-24 17:50:20 +0200 | [diff] [blame] | 966 | if (dev_priv->vbt.edp.support) { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 967 | DRM_DEBUG_KMS("disable LVDS for eDP support\n"); |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 968 | return; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 969 | } |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 970 | } |
| 971 | |
Chris Wilson | eebaed6 | 2015-06-19 13:57:43 +0100 | [diff] [blame] | 972 | pin = GMBUS_PIN_PANEL; |
Jani Nikula | 5a69d13 | 2016-03-16 12:43:30 +0200 | [diff] [blame] | 973 | if (!intel_bios_is_lvds_present(dev_priv, &pin)) { |
Ville Syrjälä | d0669d0 | 2015-09-18 20:03:45 +0300 | [diff] [blame] | 974 | if ((lvds & LVDS_PORT_EN) == 0) { |
Chris Wilson | eebaed6 | 2015-06-19 13:57:43 +0100 | [diff] [blame] | 975 | DRM_DEBUG_KMS("LVDS is not present in VBT\n"); |
| 976 | return; |
| 977 | } |
| 978 | DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n"); |
| 979 | } |
| 980 | |
Daniel Vetter | b14c567 | 2013-09-19 12:18:32 +0200 | [diff] [blame] | 981 | lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL); |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 982 | if (!lvds_encoder) |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 983 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 984 | |
Daniel Vetter | b14c567 | 2013-09-19 12:18:32 +0200 | [diff] [blame] | 985 | lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL); |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 986 | if (!lvds_connector) { |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 987 | kfree(lvds_encoder); |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 988 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 989 | } |
| 990 | |
Ander Conselvan de Oliveira | 9bdbd0b | 2015-04-10 10:59:10 +0300 | [diff] [blame] | 991 | if (intel_connector_init(&lvds_connector->base) < 0) { |
| 992 | kfree(lvds_connector); |
| 993 | kfree(lvds_encoder); |
| 994 | return; |
| 995 | } |
| 996 | |
Jani Nikula | 62165e0 | 2012-10-19 14:51:47 +0300 | [diff] [blame] | 997 | lvds_encoder->attached_connector = lvds_connector; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 998 | |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 999 | intel_encoder = &lvds_encoder->base; |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 1000 | encoder = &intel_encoder->base; |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 1001 | intel_connector = &lvds_connector->base; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 1002 | connector = &intel_connector->base; |
Zhenyu Wang | bb8a356 | 2010-03-29 16:40:50 +0800 | [diff] [blame] | 1003 | drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1004 | DRM_MODE_CONNECTOR_LVDS); |
| 1005 | |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 1006 | drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs, |
Ville Syrjälä | 580d8ed | 2016-05-27 20:59:24 +0300 | [diff] [blame] | 1007 | DRM_MODE_ENCODER_LVDS, "LVDS"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1008 | |
Daniel Vetter | c22834e | 2012-06-30 15:31:28 +0200 | [diff] [blame] | 1009 | intel_encoder->enable = intel_enable_lvds; |
Daniel Vetter | f6736a1 | 2013-06-05 13:34:30 +0200 | [diff] [blame] | 1010 | intel_encoder->pre_enable = intel_pre_enable_lvds; |
Daniel Vetter | 7ae8923 | 2013-03-27 00:44:52 +0100 | [diff] [blame] | 1011 | intel_encoder->compute_config = intel_lvds_compute_config; |
Ville Syrjälä | d26a5b6 | 2015-07-02 17:42:46 +0300 | [diff] [blame] | 1012 | if (HAS_PCH_SPLIT(dev_priv)) { |
| 1013 | intel_encoder->disable = pch_disable_lvds; |
| 1014 | intel_encoder->post_disable = pch_post_disable_lvds; |
| 1015 | } else { |
| 1016 | intel_encoder->disable = gmch_disable_lvds; |
| 1017 | } |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 1018 | intel_encoder->get_hw_state = intel_lvds_get_hw_state; |
Jesse Barnes | 045ac3b | 2013-05-14 17:08:26 -0700 | [diff] [blame] | 1019 | intel_encoder->get_config = intel_lvds_get_config; |
Daniel Vetter | b1dc332 | 2012-07-02 21:09:00 +0200 | [diff] [blame] | 1020 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
Daniel Vetter | c22834e | 2012-06-30 15:31:28 +0200 | [diff] [blame] | 1021 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 1022 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1023 | |
Pandiyan, Dhinakaran | 03cdc1d | 2016-09-19 18:24:38 -0700 | [diff] [blame] | 1024 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
Ander Conselvan de Oliveira | 79f255a | 2017-02-22 08:34:27 +0200 | [diff] [blame] | 1025 | intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER; |
Pandiyan, Dhinakaran | 03cdc1d | 2016-09-19 18:24:38 -0700 | [diff] [blame] | 1026 | intel_encoder->port = PORT_NONE; |
Ville Syrjälä | bc079e8 | 2014-03-03 16:15:28 +0200 | [diff] [blame] | 1027 | intel_encoder->cloneable = 0; |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 1028 | if (HAS_PCH_SPLIT(dev_priv)) |
Jesse Barnes | 27f8227 | 2011-09-02 12:54:37 -0700 | [diff] [blame] | 1029 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
Tvrtko Ursulin | 5db9401 | 2016-10-13 11:03:10 +0100 | [diff] [blame] | 1030 | else if (IS_GEN4(dev_priv)) |
Daniel Vetter | 0b9f43a | 2012-06-05 10:07:11 +0200 | [diff] [blame] | 1031 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
Jesse Barnes | 27f8227 | 2011-09-02 12:54:37 -0700 | [diff] [blame] | 1032 | else |
| 1033 | intel_encoder->crtc_mask = (1 << 1); |
| 1034 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1035 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
| 1036 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 1037 | connector->interlace_allowed = false; |
| 1038 | connector->doublescan_allowed = false; |
| 1039 | |
Ville Syrjälä | d0669d0 | 2015-09-18 20:03:45 +0300 | [diff] [blame] | 1040 | lvds_encoder->reg = lvds_reg; |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 1041 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 1042 | /* create the scaling mode property */ |
Maarten Lankhorst | 8b45330 | 2017-05-01 15:37:56 +0200 | [diff] [blame] | 1043 | allowed_scalers = BIT(DRM_MODE_SCALE_ASPECT); |
| 1044 | allowed_scalers |= BIT(DRM_MODE_SCALE_FULLSCREEN); |
| 1045 | allowed_scalers |= BIT(DRM_MODE_SCALE_CENTER); |
| 1046 | drm_connector_attach_scaling_mode_property(connector, allowed_scalers); |
Maarten Lankhorst | eead06d | 2017-05-01 15:37:55 +0200 | [diff] [blame] | 1047 | connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT; |
Imre Deak | ed6143b8 | 2016-08-10 14:07:31 +0300 | [diff] [blame] | 1048 | |
| 1049 | intel_lvds_pps_get_hw_state(dev_priv, &lvds_encoder->init_pps); |
| 1050 | lvds_encoder->init_lvds_val = lvds; |
| 1051 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1052 | /* |
| 1053 | * LVDS discovery: |
| 1054 | * 1) check for EDID on DDC |
| 1055 | * 2) check for VBT data |
| 1056 | * 3) check to see if LVDS is already on |
| 1057 | * if none of the above, no panel |
| 1058 | * 4) make sure lid is open |
| 1059 | * if closed, act like it's not there for now |
| 1060 | */ |
| 1061 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1062 | /* |
| 1063 | * Attempt to get the fixed panel mode from DDC. Assume that the |
| 1064 | * preferred mode is the right one. |
| 1065 | */ |
Daniel Vetter | 4da9854 | 2014-03-21 23:22:35 +0100 | [diff] [blame] | 1066 | mutex_lock(&dev->mode_config.mutex); |
Lukas Wunner | 4eddaee | 2016-01-11 20:09:20 +0100 | [diff] [blame] | 1067 | if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC) |
| 1068 | edid = drm_get_edid_switcheroo(connector, |
| 1069 | intel_gmbus_get_adapter(dev_priv, pin)); |
| 1070 | else |
| 1071 | edid = drm_get_edid(connector, |
| 1072 | intel_gmbus_get_adapter(dev_priv, pin)); |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 1073 | if (edid) { |
| 1074 | if (drm_add_edid_modes(connector, edid)) { |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 1075 | drm_mode_connector_update_edid_property(connector, |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 1076 | edid); |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 1077 | } else { |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 1078 | kfree(edid); |
| 1079 | edid = ERR_PTR(-EINVAL); |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 1080 | } |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 1081 | } else { |
| 1082 | edid = ERR_PTR(-ENOENT); |
Chris Wilson | 3f8ff0e | 2010-11-08 23:20:52 +0000 | [diff] [blame] | 1083 | } |
Jani Nikula | 9cd300e | 2012-10-19 14:51:52 +0300 | [diff] [blame] | 1084 | lvds_connector->base.edid = edid; |
| 1085 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1086 | list_for_each_entry(scan, &connector->probed_modes, head) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1087 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
Chris Wilson | 6a9d51b | 2012-11-21 16:14:03 +0000 | [diff] [blame] | 1088 | DRM_DEBUG_KMS("using preferred mode from EDID: "); |
| 1089 | drm_mode_debug_printmodeline(scan); |
| 1090 | |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 1091 | fixed_mode = drm_mode_duplicate(dev, scan); |
Daniel Vetter | c329a4e | 2015-06-18 10:30:23 +0200 | [diff] [blame] | 1092 | if (fixed_mode) |
Chris Wilson | 6a9d51b | 2012-11-21 16:14:03 +0000 | [diff] [blame] | 1093 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1094 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1095 | } |
| 1096 | |
| 1097 | /* Failed to get EDID, what about VBT? */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1098 | if (dev_priv->vbt.lfp_lvds_vbt_mode) { |
Chris Wilson | 6a9d51b | 2012-11-21 16:14:03 +0000 | [diff] [blame] | 1099 | DRM_DEBUG_KMS("using mode from VBT: "); |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1100 | drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode); |
Chris Wilson | 6a9d51b | 2012-11-21 16:14:03 +0000 | [diff] [blame] | 1101 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1102 | fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode); |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 1103 | if (fixed_mode) { |
| 1104 | fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; |
Ville Syrjälä | df45724 | 2016-05-31 12:08:34 +0300 | [diff] [blame] | 1105 | connector->display_info.width_mm = fixed_mode->width_mm; |
| 1106 | connector->display_info.height_mm = fixed_mode->height_mm; |
Jesse Barnes | e285f3c | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 1107 | goto out; |
| 1108 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1109 | } |
| 1110 | |
| 1111 | /* |
| 1112 | * If we didn't get EDID, try checking if the panel is already turned |
| 1113 | * on. If so, assume that whatever is currently programmed is the |
| 1114 | * correct mode. |
| 1115 | */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1116 | |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 1117 | /* Ironlake: FIXME if still fail, not try pipe mode now */ |
Tvrtko Ursulin | 6e26695 | 2016-10-13 11:02:53 +0100 | [diff] [blame] | 1118 | if (HAS_PCH_SPLIT(dev_priv)) |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1119 | goto failed; |
| 1120 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1121 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
Ville Syrjälä | b91eb5c | 2016-10-31 22:37:09 +0200 | [diff] [blame] | 1122 | crtc = intel_get_crtc_for_pipe(dev_priv, pipe); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1123 | |
| 1124 | if (crtc && (lvds & LVDS_PORT_EN)) { |
Ville Syrjälä | e2af48c | 2016-10-31 22:37:05 +0200 | [diff] [blame] | 1125 | fixed_mode = intel_crtc_mode_get(dev, &crtc->base); |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 1126 | if (fixed_mode) { |
Chris Wilson | 6a9d51b | 2012-11-21 16:14:03 +0000 | [diff] [blame] | 1127 | DRM_DEBUG_KMS("using current (BIOS) mode: "); |
| 1128 | drm_mode_debug_printmodeline(fixed_mode); |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 1129 | fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 1130 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1131 | } |
| 1132 | } |
| 1133 | |
| 1134 | /* If we still don't have a mode after all that, give up. */ |
Jani Nikula | dd06f90 | 2012-10-19 14:51:50 +0300 | [diff] [blame] | 1135 | if (!fixed_mode) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1136 | goto failed; |
| 1137 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1138 | out: |
Daniel Vetter | 4da9854 | 2014-03-21 23:22:35 +0100 | [diff] [blame] | 1139 | mutex_unlock(&dev->mode_config.mutex); |
| 1140 | |
Jim Bride | dc911f5 | 2017-08-09 12:48:53 -0700 | [diff] [blame] | 1141 | intel_panel_init(&intel_connector->panel, fixed_mode, NULL, |
| 1142 | downclock_mode); |
Chris Wilson | fda9ee9 | 2016-06-24 14:00:13 +0100 | [diff] [blame] | 1143 | intel_panel_setup_backlight(connector, INVALID_PIPE); |
Lukas Wunner | 6f317cf | 2015-04-12 21:10:35 +0200 | [diff] [blame] | 1144 | |
Daniel Vetter | 7dec060 | 2012-09-11 14:12:25 +0200 | [diff] [blame] | 1145 | lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder); |
Daniel Vetter | 13c7d87 | 2012-11-26 17:22:10 +0100 | [diff] [blame] | 1146 | DRM_DEBUG_KMS("detected %s-link lvds configuration\n", |
| 1147 | lvds_encoder->is_dual_link ? "dual" : "single"); |
| 1148 | |
Lukas Wunner | af9b9c1 | 2015-11-05 09:30:50 +0100 | [diff] [blame] | 1149 | lvds_encoder->a3_power = lvds & LVDS_A3_POWER_MASK; |
Paulo Zanoni | 1f835a7 | 2014-07-04 13:38:36 -0300 | [diff] [blame] | 1150 | |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 1151 | lvds_connector->lid_notifier.notifier_call = intel_lid_notify; |
| 1152 | if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 1153 | DRM_DEBUG_KMS("lid notifier registration failed\n"); |
Jani Nikula | db1740a | 2012-10-19 14:51:45 +0300 | [diff] [blame] | 1154 | lvds_connector->lid_notifier.notifier_call = NULL; |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame] | 1155 | } |
Matthew Garrett | aaa6fd2 | 2011-08-12 12:11:33 +0200 | [diff] [blame] | 1156 | |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 1157 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1158 | |
| 1159 | failed: |
Daniel Vetter | 4da9854 | 2014-03-21 23:22:35 +0100 | [diff] [blame] | 1160 | mutex_unlock(&dev->mode_config.mutex); |
| 1161 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1162 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1163 | drm_connector_cleanup(connector); |
Shaohua Li | 1991bdf | 2009-11-17 17:19:23 +0800 | [diff] [blame] | 1164 | drm_encoder_cleanup(encoder); |
Jani Nikula | 29b99b4 | 2012-10-19 14:51:43 +0300 | [diff] [blame] | 1165 | kfree(lvds_encoder); |
Jani Nikula | c7362c4 | 2012-10-19 14:51:44 +0300 | [diff] [blame] | 1166 | kfree(lvds_connector); |
Daniel Vetter | c909335 | 2013-06-06 22:22:47 +0200 | [diff] [blame] | 1167 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1168 | } |