blob: f7261628d8a60ec209d346232dbeab94874acb18 [file] [log] [blame]
Marc St-Jeanbeab6972007-05-06 14:48:45 -07001/*
2 * The setup file for serial related hardware on PMC-Sierra MSP processors.
3 *
4 * Copyright 2005 PMC-Sierra, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/serial.h>
28#include <linux/serial_core.h>
29#include <linux/serial_reg.h>
30
31#include <asm/bootinfo.h>
32#include <asm/io.h>
33#include <asm/processor.h>
34#include <asm/serial.h>
Yinghai Lub187f182007-07-18 00:49:10 -070035#include <linux/serial_8250.h>
Marc St-Jeanbeab6972007-05-06 14:48:45 -070036
37#include <msp_prom.h>
38#include <msp_int.h>
39#include <msp_regs.h>
40
Marc St-Jeanbeab6972007-05-06 14:48:45 -070041void __init msp_serial_setup(void)
42{
43 char *s;
44 char *endp;
45 struct uart_port up;
46 unsigned int uartclk;
47
48 memset(&up, 0, sizeof(up));
49
50 /* Check if clock was specified in environment */
51 s = prom_getenv("uartfreqhz");
52 if(!(s && *s && (uartclk = simple_strtoul(s, &endp, 10)) && *endp == 0))
53 uartclk = MSP_BASE_BAUD;
54 ppfinit("UART clock set to %d\n", uartclk);
55
56 /* Initialize first serial port */
57 up.mapbase = MSP_UART0_BASE;
Ralf Baechle21a151d2007-10-11 23:46:15 +010058 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
Marc St-Jeanbeab6972007-05-06 14:48:45 -070059 up.irq = MSP_INT_UART0;
60 up.uartclk = uartclk;
61 up.regshift = 2;
62 up.iotype = UPIO_DWAPB; /* UPIO_MEM like */
Ralf Baechle1553f6a2007-10-09 15:15:21 +010063 up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
Marc St-Jeanbeab6972007-05-06 14:48:45 -070064 up.type = PORT_16550A;
65 up.line = 0;
66 up.private_data = (void*)UART0_STATUS_REG;
67 if (early_serial_setup(&up))
68 printk(KERN_ERR "Early serial init of port 0 failed\n");
69
70 /* Initialize the second serial port, if one exists */
71 switch (mips_machtype) {
72 case MACH_MSP4200_EVAL:
73 case MACH_MSP4200_GW:
74 case MACH_MSP4200_FPGA:
75 case MACH_MSP7120_EVAL:
76 case MACH_MSP7120_GW:
77 case MACH_MSP7120_FPGA:
78 /* Enable UART1 on MSP4200 and MSP7120 */
79 *GPIO_CFG2_REG = 0x00002299;
Marc St-Jeanbeab6972007-05-06 14:48:45 -070080 break;
81
82 default:
83 return; /* No second serial port, good-bye. */
84 }
85
86 up.mapbase = MSP_UART1_BASE;
Ralf Baechle21a151d2007-10-11 23:46:15 +010087 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN);
Marc St-Jeanbeab6972007-05-06 14:48:45 -070088 up.irq = MSP_INT_UART1;
89 up.line = 1;
90 up.private_data = (void*)UART1_STATUS_REG;
91 if (early_serial_setup(&up))
92 printk(KERN_ERR "Early serial init of port 1 failed\n");
93}