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Timur Tabi34f84b52012-07-23 18:12:29 -05001/*
2 * P1022 RDK board specific routines
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * Author: Timur Tabi <timur@freescale.com>
7 *
8 * Based on p1022_ds.c
9 *
10 * This file is licensed under the terms of the GNU General Public License
11 * version 2. This program is licensed "as is" without any warranty of any
12 * kind, whether express or implied.
13 */
14
Scott Wood94848652015-09-19 23:29:53 -050015#include <linux/fsl/guts.h>
Timur Tabi34f84b52012-07-23 18:12:29 -050016#include <linux/pci.h>
17#include <linux/of_platform.h>
Timur Tabi34f84b52012-07-23 18:12:29 -050018#include <asm/div64.h>
19#include <asm/mpic.h>
20#include <asm/swiotlb.h>
21
22#include <sysdev/fsl_soc.h>
23#include <sysdev/fsl_pci.h>
24#include <asm/udbg.h>
Timur Tabi34f84b52012-07-23 18:12:29 -050025#include "smp.h"
26
27#include "mpc85xx.h"
28
29#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
30
31/* DIU Pixel Clock bits of the CLKDVDR Global Utilities register */
32#define CLKDVDR_PXCKEN 0x80000000
33#define CLKDVDR_PXCKINV 0x10000000
34#define CLKDVDR_PXCKDLY 0x06000000
35#define CLKDVDR_PXCLK_MASK 0x00FF0000
36
37/**
Timur Tabi34f84b52012-07-23 18:12:29 -050038 * p1022rdk_set_pixel_clock: program the DIU's clock
39 *
40 * @pixclock: the wavelength, in picoseconds, of the clock
41 */
42void p1022rdk_set_pixel_clock(unsigned int pixclock)
43{
44 struct device_node *guts_np = NULL;
45 struct ccsr_guts __iomem *guts;
46 unsigned long freq;
47 u64 temp;
48 u32 pxclk;
49
50 /* Map the global utilities registers. */
51 guts_np = of_find_compatible_node(NULL, NULL, "fsl,p1022-guts");
52 if (!guts_np) {
Masanari Iidad939be32015-02-27 23:52:31 +090053 pr_err("p1022rdk: missing global utilities device node\n");
Timur Tabi34f84b52012-07-23 18:12:29 -050054 return;
55 }
56
57 guts = of_iomap(guts_np, 0);
58 of_node_put(guts_np);
59 if (!guts) {
Masanari Iidad939be32015-02-27 23:52:31 +090060 pr_err("p1022rdk: could not map global utilities device\n");
Timur Tabi34f84b52012-07-23 18:12:29 -050061 return;
62 }
63
64 /* Convert pixclock from a wavelength to a frequency */
65 temp = 1000000000000ULL;
66 do_div(temp, pixclock);
67 freq = temp;
68
69 /*
70 * 'pxclk' is the ratio of the platform clock to the pixel clock.
71 * This number is programmed into the CLKDVDR register, and the valid
72 * range of values is 2-255.
73 */
74 pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq);
75 pxclk = clamp_t(u32, pxclk, 2, 255);
76
77 /* Disable the pixel clock, and set it to non-inverted and no delay */
78 clrbits32(&guts->clkdvdr,
79 CLKDVDR_PXCKEN | CLKDVDR_PXCKDLY | CLKDVDR_PXCLK_MASK);
80
81 /* Enable the clock and set the pxclk */
82 setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));
83
84 iounmap(guts);
85}
86
87/**
88 * p1022rdk_valid_monitor_port: set the monitor port for sysfs
89 */
90enum fsl_diu_monitor_port
91p1022rdk_valid_monitor_port(enum fsl_diu_monitor_port port)
92{
93 return FSL_DIU_PORT_DVI;
94}
95
96#endif
97
98void __init p1022_rdk_pic_init(void)
99{
100 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
101 MPIC_SINGLE_DEST_CPU,
102 0, 256, " OpenPIC ");
103 BUG_ON(mpic == NULL);
104 mpic_init(mpic);
105}
106
107/*
108 * Setup the architecture
109 */
110static void __init p1022_rdk_setup_arch(void)
111{
Timur Tabi34f84b52012-07-23 18:12:29 -0500112 if (ppc_md.progress)
113 ppc_md.progress("p1022_rdk_setup_arch()", 0);
114
Timur Tabi34f84b52012-07-23 18:12:29 -0500115#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
Timur Tabi34f84b52012-07-23 18:12:29 -0500116 diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock;
117 diu_ops.valid_monitor_port = p1022rdk_valid_monitor_port;
118#endif
119
120 mpc85xx_smp_init();
121
Jia Hongtao905e75c2012-08-28 15:44:08 +0800122 fsl_pci_assign_primary();
123
124 swiotlb_detect_4g();
Timur Tabi34f84b52012-07-23 18:12:29 -0500125
126 pr_info("Freescale / iVeia P1022 RDK reference board\n");
127}
128
Jia Hongtao905e75c2012-08-28 15:44:08 +0800129machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices);
Timur Tabi34f84b52012-07-23 18:12:29 -0500130
131machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier);
132
133/*
134 * Called very early, device-tree isn't unflattened
135 */
136static int __init p1022_rdk_probe(void)
137{
Benjamin Herrenschmidt56571382016-07-05 15:04:05 +1000138 return of_machine_is_compatible("fsl,p1022rdk");
Timur Tabi34f84b52012-07-23 18:12:29 -0500139}
140
141define_machine(p1022_rdk) {
142 .name = "P1022 RDK",
143 .probe = p1022_rdk_probe,
144 .setup_arch = p1022_rdk_setup_arch,
145 .init_IRQ = p1022_rdk_pic_init,
146#ifdef CONFIG_PCI
147 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
Wang Dongsheng48b16182014-03-20 11:19:37 +0800148 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
Timur Tabi34f84b52012-07-23 18:12:29 -0500149#endif
150 .get_irq = mpic_get_irq,
Timur Tabi34f84b52012-07-23 18:12:29 -0500151 .calibrate_decr = generic_calibrate_decr,
152 .progress = udbg_progress,
153};