Georgi Djakov | 00f64b5 | 2016-11-02 17:56:56 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2015 Linaro Limited |
| 3 | * |
| 4 | * This software is licensed under the terms of the GNU General Public |
| 5 | * License version 2, as published by the Free Software Foundation, and |
| 6 | * may be copied, distributed, and modified under those terms. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H |
| 15 | #define _DT_BINDINGS_CLK_MSM_RPMCC_H |
| 16 | |
Bjorn Andersson | 685dc94 | 2016-11-18 08:33:25 -0800 | [diff] [blame] | 17 | /* RPM clocks */ |
Georgi Djakov | 872f91b5 | 2016-11-02 17:56:57 +0200 | [diff] [blame] | 18 | #define RPM_PXO_CLK 0 |
| 19 | #define RPM_PXO_A_CLK 1 |
| 20 | #define RPM_CXO_CLK 2 |
| 21 | #define RPM_CXO_A_CLK 3 |
| 22 | #define RPM_APPS_FABRIC_CLK 4 |
| 23 | #define RPM_APPS_FABRIC_A_CLK 5 |
| 24 | #define RPM_CFPB_CLK 6 |
| 25 | #define RPM_CFPB_A_CLK 7 |
| 26 | #define RPM_QDSS_CLK 8 |
| 27 | #define RPM_QDSS_A_CLK 9 |
| 28 | #define RPM_DAYTONA_FABRIC_CLK 10 |
| 29 | #define RPM_DAYTONA_FABRIC_A_CLK 11 |
| 30 | #define RPM_EBI1_CLK 12 |
| 31 | #define RPM_EBI1_A_CLK 13 |
| 32 | #define RPM_MM_FABRIC_CLK 14 |
| 33 | #define RPM_MM_FABRIC_A_CLK 15 |
| 34 | #define RPM_MMFPB_CLK 16 |
| 35 | #define RPM_MMFPB_A_CLK 17 |
| 36 | #define RPM_SYS_FABRIC_CLK 18 |
| 37 | #define RPM_SYS_FABRIC_A_CLK 19 |
| 38 | #define RPM_SFPB_CLK 20 |
| 39 | #define RPM_SFPB_A_CLK 21 |
| 40 | |
Bjorn Andersson | 685dc94 | 2016-11-18 08:33:25 -0800 | [diff] [blame] | 41 | /* SMD RPM clocks */ |
Georgi Djakov | 00f64b5 | 2016-11-02 17:56:56 +0200 | [diff] [blame] | 42 | #define RPM_SMD_XO_CLK_SRC 0 |
| 43 | #define RPM_SMD_XO_A_CLK_SRC 1 |
| 44 | #define RPM_SMD_PCNOC_CLK 2 |
| 45 | #define RPM_SMD_PCNOC_A_CLK 3 |
| 46 | #define RPM_SMD_SNOC_CLK 4 |
| 47 | #define RPM_SMD_SNOC_A_CLK 5 |
| 48 | #define RPM_SMD_BIMC_CLK 6 |
| 49 | #define RPM_SMD_BIMC_A_CLK 7 |
| 50 | #define RPM_SMD_QDSS_CLK 8 |
| 51 | #define RPM_SMD_QDSS_A_CLK 9 |
| 52 | #define RPM_SMD_BB_CLK1 10 |
| 53 | #define RPM_SMD_BB_CLK1_A 11 |
| 54 | #define RPM_SMD_BB_CLK2 12 |
| 55 | #define RPM_SMD_BB_CLK2_A 13 |
| 56 | #define RPM_SMD_RF_CLK1 14 |
| 57 | #define RPM_SMD_RF_CLK1_A 15 |
| 58 | #define RPM_SMD_RF_CLK2 16 |
| 59 | #define RPM_SMD_RF_CLK2_A 17 |
| 60 | #define RPM_SMD_BB_CLK1_PIN 18 |
| 61 | #define RPM_SMD_BB_CLK1_A_PIN 19 |
| 62 | #define RPM_SMD_BB_CLK2_PIN 20 |
| 63 | #define RPM_SMD_BB_CLK2_A_PIN 21 |
| 64 | #define RPM_SMD_RF_CLK1_PIN 22 |
| 65 | #define RPM_SMD_RF_CLK1_A_PIN 23 |
| 66 | #define RPM_SMD_RF_CLK2_PIN 24 |
| 67 | #define RPM_SMD_RF_CLK2_A_PIN 25 |
Bjorn Andersson | 685dc94 | 2016-11-18 08:33:25 -0800 | [diff] [blame] | 68 | #define RPM_SMD_PNOC_CLK 26 |
| 69 | #define RPM_SMD_PNOC_A_CLK 27 |
| 70 | #define RPM_SMD_CNOC_CLK 28 |
| 71 | #define RPM_SMD_CNOC_A_CLK 29 |
| 72 | #define RPM_SMD_MMSSNOC_AHB_CLK 30 |
| 73 | #define RPM_SMD_MMSSNOC_AHB_A_CLK 31 |
| 74 | #define RPM_SMD_GFX3D_CLK_SRC 32 |
| 75 | #define RPM_SMD_GFX3D_A_CLK_SRC 33 |
| 76 | #define RPM_SMD_OCMEMGX_CLK 34 |
| 77 | #define RPM_SMD_OCMEMGX_A_CLK 35 |
| 78 | #define RPM_SMD_CXO_D0 36 |
| 79 | #define RPM_SMD_CXO_D0_A 37 |
| 80 | #define RPM_SMD_CXO_D1 38 |
| 81 | #define RPM_SMD_CXO_D1_A 39 |
| 82 | #define RPM_SMD_CXO_A0 40 |
| 83 | #define RPM_SMD_CXO_A0_A 41 |
| 84 | #define RPM_SMD_CXO_A1 42 |
| 85 | #define RPM_SMD_CXO_A1_A 43 |
| 86 | #define RPM_SMD_CXO_A2 44 |
| 87 | #define RPM_SMD_CXO_A2_A 45 |
| 88 | #define RPM_SMD_DIV_CLK1 46 |
| 89 | #define RPM_SMD_DIV_A_CLK1 47 |
| 90 | #define RPM_SMD_DIV_CLK2 48 |
| 91 | #define RPM_SMD_DIV_A_CLK2 49 |
| 92 | #define RPM_SMD_DIFF_CLK 50 |
| 93 | #define RPM_SMD_DIFF_A_CLK 51 |
| 94 | #define RPM_SMD_CXO_D0_PIN 52 |
| 95 | #define RPM_SMD_CXO_D0_A_PIN 53 |
| 96 | #define RPM_SMD_CXO_D1_PIN 54 |
| 97 | #define RPM_SMD_CXO_D1_A_PIN 55 |
| 98 | #define RPM_SMD_CXO_A0_PIN 56 |
| 99 | #define RPM_SMD_CXO_A0_A_PIN 57 |
| 100 | #define RPM_SMD_CXO_A1_PIN 58 |
| 101 | #define RPM_SMD_CXO_A1_A_PIN 59 |
| 102 | #define RPM_SMD_CXO_A2_PIN 60 |
| 103 | #define RPM_SMD_CXO_A2_A_PIN 61 |
Georgi Djakov | 00f64b5 | 2016-11-02 17:56:56 +0200 | [diff] [blame] | 104 | |
| 105 | #endif |