blob: 46cd784467d588cd5a0a9caead3f5591da2d8c10 [file] [log] [blame]
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +000029#include <linux/bitrev.h>
30#include <linux/crc16.h>
Steve Glendinning2f7ca802008-10-02 05:27:57 +000031#include <linux/crc32.h>
32#include <linux/usb/usbnet.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090033#include <linux/slab.h>
Steve Glendinning2f7ca802008-10-02 05:27:57 +000034#include "smsc95xx.h"
35
36#define SMSC_CHIPNAME "smsc95xx"
Steve Glendinningf7b29272008-11-20 04:19:21 -080037#define SMSC_DRIVER_VERSION "1.0.4"
Steve Glendinning2f7ca802008-10-02 05:27:57 +000038#define HS_USB_PKT_SIZE (512)
39#define FS_USB_PKT_SIZE (64)
40#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
41#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
42#define DEFAULT_BULK_IN_DELAY (0x00002000)
43#define MAX_SINGLE_PACKET_SIZE (2048)
44#define LAN95XX_EEPROM_MAGIC (0x9500)
45#define EEPROM_MAC_OFFSET (0x01)
Steve Glendinningf7b29272008-11-20 04:19:21 -080046#define DEFAULT_TX_CSUM_ENABLE (true)
Steve Glendinning2f7ca802008-10-02 05:27:57 +000047#define DEFAULT_RX_CSUM_ENABLE (true)
48#define SMSC95XX_INTERNAL_PHY_ID (1)
49#define SMSC95XX_TX_OVERHEAD (8)
Steve Glendinningf7b29272008-11-20 04:19:21 -080050#define SMSC95XX_TX_OVERHEAD_CSUM (12)
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +000051#define SUPPORTED_WAKE (WAKE_UCAST | WAKE_BCAST | \
52 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
Steve Glendinning2f7ca802008-10-02 05:27:57 +000053
Steve Glendinning769ea6d2012-09-28 00:07:09 +000054#define check_warn(ret, fmt, args...) \
55 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
56
57#define check_warn_return(ret, fmt, args...) \
58 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
59
60#define check_warn_goto_done(ret, fmt, args...) \
61 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
62
Steve Glendinning2f7ca802008-10-02 05:27:57 +000063struct smsc95xx_priv {
64 u32 mac_cr;
Marc Zyngier3c0f3c62011-03-18 03:53:58 +000065 u32 hash_hi;
66 u32 hash_lo;
Steve Glendinninge0e474a2012-09-28 00:07:12 +000067 u32 wolopts;
Steve Glendinning2f7ca802008-10-02 05:27:57 +000068 spinlock_t mac_cr_lock;
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +000069 int wuff_filter_count;
Steve Glendinning2f7ca802008-10-02 05:27:57 +000070};
71
Rusty Russelleb939922011-12-19 14:08:01 +000072static bool turbo_mode = true;
Steve Glendinning2f7ca802008-10-02 05:27:57 +000073module_param(turbo_mode, bool, 0644);
74MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
75
Steve Glendinning769ea6d2012-09-28 00:07:09 +000076static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
77 u32 *data)
Steve Glendinning2f7ca802008-10-02 05:27:57 +000078{
Ming Lei72108fd2012-10-24 19:47:04 +000079 u32 buf;
Steve Glendinning2f7ca802008-10-02 05:27:57 +000080 int ret;
81
82 BUG_ON(!dev);
83
Ming Lei72108fd2012-10-24 19:47:04 +000084 ret = usbnet_read_cmd(dev, USB_VENDOR_REQUEST_READ_REGISTER,
85 USB_DIR_IN | USB_TYPE_VENDOR |
86 USB_RECIP_DEVICE,
87 0, index, &buf, 4);
Steve Glendinning2f7ca802008-10-02 05:27:57 +000088 if (unlikely(ret < 0))
Joe Perches60b86752010-02-17 10:30:23 +000089 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index);
Steve Glendinning2f7ca802008-10-02 05:27:57 +000090
Ming Lei72108fd2012-10-24 19:47:04 +000091 le32_to_cpus(&buf);
92 *data = buf;
Steve Glendinning2f7ca802008-10-02 05:27:57 +000093
94 return ret;
95}
96
Steve Glendinning769ea6d2012-09-28 00:07:09 +000097static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
98 u32 data)
Steve Glendinning2f7ca802008-10-02 05:27:57 +000099{
Ming Lei72108fd2012-10-24 19:47:04 +0000100 u32 buf;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000101 int ret;
102
103 BUG_ON(!dev);
104
Ming Lei72108fd2012-10-24 19:47:04 +0000105 buf = data;
106 cpu_to_le32s(&buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000107
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000108
Ming Lei72108fd2012-10-24 19:47:04 +0000109 ret = usbnet_write_cmd(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
110 USB_DIR_OUT | USB_TYPE_VENDOR |
111 USB_RECIP_DEVICE,
112 0, index, &buf, 4);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000113 if (unlikely(ret < 0))
Joe Perches60b86752010-02-17 10:30:23 +0000114 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000115
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000116 return ret;
117}
118
Steve Glendinninge0e474a2012-09-28 00:07:12 +0000119static int smsc95xx_set_feature(struct usbnet *dev, u32 feature)
120{
121 if (WARN_ON_ONCE(!dev))
122 return -EINVAL;
123
Ming Lei72108fd2012-10-24 19:47:04 +0000124 return usbnet_write_cmd(dev, USB_REQ_SET_FEATURE,
125 USB_RECIP_DEVICE, feature, 0, NULL, 0);
Steve Glendinninge0e474a2012-09-28 00:07:12 +0000126}
127
128static int smsc95xx_clear_feature(struct usbnet *dev, u32 feature)
129{
130 if (WARN_ON_ONCE(!dev))
131 return -EINVAL;
132
Ming Lei72108fd2012-10-24 19:47:04 +0000133 return usbnet_write_cmd(dev, USB_REQ_CLEAR_FEATURE,
134 USB_RECIP_DEVICE, feature, 0, NULL, 0);
Steve Glendinninge0e474a2012-09-28 00:07:12 +0000135}
136
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000137/* Loop until the read is completed with timeout
138 * called with phy_mutex held */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000139static int __must_check smsc95xx_phy_wait_not_busy(struct usbnet *dev)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000140{
141 unsigned long start_time = jiffies;
142 u32 val;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000143 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000144
145 do {
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000146 ret = smsc95xx_read_reg(dev, MII_ADDR, &val);
147 check_warn_return(ret, "Error reading MII_ACCESS");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000148 if (!(val & MII_BUSY_))
149 return 0;
150 } while (!time_after(jiffies, start_time + HZ));
151
152 return -EIO;
153}
154
155static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
156{
157 struct usbnet *dev = netdev_priv(netdev);
158 u32 val, addr;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000159 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000160
161 mutex_lock(&dev->phy_mutex);
162
163 /* confirm MII not busy */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000164 ret = smsc95xx_phy_wait_not_busy(dev);
165 check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_read");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000166
167 /* set the address, index & direction (read from PHY) */
168 phy_id &= dev->mii.phy_id_mask;
169 idx &= dev->mii.reg_num_mask;
170 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000171 ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
172 check_warn_goto_done(ret, "Error writing MII_ADDR");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000173
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000174 ret = smsc95xx_phy_wait_not_busy(dev);
175 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000176
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000177 ret = smsc95xx_read_reg(dev, MII_DATA, &val);
178 check_warn_goto_done(ret, "Error reading MII_DATA");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000179
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000180 ret = (u16)(val & 0xFFFF);
181
182done:
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000183 mutex_unlock(&dev->phy_mutex);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000184 return ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000185}
186
187static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
188 int regval)
189{
190 struct usbnet *dev = netdev_priv(netdev);
191 u32 val, addr;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000192 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000193
194 mutex_lock(&dev->phy_mutex);
195
196 /* confirm MII not busy */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000197 ret = smsc95xx_phy_wait_not_busy(dev);
198 check_warn_goto_done(ret, "MII is busy in smsc95xx_mdio_write");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000199
200 val = regval;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000201 ret = smsc95xx_write_reg(dev, MII_DATA, val);
202 check_warn_goto_done(ret, "Error writing MII_DATA");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000203
204 /* set the address, index & direction (write to PHY) */
205 phy_id &= dev->mii.phy_id_mask;
206 idx &= dev->mii.reg_num_mask;
207 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000208 ret = smsc95xx_write_reg(dev, MII_ADDR, addr);
209 check_warn_goto_done(ret, "Error writing MII_ADDR");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000210
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000211 ret = smsc95xx_phy_wait_not_busy(dev);
212 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000213
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000214done:
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000215 mutex_unlock(&dev->phy_mutex);
216}
217
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000218static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000219{
220 unsigned long start_time = jiffies;
221 u32 val;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000222 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000223
224 do {
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000225 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
226 check_warn_return(ret, "Error reading E2P_CMD");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000227 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
228 break;
229 udelay(40);
230 } while (!time_after(jiffies, start_time + HZ));
231
232 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
Joe Perches60b86752010-02-17 10:30:23 +0000233 netdev_warn(dev->net, "EEPROM read operation timeout\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000234 return -EIO;
235 }
236
237 return 0;
238}
239
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000240static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000241{
242 unsigned long start_time = jiffies;
243 u32 val;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000244 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000245
246 do {
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000247 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
248 check_warn_return(ret, "Error reading E2P_CMD");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000249
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000250 if (!(val & E2P_CMD_BUSY_))
251 return 0;
252
253 udelay(40);
254 } while (!time_after(jiffies, start_time + HZ));
255
Joe Perches60b86752010-02-17 10:30:23 +0000256 netdev_warn(dev->net, "EEPROM is busy\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000257 return -EIO;
258}
259
260static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
261 u8 *data)
262{
263 u32 val;
264 int i, ret;
265
266 BUG_ON(!dev);
267 BUG_ON(!data);
268
269 ret = smsc95xx_eeprom_confirm_not_busy(dev);
270 if (ret)
271 return ret;
272
273 for (i = 0; i < length; i++) {
274 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000275 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
276 check_warn_return(ret, "Error writing E2P_CMD");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000277
278 ret = smsc95xx_wait_eeprom(dev);
279 if (ret < 0)
280 return ret;
281
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000282 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
283 check_warn_return(ret, "Error reading E2P_DATA");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000284
285 data[i] = val & 0xFF;
286 offset++;
287 }
288
289 return 0;
290}
291
292static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
293 u8 *data)
294{
295 u32 val;
296 int i, ret;
297
298 BUG_ON(!dev);
299 BUG_ON(!data);
300
301 ret = smsc95xx_eeprom_confirm_not_busy(dev);
302 if (ret)
303 return ret;
304
305 /* Issue write/erase enable command */
306 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000307 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
308 check_warn_return(ret, "Error writing E2P_DATA");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000309
310 ret = smsc95xx_wait_eeprom(dev);
311 if (ret < 0)
312 return ret;
313
314 for (i = 0; i < length; i++) {
315
316 /* Fill data register */
317 val = data[i];
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000318 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
319 check_warn_return(ret, "Error writing E2P_DATA");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000320
321 /* Send "write" command */
322 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000323 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
324 check_warn_return(ret, "Error writing E2P_CMD");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000325
326 ret = smsc95xx_wait_eeprom(dev);
327 if (ret < 0)
328 return ret;
329
330 offset++;
331 }
332
333 return 0;
334}
335
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000336static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
337 u32 *data)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000338{
Steve Glendinning1d74a6b2008-10-09 14:34:47 -0700339 const u16 size = 4;
Ming Lei72108fd2012-10-24 19:47:04 +0000340 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000341
Ming Lei72108fd2012-10-24 19:47:04 +0000342 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
343 USB_DIR_OUT | USB_TYPE_VENDOR |
344 USB_RECIP_DEVICE,
345 0, index, data, size);
346 if (ret < 0)
347 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
348 ret);
349 return ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000350}
351
352/* returns hash bit number for given MAC address
353 * example:
354 * 01 00 5E 00 00 01 -> returns bit number 31 */
355static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
356{
357 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
358}
359
360static void smsc95xx_set_multicast(struct net_device *netdev)
361{
362 struct usbnet *dev = netdev_priv(netdev);
363 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000364 unsigned long flags;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000365 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000366
Marc Zyngier3c0f3c62011-03-18 03:53:58 +0000367 pdata->hash_hi = 0;
368 pdata->hash_lo = 0;
369
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000370 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
371
372 if (dev->net->flags & IFF_PROMISC) {
Joe Perchesa475f602010-02-17 10:30:24 +0000373 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000374 pdata->mac_cr |= MAC_CR_PRMS_;
375 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
376 } else if (dev->net->flags & IFF_ALLMULTI) {
Joe Perchesa475f602010-02-17 10:30:24 +0000377 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000378 pdata->mac_cr |= MAC_CR_MCPAS_;
379 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
Jiri Pirko4cd24ea2010-02-08 04:30:35 +0000380 } else if (!netdev_mc_empty(dev->net)) {
Jiri Pirko22bedad32010-04-01 21:22:57 +0000381 struct netdev_hw_addr *ha;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000382
383 pdata->mac_cr |= MAC_CR_HPFILT_;
384 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
385
Jiri Pirko22bedad32010-04-01 21:22:57 +0000386 netdev_for_each_mc_addr(ha, netdev) {
387 u32 bitnum = smsc95xx_hash(ha->addr);
Jiri Pirkoa92635d2010-02-18 04:02:26 +0000388 u32 mask = 0x01 << (bitnum & 0x1F);
389 if (bitnum & 0x20)
Marc Zyngier3c0f3c62011-03-18 03:53:58 +0000390 pdata->hash_hi |= mask;
Jiri Pirkoa92635d2010-02-18 04:02:26 +0000391 else
Marc Zyngier3c0f3c62011-03-18 03:53:58 +0000392 pdata->hash_lo |= mask;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000393 }
394
Joe Perchesa475f602010-02-17 10:30:24 +0000395 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
Marc Zyngier3c0f3c62011-03-18 03:53:58 +0000396 pdata->hash_hi, pdata->hash_lo);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000397 } else {
Joe Perchesa475f602010-02-17 10:30:24 +0000398 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000399 pdata->mac_cr &=
400 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
401 }
402
403 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
404
405 /* Initiate async writes, as we can't wait for completion here */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000406 ret = smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi);
407 check_warn(ret, "failed to initiate async write to HASHH");
408
409 ret = smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo);
410 check_warn(ret, "failed to initiate async write to HASHL");
411
412 ret = smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr);
413 check_warn(ret, "failed to initiate async write to MAC_CR");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000414}
415
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000416static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
417 u16 lcladv, u16 rmtadv)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000418{
419 u32 flow, afc_cfg = 0;
420
421 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000422 check_warn_return(ret, "Error reading AFC_CFG");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000423
424 if (duplex == DUPLEX_FULL) {
Steve Glendinningbc02ff92008-12-16 02:00:48 -0800425 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000426
427 if (cap & FLOW_CTRL_RX)
428 flow = 0xFFFF0002;
429 else
430 flow = 0;
431
432 if (cap & FLOW_CTRL_TX)
433 afc_cfg |= 0xF;
434 else
435 afc_cfg &= ~0xF;
436
Joe Perchesa475f602010-02-17 10:30:24 +0000437 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
Joe Perches60b86752010-02-17 10:30:23 +0000438 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
439 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000440 } else {
Joe Perchesa475f602010-02-17 10:30:24 +0000441 netif_dbg(dev, link, dev->net, "half duplex\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000442 flow = 0;
443 afc_cfg |= 0xF;
444 }
445
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000446 ret = smsc95xx_write_reg(dev, FLOW, flow);
447 check_warn_return(ret, "Error writing FLOW");
448
449 ret = smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
450 check_warn_return(ret, "Error writing AFC_CFG");
451
452 return 0;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000453}
454
455static int smsc95xx_link_reset(struct usbnet *dev)
456{
457 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
458 struct mii_if_info *mii = &dev->mii;
David Decotigny8ae6dac2011-04-27 18:32:38 +0000459 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000460 unsigned long flags;
461 u16 lcladv, rmtadv;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000462 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000463
464 /* clear interrupt status */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000465 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
466 check_warn_return(ret, "Error reading PHY_INT_SRC");
467
468 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
469 check_warn_return(ret, "Error writing INT_STS");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000470
471 mii_check_media(mii, 1, 1);
472 mii_ethtool_gset(&dev->mii, &ecmd);
473 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
474 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
475
David Decotigny8ae6dac2011-04-27 18:32:38 +0000476 netif_dbg(dev, link, dev->net,
477 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
478 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000479
480 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
481 if (ecmd.duplex != DUPLEX_FULL) {
482 pdata->mac_cr &= ~MAC_CR_FDPX_;
483 pdata->mac_cr |= MAC_CR_RCVOWN_;
484 } else {
485 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
486 pdata->mac_cr |= MAC_CR_FDPX_;
487 }
488 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
489
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000490 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
491 check_warn_return(ret, "Error writing MAC_CR");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000492
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000493 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
494 check_warn_return(ret, "Error updating PHY flow control");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000495
496 return 0;
497}
498
499static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
500{
501 u32 intdata;
502
503 if (urb->actual_length != 4) {
Joe Perches60b86752010-02-17 10:30:23 +0000504 netdev_warn(dev->net, "unexpected urb length %d\n",
505 urb->actual_length);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000506 return;
507 }
508
509 memcpy(&intdata, urb->transfer_buffer, 4);
Steve Glendinning1d74a6b2008-10-09 14:34:47 -0700510 le32_to_cpus(&intdata);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000511
Joe Perchesa475f602010-02-17 10:30:24 +0000512 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000513
514 if (intdata & INT_ENP_PHY_INT_)
515 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
516 else
Joe Perches60b86752010-02-17 10:30:23 +0000517 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
518 intdata);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000519}
520
Steve Glendinningf7b29272008-11-20 04:19:21 -0800521/* Enable or disable Tx & Rx checksum offload engines */
Michał Mirosławc8f44af2011-11-15 15:29:55 +0000522static int smsc95xx_set_features(struct net_device *netdev,
523 netdev_features_t features)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000524{
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700525 struct usbnet *dev = netdev_priv(netdev);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000526 u32 read_buf;
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700527 int ret;
528
529 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000530 check_warn_return(ret, "Failed to read COE_CR: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000531
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700532 if (features & NETIF_F_HW_CSUM)
Steve Glendinningf7b29272008-11-20 04:19:21 -0800533 read_buf |= Tx_COE_EN_;
534 else
535 read_buf &= ~Tx_COE_EN_;
536
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700537 if (features & NETIF_F_RXCSUM)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000538 read_buf |= Rx_COE_EN_;
539 else
540 read_buf &= ~Rx_COE_EN_;
541
542 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000543 check_warn_return(ret, "Failed to write COE_CR: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000544
Joe Perchesa475f602010-02-17 10:30:24 +0000545 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000546 return 0;
547}
548
549static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
550{
551 return MAX_EEPROM_SIZE;
552}
553
554static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
555 struct ethtool_eeprom *ee, u8 *data)
556{
557 struct usbnet *dev = netdev_priv(netdev);
558
559 ee->magic = LAN95XX_EEPROM_MAGIC;
560
561 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
562}
563
564static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
565 struct ethtool_eeprom *ee, u8 *data)
566{
567 struct usbnet *dev = netdev_priv(netdev);
568
569 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
Joe Perches60b86752010-02-17 10:30:23 +0000570 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
571 ee->magic);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000572 return -EINVAL;
573 }
574
575 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
576}
577
Emeric Vigier9fa32e92012-07-09 17:44:45 -0400578static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
579{
580 /* all smsc95xx registers */
581 return COE_CR - ID_REV + 1;
582}
583
584static void
585smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
586 void *buf)
587{
588 struct usbnet *dev = netdev_priv(netdev);
Dan Carpenterd3484462012-07-10 20:32:51 +0000589 unsigned int i, j;
590 int retval;
Emeric Vigier9fa32e92012-07-09 17:44:45 -0400591 u32 *data = buf;
592
593 retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
594 if (retval < 0) {
595 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
596 return;
597 }
598
599 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
600 retval = smsc95xx_read_reg(dev, i, &data[j]);
601 if (retval < 0) {
602 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
603 return;
604 }
605 }
606}
607
Steve Glendinninge0e474a2012-09-28 00:07:12 +0000608static void smsc95xx_ethtool_get_wol(struct net_device *net,
609 struct ethtool_wolinfo *wolinfo)
610{
611 struct usbnet *dev = netdev_priv(net);
612 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
613
614 wolinfo->supported = SUPPORTED_WAKE;
615 wolinfo->wolopts = pdata->wolopts;
616}
617
618static int smsc95xx_ethtool_set_wol(struct net_device *net,
619 struct ethtool_wolinfo *wolinfo)
620{
621 struct usbnet *dev = netdev_priv(net);
622 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
623
624 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
625 return 0;
626}
627
Stephen Hemminger0fc0b732009-09-02 01:03:33 -0700628static const struct ethtool_ops smsc95xx_ethtool_ops = {
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000629 .get_link = usbnet_get_link,
630 .nway_reset = usbnet_nway_reset,
631 .get_drvinfo = usbnet_get_drvinfo,
632 .get_msglevel = usbnet_get_msglevel,
633 .set_msglevel = usbnet_set_msglevel,
634 .get_settings = usbnet_get_settings,
635 .set_settings = usbnet_set_settings,
636 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
637 .get_eeprom = smsc95xx_ethtool_get_eeprom,
638 .set_eeprom = smsc95xx_ethtool_set_eeprom,
Emeric Vigier9fa32e92012-07-09 17:44:45 -0400639 .get_regs_len = smsc95xx_ethtool_getregslen,
640 .get_regs = smsc95xx_ethtool_getregs,
Steve Glendinninge0e474a2012-09-28 00:07:12 +0000641 .get_wol = smsc95xx_ethtool_get_wol,
642 .set_wol = smsc95xx_ethtool_set_wol,
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000643};
644
645static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
646{
647 struct usbnet *dev = netdev_priv(netdev);
648
649 if (!netif_running(netdev))
650 return -EINVAL;
651
652 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
653}
654
655static void smsc95xx_init_mac_address(struct usbnet *dev)
656{
657 /* try reading mac address from EEPROM */
658 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
659 dev->net->dev_addr) == 0) {
660 if (is_valid_ether_addr(dev->net->dev_addr)) {
661 /* eeprom values are valid so use them */
Joe Perchesa475f602010-02-17 10:30:24 +0000662 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000663 return;
664 }
665 }
666
667 /* no eeprom, or eeprom values are invalid. generate random MAC */
Danny Kukawkaf2cedb62012-02-15 06:45:39 +0000668 eth_hw_addr_random(dev->net);
Joe Perchesc7e12ea2012-07-12 19:33:07 +0000669 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000670}
671
672static int smsc95xx_set_mac_address(struct usbnet *dev)
673{
674 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
675 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
676 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
677 int ret;
678
679 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000680 check_warn_return(ret, "Failed to write ADDRL: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000681
682 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000683 check_warn_return(ret, "Failed to write ADDRH: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000684
685 return 0;
686}
687
688/* starts the TX path */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000689static int smsc95xx_start_tx_path(struct usbnet *dev)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000690{
691 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
692 unsigned long flags;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000693 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000694
695 /* Enable Tx at MAC */
696 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
697 pdata->mac_cr |= MAC_CR_TXEN_;
698 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
699
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000700 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
701 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000702
703 /* Enable Tx at SCSRs */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000704 ret = smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
705 check_warn_return(ret, "Failed to write TX_CFG: %d\n", ret);
706
707 return 0;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000708}
709
710/* Starts the Receive path */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000711static int smsc95xx_start_rx_path(struct usbnet *dev)
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000712{
713 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
714 unsigned long flags;
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000715 int ret;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000716
717 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
718 pdata->mac_cr |= MAC_CR_RXEN_;
719 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
720
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000721 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
722 check_warn_return(ret, "Failed to write MAC_CR: %d\n", ret);
723
724 return 0;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000725}
726
727static int smsc95xx_phy_initialize(struct usbnet *dev)
728{
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000729 int bmcr, ret, timeout = 0;
Steve Glendinningdb443c42010-03-16 09:03:06 +0000730
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000731 /* Initialize MII structure */
732 dev->mii.dev = dev->net;
733 dev->mii.mdio_read = smsc95xx_mdio_read;
734 dev->mii.mdio_write = smsc95xx_mdio_write;
735 dev->mii.phy_id_mask = 0x1f;
736 dev->mii.reg_num_mask = 0x1f;
737 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
738
Steve Glendinningdb443c42010-03-16 09:03:06 +0000739 /* reset phy and wait for reset to complete */
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000740 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
Steve Glendinningdb443c42010-03-16 09:03:06 +0000741
742 do {
743 msleep(10);
744 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
745 timeout++;
Rabin Vincentd9460922011-04-30 08:29:27 +0000746 } while ((bmcr & BMCR_RESET) && (timeout < 100));
Steve Glendinningdb443c42010-03-16 09:03:06 +0000747
748 if (timeout >= 100) {
749 netdev_warn(dev->net, "timeout on PHY Reset");
750 return -EIO;
751 }
752
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000753 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
754 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
755 ADVERTISE_PAUSE_ASYM);
756
757 /* read to clear */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000758 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
759 check_warn_return(ret, "Failed to read PHY_INT_SRC during init");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000760
761 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
762 PHY_INT_MASK_DEFAULT_);
763 mii_nway_restart(&dev->mii);
764
Joe Perchesa475f602010-02-17 10:30:24 +0000765 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000766 return 0;
767}
768
769static int smsc95xx_reset(struct usbnet *dev)
770{
771 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
772 u32 read_buf, write_buf, burst_cap;
773 int ret = 0, timeout;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000774
Joe Perchesa475f602010-02-17 10:30:24 +0000775 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000776
Steve Glendinning44367612012-09-28 00:07:08 +0000777 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000778 check_warn_return(ret, "Failed to write HW_CFG_LRST_ bit in HW_CFG\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000779
780 timeout = 0;
781 do {
Steve Glendinningcf2acec2012-09-28 00:07:07 +0000782 msleep(10);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000783 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000784 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000785 timeout++;
786 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
787
788 if (timeout >= 100) {
Joe Perches60b86752010-02-17 10:30:23 +0000789 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000790 return ret;
791 }
792
Steve Glendinning44367612012-09-28 00:07:08 +0000793 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000794 check_warn_return(ret, "Failed to write PM_CTRL: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000795
796 timeout = 0;
797 do {
Steve Glendinningcf2acec2012-09-28 00:07:07 +0000798 msleep(10);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000799 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000800 check_warn_return(ret, "Failed to read PM_CTRL: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000801 timeout++;
802 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
803
804 if (timeout >= 100) {
Joe Perches60b86752010-02-17 10:30:23 +0000805 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000806 return ret;
807 }
808
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000809 ret = smsc95xx_set_mac_address(dev);
810 if (ret < 0)
811 return ret;
812
Joe Perchesa475f602010-02-17 10:30:24 +0000813 netif_dbg(dev, ifup, dev->net,
814 "MAC Address: %pM\n", dev->net->dev_addr);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000815
816 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000817 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000818
Joe Perchesa475f602010-02-17 10:30:24 +0000819 netif_dbg(dev, ifup, dev->net,
820 "Read Value from HW_CFG : 0x%08x\n", read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000821
822 read_buf |= HW_CFG_BIR_;
823
824 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000825 check_warn_return(ret, "Failed to write HW_CFG_BIR_ bit in HW_CFG\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000826
827 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000828 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
Joe Perchesa475f602010-02-17 10:30:24 +0000829 netif_dbg(dev, ifup, dev->net,
830 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
831 read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000832
833 if (!turbo_mode) {
834 burst_cap = 0;
835 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
836 } else if (dev->udev->speed == USB_SPEED_HIGH) {
837 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
838 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
839 } else {
840 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
841 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
842 }
843
Joe Perchesa475f602010-02-17 10:30:24 +0000844 netif_dbg(dev, ifup, dev->net,
845 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000846
847 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000848 check_warn_return(ret, "Failed to write BURST_CAP: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000849
850 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000851 check_warn_return(ret, "Failed to read BURST_CAP: %d\n", ret);
852
Joe Perchesa475f602010-02-17 10:30:24 +0000853 netif_dbg(dev, ifup, dev->net,
854 "Read Value from BURST_CAP after writing: 0x%08x\n",
855 read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000856
Steve Glendinning44367612012-09-28 00:07:08 +0000857 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000858 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000859
860 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000861 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d\n", ret);
862
Joe Perchesa475f602010-02-17 10:30:24 +0000863 netif_dbg(dev, ifup, dev->net,
864 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
865 read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000866
867 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000868 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
869
Joe Perchesa475f602010-02-17 10:30:24 +0000870 netif_dbg(dev, ifup, dev->net,
871 "Read Value from HW_CFG: 0x%08x\n", read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000872
873 if (turbo_mode)
874 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
875
876 read_buf &= ~HW_CFG_RXDOFF_;
877
878 /* set Rx data offset=2, Make IP header aligns on word boundary. */
879 read_buf |= NET_IP_ALIGN << 9;
880
881 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000882 check_warn_return(ret, "Failed to write HW_CFG: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000883
884 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000885 check_warn_return(ret, "Failed to read HW_CFG: %d\n", ret);
886
Joe Perchesa475f602010-02-17 10:30:24 +0000887 netif_dbg(dev, ifup, dev->net,
888 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000889
Steve Glendinning44367612012-09-28 00:07:08 +0000890 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000891 check_warn_return(ret, "Failed to write INT_STS: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000892
893 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000894 check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
Joe Perchesa475f602010-02-17 10:30:24 +0000895 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000896
Steve Glendinningf2935012009-05-01 05:46:51 +0000897 /* Configure GPIO pins as LED outputs */
898 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
899 LED_GPIO_CFG_FDX_LED;
900 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000901 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d\n", ret);
Steve Glendinningf2935012009-05-01 05:46:51 +0000902
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000903 /* Init Tx */
Steve Glendinning44367612012-09-28 00:07:08 +0000904 ret = smsc95xx_write_reg(dev, FLOW, 0);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000905 check_warn_return(ret, "Failed to write FLOW: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000906
Steve Glendinning44367612012-09-28 00:07:08 +0000907 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000908 check_warn_return(ret, "Failed to write AFC_CFG: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000909
910 /* Don't need mac_cr_lock during initialisation */
911 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000912 check_warn_return(ret, "Failed to read MAC_CR: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000913
914 /* Init Rx */
915 /* Set Vlan */
Steve Glendinning44367612012-09-28 00:07:08 +0000916 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000917 check_warn_return(ret, "Failed to write VLAN1: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000918
Steve Glendinningf7b29272008-11-20 04:19:21 -0800919 /* Enable or disable checksum offload engines */
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000920 ret = smsc95xx_set_features(dev->net, dev->net->features);
921 check_warn_return(ret, "Failed to set checksum offload features");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000922
923 smsc95xx_set_multicast(dev->net);
924
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000925 ret = smsc95xx_phy_initialize(dev);
926 check_warn_return(ret, "Failed to init PHY");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000927
928 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000929 check_warn_return(ret, "Failed to read INT_EP_CTL: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000930
931 /* enable PHY interrupts */
932 read_buf |= INT_EP_CTL_PHY_INT_;
933
934 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000935 check_warn_return(ret, "Failed to write INT_EP_CTL: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000936
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000937 ret = smsc95xx_start_tx_path(dev);
938 check_warn_return(ret, "Failed to start TX path");
939
940 ret = smsc95xx_start_rx_path(dev);
941 check_warn_return(ret, "Failed to start RX path");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000942
Joe Perchesa475f602010-02-17 10:30:24 +0000943 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000944 return 0;
945}
946
Stephen Hemminger63e77b32009-03-20 19:35:58 +0000947static const struct net_device_ops smsc95xx_netdev_ops = {
948 .ndo_open = usbnet_open,
949 .ndo_stop = usbnet_stop,
950 .ndo_start_xmit = usbnet_start_xmit,
951 .ndo_tx_timeout = usbnet_tx_timeout,
952 .ndo_change_mtu = usbnet_change_mtu,
953 .ndo_set_mac_address = eth_mac_addr,
954 .ndo_validate_addr = eth_validate_addr,
955 .ndo_do_ioctl = smsc95xx_ioctl,
Jiri Pirkoafc4b132011-08-16 06:29:01 +0000956 .ndo_set_rx_mode = smsc95xx_set_multicast,
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700957 .ndo_set_features = smsc95xx_set_features,
Stephen Hemminger63e77b32009-03-20 19:35:58 +0000958};
959
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000960static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
961{
962 struct smsc95xx_priv *pdata = NULL;
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +0000963 u32 val;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000964 int ret;
965
966 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
967
968 ret = usbnet_get_endpoints(dev, intf);
Steve Glendinning769ea6d2012-09-28 00:07:09 +0000969 check_warn_return(ret, "usbnet_get_endpoints failed: %d\n", ret);
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000970
971 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
972 GFP_KERNEL);
973
974 pdata = (struct smsc95xx_priv *)(dev->data[0]);
975 if (!pdata) {
Joe Perches60b86752010-02-17 10:30:23 +0000976 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000977 return -ENOMEM;
978 }
979
980 spin_lock_init(&pdata->mac_cr_lock);
981
Michał Mirosław78e47fe2011-04-01 20:56:23 -0700982 if (DEFAULT_TX_CSUM_ENABLE)
983 dev->net->features |= NETIF_F_HW_CSUM;
984 if (DEFAULT_RX_CSUM_ENABLE)
985 dev->net->features |= NETIF_F_RXCSUM;
986
987 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000988
Bernard Blackhamf4e8ab72010-10-18 13:16:39 +0000989 smsc95xx_init_mac_address(dev);
990
Steve Glendinning2f7ca802008-10-02 05:27:57 +0000991 /* Init all registers */
992 ret = smsc95xx_reset(dev);
993
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +0000994 /* detect device revision as different features may be available */
995 ret = smsc95xx_read_reg(dev, ID_REV, &val);
996 check_warn_return(ret, "Failed to read ID_REV: %d\n", ret);
997 val >>= 16;
998 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9512_))
999 pdata->wuff_filter_count = LAN9500A_WUFF_NUM;
1000 else
1001 pdata->wuff_filter_count = LAN9500_WUFF_NUM;
1002
Stephen Hemminger63e77b32009-03-20 19:35:58 +00001003 dev->net->netdev_ops = &smsc95xx_netdev_ops;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001004 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001005 dev->net->flags |= IFF_MULTICAST;
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001006 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
Stephane Fillod9bbf5662012-04-20 09:39:23 +00001007 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001008 return 0;
1009}
1010
1011static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1012{
1013 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1014 if (pdata) {
Joe Perchesa475f602010-02-17 10:30:24 +00001015 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001016 kfree(pdata);
1017 pdata = NULL;
1018 dev->data[0] = 0;
1019 }
1020}
1021
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001022static u16 smsc_crc(const u8 *buffer, size_t len, int filter)
1023{
1024 return bitrev16(crc16(0xFFFF, buffer, len)) << ((filter % 2) * 16);
1025}
1026
Steve Glendinningb5a04472012-09-28 00:07:11 +00001027static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1028{
1029 struct usbnet *dev = usb_get_intfdata(intf);
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001030 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
Steve Glendinningb5a04472012-09-28 00:07:11 +00001031 int ret;
1032 u32 val;
1033
Steve Glendinningb5a04472012-09-28 00:07:11 +00001034 ret = usbnet_suspend(intf, message);
1035 check_warn_return(ret, "usbnet_suspend error");
1036
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001037 /* if no wol options set, enter lowest power SUSPEND2 mode */
1038 if (!(pdata->wolopts & SUPPORTED_WAKE)) {
1039 netdev_info(dev->net, "entering SUSPEND2 mode");
1040
1041 /* disable energy detect (link up) & wake up events */
1042 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1043 check_warn_return(ret, "Error reading WUCSR");
1044
1045 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1046
1047 ret = smsc95xx_write_reg(dev, WUCSR, val);
1048 check_warn_return(ret, "Error writing WUCSR");
1049
1050 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1051 check_warn_return(ret, "Error reading PM_CTRL");
1052
1053 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1054
1055 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1056 check_warn_return(ret, "Error writing PM_CTRL");
1057
1058 /* enter suspend2 mode */
1059 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1060 check_warn_return(ret, "Error reading PM_CTRL");
1061
1062 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1063 val |= PM_CTL_SUS_MODE_2;
1064
1065 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1066 check_warn_return(ret, "Error writing PM_CTRL");
1067
1068 return 0;
1069 }
1070
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001071 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1072 u32 *filter_mask = kzalloc(32, GFP_KERNEL);
1073 u32 *command = kzalloc(2, GFP_KERNEL);
1074 u32 *offset = kzalloc(2, GFP_KERNEL);
1075 u32 *crc = kzalloc(4, GFP_KERNEL);
1076 int i, filter = 0;
1077
1078 if (pdata->wolopts & WAKE_BCAST) {
1079 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1080 netdev_info(dev->net, "enabling broadcast detection");
1081 filter_mask[filter * 4] = 0x003F;
1082 filter_mask[filter * 4 + 1] = 0x00;
1083 filter_mask[filter * 4 + 2] = 0x00;
1084 filter_mask[filter * 4 + 3] = 0x00;
1085 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1086 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1087 crc[filter/2] |= smsc_crc(bcast, 6, filter);
1088 filter++;
1089 }
1090
1091 if (pdata->wolopts & WAKE_MCAST) {
1092 const u8 mcast[] = {0x01, 0x00, 0x5E};
1093 netdev_info(dev->net, "enabling multicast detection");
1094 filter_mask[filter * 4] = 0x0007;
1095 filter_mask[filter * 4 + 1] = 0x00;
1096 filter_mask[filter * 4 + 2] = 0x00;
1097 filter_mask[filter * 4 + 3] = 0x00;
1098 command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1099 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1100 crc[filter/2] |= smsc_crc(mcast, 3, filter);
1101 filter++;
1102 }
1103
1104 if (pdata->wolopts & WAKE_ARP) {
1105 const u8 arp[] = {0x08, 0x06};
1106 netdev_info(dev->net, "enabling ARP detection");
1107 filter_mask[filter * 4] = 0x0003;
1108 filter_mask[filter * 4 + 1] = 0x00;
1109 filter_mask[filter * 4 + 2] = 0x00;
1110 filter_mask[filter * 4 + 3] = 0x00;
1111 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1112 offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1113 crc[filter/2] |= smsc_crc(arp, 2, filter);
1114 filter++;
1115 }
1116
1117 if (pdata->wolopts & WAKE_UCAST) {
1118 netdev_info(dev->net, "enabling unicast detection");
1119 filter_mask[filter * 4] = 0x003F;
1120 filter_mask[filter * 4 + 1] = 0x00;
1121 filter_mask[filter * 4 + 2] = 0x00;
1122 filter_mask[filter * 4 + 3] = 0x00;
1123 command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1124 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1125 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1126 filter++;
1127 }
1128
1129 for (i = 0; i < (pdata->wuff_filter_count * 4); i++) {
1130 ret = smsc95xx_write_reg(dev, WUFF, filter_mask[i]);
1131 check_warn_return(ret, "Error writing WUFF");
1132 }
1133
1134 for (i = 0; i < (pdata->wuff_filter_count / 4); i++) {
1135 ret = smsc95xx_write_reg(dev, WUFF, command[i]);
1136 check_warn_return(ret, "Error writing WUFF");
1137 }
1138
1139 for (i = 0; i < (pdata->wuff_filter_count / 4); i++) {
1140 ret = smsc95xx_write_reg(dev, WUFF, offset[i]);
1141 check_warn_return(ret, "Error writing WUFF");
1142 }
1143
1144 for (i = 0; i < (pdata->wuff_filter_count / 2); i++) {
1145 ret = smsc95xx_write_reg(dev, WUFF, crc[i]);
1146 check_warn_return(ret, "Error writing WUFF");
1147 }
1148
1149 /* clear any pending pattern match packet status */
1150 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1151 check_warn_return(ret, "Error reading WUCSR");
1152
1153 val |= WUCSR_WUFR_;
1154
1155 ret = smsc95xx_write_reg(dev, WUCSR, val);
1156 check_warn_return(ret, "Error writing WUCSR");
1157 }
1158
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001159 if (pdata->wolopts & WAKE_MAGIC) {
1160 /* clear any pending magic packet status */
1161 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1162 check_warn_return(ret, "Error reading WUCSR");
1163
1164 val |= WUCSR_MPR_;
1165
1166 ret = smsc95xx_write_reg(dev, WUCSR, val);
1167 check_warn_return(ret, "Error writing WUCSR");
1168 }
1169
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001170 /* enable/disable wakeup sources */
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001171 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1172 check_warn_return(ret, "Error reading WUCSR");
1173
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001174 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1175 netdev_info(dev->net, "enabling pattern match wakeup");
1176 val |= WUCSR_WAKE_EN_;
1177 } else {
1178 netdev_info(dev->net, "disabling pattern match wakeup");
1179 val &= ~WUCSR_WAKE_EN_;
1180 }
1181
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001182 if (pdata->wolopts & WAKE_MAGIC) {
1183 netdev_info(dev->net, "enabling magic packet wakeup");
1184 val |= WUCSR_MPEN_;
1185 } else {
1186 netdev_info(dev->net, "disabling magic packet wakeup");
1187 val &= ~WUCSR_MPEN_;
1188 }
1189
1190 ret = smsc95xx_write_reg(dev, WUCSR, val);
1191 check_warn_return(ret, "Error writing WUCSR");
1192
1193 /* enable wol wakeup source */
1194 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1195 check_warn_return(ret, "Error reading PM_CTRL");
1196
1197 val |= PM_CTL_WOL_EN_;
1198
1199 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1200 check_warn_return(ret, "Error writing PM_CTRL");
1201
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001202 /* enable receiver to enable frame reception */
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001203 smsc95xx_start_rx_path(dev);
1204
1205 /* some wol options are enabled, so enter SUSPEND0 */
1206 netdev_info(dev->net, "entering SUSPEND0 mode");
Steve Glendinningb5a04472012-09-28 00:07:11 +00001207
1208 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1209 check_warn_return(ret, "Error reading PM_CTRL");
1210
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001211 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1212 val |= PM_CTL_SUS_MODE_0;
Steve Glendinningb5a04472012-09-28 00:07:11 +00001213
1214 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1215 check_warn_return(ret, "Error writing PM_CTRL");
1216
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001217 /* clear wol status */
1218 val &= ~PM_CTL_WUPS_;
1219 val |= PM_CTL_WUPS_WOL_;
1220 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1221 check_warn_return(ret, "Error writing PM_CTRL");
1222
1223 /* read back PM_CTRL */
1224 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1225 check_warn_return(ret, "Error reading PM_CTRL");
1226
1227 smsc95xx_set_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1228
1229 return 0;
1230}
1231
1232static int smsc95xx_resume(struct usb_interface *intf)
1233{
1234 struct usbnet *dev = usb_get_intfdata(intf);
1235 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1236 int ret;
1237 u32 val;
1238
1239 BUG_ON(!dev);
1240
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001241 if (pdata->wolopts) {
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001242 smsc95xx_clear_feature(dev, USB_DEVICE_REMOTE_WAKEUP);
1243
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001244 /* clear wake-up sources */
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001245 ret = smsc95xx_read_reg(dev, WUCSR, &val);
1246 check_warn_return(ret, "Error reading WUCSR");
1247
Steve Glendinningbbd9f9e2012-10-26 03:43:56 +00001248 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001249
1250 ret = smsc95xx_write_reg(dev, WUCSR, val);
1251 check_warn_return(ret, "Error writing WUCSR");
1252
1253 /* clear wake-up status */
1254 ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
1255 check_warn_return(ret, "Error reading PM_CTRL");
1256
1257 val &= ~PM_CTL_WOL_EN_;
1258 val |= PM_CTL_WUPS_;
1259
1260 ret = smsc95xx_write_reg(dev, PM_CTRL, val);
1261 check_warn_return(ret, "Error writing PM_CTRL");
1262 }
1263
1264 return usbnet_resume(intf);
1265 check_warn_return(ret, "usbnet_resume error");
1266
Steve Glendinningb5a04472012-09-28 00:07:11 +00001267 return 0;
1268}
1269
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001270static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1271{
1272 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1273 skb->ip_summed = CHECKSUM_COMPLETE;
1274 skb_trim(skb, skb->len - 2);
1275}
1276
1277static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1278{
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001279 while (skb->len > 0) {
1280 u32 header, align_count;
1281 struct sk_buff *ax_skb;
1282 unsigned char *packet;
1283 u16 size;
1284
1285 memcpy(&header, skb->data, sizeof(header));
1286 le32_to_cpus(&header);
1287 skb_pull(skb, 4 + NET_IP_ALIGN);
1288 packet = skb->data;
1289
1290 /* get the packet length */
1291 size = (u16)((header & RX_STS_FL_) >> 16);
1292 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1293
1294 if (unlikely(header & RX_STS_ES_)) {
Joe Perchesa475f602010-02-17 10:30:24 +00001295 netif_dbg(dev, rx_err, dev->net,
1296 "Error header=0x%08x\n", header);
Herbert Xu80667ac2009-06-29 16:53:00 +00001297 dev->net->stats.rx_errors++;
1298 dev->net->stats.rx_dropped++;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001299
1300 if (header & RX_STS_CRC_) {
Herbert Xu80667ac2009-06-29 16:53:00 +00001301 dev->net->stats.rx_crc_errors++;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001302 } else {
1303 if (header & (RX_STS_TL_ | RX_STS_RF_))
Herbert Xu80667ac2009-06-29 16:53:00 +00001304 dev->net->stats.rx_frame_errors++;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001305
1306 if ((header & RX_STS_LE_) &&
1307 (!(header & RX_STS_FT_)))
Herbert Xu80667ac2009-06-29 16:53:00 +00001308 dev->net->stats.rx_length_errors++;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001309 }
1310 } else {
1311 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1312 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
Joe Perchesa475f602010-02-17 10:30:24 +00001313 netif_dbg(dev, rx_err, dev->net,
1314 "size err header=0x%08x\n", header);
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001315 return 0;
1316 }
1317
1318 /* last frame in this batch */
1319 if (skb->len == size) {
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001320 if (dev->net->features & NETIF_F_RXCSUM)
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001321 smsc95xx_rx_csum_offload(skb);
Peter Korsgaarddf18acc2009-05-13 10:10:41 +00001322 skb_trim(skb, skb->len - 4); /* remove fcs */
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001323 skb->truesize = size + sizeof(struct sk_buff);
1324
1325 return 1;
1326 }
1327
1328 ax_skb = skb_clone(skb, GFP_ATOMIC);
1329 if (unlikely(!ax_skb)) {
Joe Perches60b86752010-02-17 10:30:23 +00001330 netdev_warn(dev->net, "Error allocating skb\n");
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001331 return 0;
1332 }
1333
1334 ax_skb->len = size;
1335 ax_skb->data = packet;
1336 skb_set_tail_pointer(ax_skb, size);
1337
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001338 if (dev->net->features & NETIF_F_RXCSUM)
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001339 smsc95xx_rx_csum_offload(ax_skb);
Peter Korsgaarddf18acc2009-05-13 10:10:41 +00001340 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001341 ax_skb->truesize = size + sizeof(struct sk_buff);
1342
1343 usbnet_skb_return(dev, ax_skb);
1344 }
1345
1346 skb_pull(skb, size);
1347
1348 /* padding bytes before the next frame starts */
1349 if (skb->len)
1350 skb_pull(skb, align_count);
1351 }
1352
1353 if (unlikely(skb->len < 0)) {
Joe Perches60b86752010-02-17 10:30:23 +00001354 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001355 return 0;
1356 }
1357
1358 return 1;
1359}
1360
Steve Glendinningf7b29272008-11-20 04:19:21 -08001361static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1362{
Michał Mirosław55508d62010-12-14 15:24:08 +00001363 u16 low_16 = (u16)skb_checksum_start_offset(skb);
1364 u16 high_16 = low_16 + skb->csum_offset;
Steve Glendinningf7b29272008-11-20 04:19:21 -08001365 return (high_16 << 16) | low_16;
1366}
1367
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001368static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
1369 struct sk_buff *skb, gfp_t flags)
1370{
Michał Mirosław78e47fe2011-04-01 20:56:23 -07001371 bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
Steve Glendinningf7b29272008-11-20 04:19:21 -08001372 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001373 u32 tx_cmd_a, tx_cmd_b;
1374
Steve Glendinningf7b29272008-11-20 04:19:21 -08001375 /* We do not advertise SG, so skbs should be already linearized */
1376 BUG_ON(skb_shinfo(skb)->nr_frags);
1377
1378 if (skb_headroom(skb) < overhead) {
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001379 struct sk_buff *skb2 = skb_copy_expand(skb,
Steve Glendinningf7b29272008-11-20 04:19:21 -08001380 overhead, 0, flags);
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001381 dev_kfree_skb_any(skb);
1382 skb = skb2;
1383 if (!skb)
1384 return NULL;
1385 }
1386
Steve Glendinningf7b29272008-11-20 04:19:21 -08001387 if (csum) {
Steve Glendinning11bc3082010-03-18 22:18:41 -07001388 if (skb->len <= 45) {
1389 /* workaround - hardware tx checksum does not work
1390 * properly with extremely small packets */
Michał Mirosław55508d62010-12-14 15:24:08 +00001391 long csstart = skb_checksum_start_offset(skb);
Steve Glendinning11bc3082010-03-18 22:18:41 -07001392 __wsum calc = csum_partial(skb->data + csstart,
1393 skb->len - csstart, 0);
1394 *((__sum16 *)(skb->data + csstart
1395 + skb->csum_offset)) = csum_fold(calc);
1396
1397 csum = false;
1398 } else {
1399 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
1400 skb_push(skb, 4);
1401 memcpy(skb->data, &csum_preamble, 4);
1402 }
Steve Glendinningf7b29272008-11-20 04:19:21 -08001403 }
1404
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001405 skb_push(skb, 4);
1406 tx_cmd_b = (u32)(skb->len - 4);
Steve Glendinningf7b29272008-11-20 04:19:21 -08001407 if (csum)
1408 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001409 cpu_to_le32s(&tx_cmd_b);
1410 memcpy(skb->data, &tx_cmd_b, 4);
1411
1412 skb_push(skb, 4);
1413 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
1414 TX_CMD_A_LAST_SEG_;
1415 cpu_to_le32s(&tx_cmd_a);
1416 memcpy(skb->data, &tx_cmd_a, 4);
1417
1418 return skb;
1419}
1420
1421static const struct driver_info smsc95xx_info = {
1422 .description = "smsc95xx USB 2.0 Ethernet",
1423 .bind = smsc95xx_bind,
1424 .unbind = smsc95xx_unbind,
1425 .link_reset = smsc95xx_link_reset,
1426 .reset = smsc95xx_reset,
1427 .rx_fixup = smsc95xx_rx_fixup,
1428 .tx_fixup = smsc95xx_tx_fixup,
1429 .status = smsc95xx_status,
Paolo Pisati07d69d42012-04-23 04:05:20 +00001430 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001431};
1432
1433static const struct usb_device_id products[] = {
1434 {
1435 /* SMSC9500 USB Ethernet Device */
1436 USB_DEVICE(0x0424, 0x9500),
1437 .driver_info = (unsigned long) &smsc95xx_info,
1438 },
Steve Glendinning726474b2009-05-01 06:07:22 +00001439 {
Steve Glendinning6f41d122009-09-22 05:13:02 +00001440 /* SMSC9505 USB Ethernet Device */
1441 USB_DEVICE(0x0424, 0x9505),
1442 .driver_info = (unsigned long) &smsc95xx_info,
1443 },
1444 {
1445 /* SMSC9500A USB Ethernet Device */
1446 USB_DEVICE(0x0424, 0x9E00),
1447 .driver_info = (unsigned long) &smsc95xx_info,
1448 },
1449 {
1450 /* SMSC9505A USB Ethernet Device */
1451 USB_DEVICE(0x0424, 0x9E01),
1452 .driver_info = (unsigned long) &smsc95xx_info,
1453 },
1454 {
Steve Glendinning726474b2009-05-01 06:07:22 +00001455 /* SMSC9512/9514 USB Hub & Ethernet Device */
1456 USB_DEVICE(0x0424, 0xec00),
1457 .driver_info = (unsigned long) &smsc95xx_info,
1458 },
Steve Glendinning6f41d122009-09-22 05:13:02 +00001459 {
1460 /* SMSC9500 USB Ethernet Device (SAL10) */
1461 USB_DEVICE(0x0424, 0x9900),
1462 .driver_info = (unsigned long) &smsc95xx_info,
1463 },
1464 {
1465 /* SMSC9505 USB Ethernet Device (SAL10) */
1466 USB_DEVICE(0x0424, 0x9901),
1467 .driver_info = (unsigned long) &smsc95xx_info,
1468 },
1469 {
1470 /* SMSC9500A USB Ethernet Device (SAL10) */
1471 USB_DEVICE(0x0424, 0x9902),
1472 .driver_info = (unsigned long) &smsc95xx_info,
1473 },
1474 {
1475 /* SMSC9505A USB Ethernet Device (SAL10) */
1476 USB_DEVICE(0x0424, 0x9903),
1477 .driver_info = (unsigned long) &smsc95xx_info,
1478 },
1479 {
1480 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
1481 USB_DEVICE(0x0424, 0x9904),
1482 .driver_info = (unsigned long) &smsc95xx_info,
1483 },
1484 {
1485 /* SMSC9500A USB Ethernet Device (HAL) */
1486 USB_DEVICE(0x0424, 0x9905),
1487 .driver_info = (unsigned long) &smsc95xx_info,
1488 },
1489 {
1490 /* SMSC9505A USB Ethernet Device (HAL) */
1491 USB_DEVICE(0x0424, 0x9906),
1492 .driver_info = (unsigned long) &smsc95xx_info,
1493 },
1494 {
1495 /* SMSC9500 USB Ethernet Device (Alternate ID) */
1496 USB_DEVICE(0x0424, 0x9907),
1497 .driver_info = (unsigned long) &smsc95xx_info,
1498 },
1499 {
1500 /* SMSC9500A USB Ethernet Device (Alternate ID) */
1501 USB_DEVICE(0x0424, 0x9908),
1502 .driver_info = (unsigned long) &smsc95xx_info,
1503 },
1504 {
1505 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
1506 USB_DEVICE(0x0424, 0x9909),
1507 .driver_info = (unsigned long) &smsc95xx_info,
1508 },
Steve Glendinning88edaa42011-04-10 18:59:27 -07001509 {
1510 /* SMSC LAN9530 USB Ethernet Device */
1511 USB_DEVICE(0x0424, 0x9530),
1512 .driver_info = (unsigned long) &smsc95xx_info,
1513 },
1514 {
1515 /* SMSC LAN9730 USB Ethernet Device */
1516 USB_DEVICE(0x0424, 0x9730),
1517 .driver_info = (unsigned long) &smsc95xx_info,
1518 },
1519 {
1520 /* SMSC LAN89530 USB Ethernet Device */
1521 USB_DEVICE(0x0424, 0x9E08),
1522 .driver_info = (unsigned long) &smsc95xx_info,
1523 },
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001524 { }, /* END */
1525};
1526MODULE_DEVICE_TABLE(usb, products);
1527
1528static struct usb_driver smsc95xx_driver = {
1529 .name = "smsc95xx",
1530 .id_table = products,
1531 .probe = usbnet_probe,
Steve Glendinningb5a04472012-09-28 00:07:11 +00001532 .suspend = smsc95xx_suspend,
Steve Glendinninge0e474a2012-09-28 00:07:12 +00001533 .resume = smsc95xx_resume,
1534 .reset_resume = smsc95xx_resume,
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001535 .disconnect = usbnet_disconnect,
Sarah Sharpe1f12eb2012-04-23 10:08:51 -07001536 .disable_hub_initiated_lpm = 1,
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001537};
1538
Greg Kroah-Hartmand632eb12011-11-18 09:44:20 -08001539module_usb_driver(smsc95xx_driver);
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001540
1541MODULE_AUTHOR("Nancy Lin");
Steve Glendinning90b24cf2012-04-16 12:13:29 +01001542MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
Steve Glendinning2f7ca802008-10-02 05:27:57 +00001543MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
1544MODULE_LICENSE("GPL");